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Add Nucleo G031K8 and generic G031Kx
Fix stm32duino#855 Signed-off-by: Frederic Pillon <[email protected]>
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Diff for: ‎README.md

+3
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
114114
| :----: | :-------: | ---- | :-----: | :---- |
115115
| :green_heart: | STM32F031K6 | [Nucleo F031K6](https://www.st.com/en/evaluation-tools/nucleo-f031k6.html) | *1.9.0* | |
116116
| :green_heart: | STM32F303K8 | [Nucleo F303K8](http://www.st.com/en/evaluation-tools/nucleo-f303k8.html) | *1.1.0* | |
117+
| :yellow_heart: | STM32G031K8 | [Nucleo G031K8](https://www.st.com/en/evaluation-tools/nucleo-g031k8.html) | **2.0.0** |
117118
| :green_heart: | STM32G431KB | [Nucleo G431KB](https://www.st.com/en/evaluation-tools/nucleo-g431kb.html) | *1.7.0* | |
118119
| :green_heart: | STM32L031K6 | [Nucleo L031K6](http://www.st.com/en/evaluation-tools/nucleo-l031k6.html) | *1.1.1* | |
119120
| :green_heart: | STM32L412KB | [Nucleo L412KB](http://www.st.com/en/evaluation-tools/nucleo-l412kb.html) | *1.5.0* | |
@@ -215,7 +216,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
215216
| :yellow_heart: | STM32G030K8 | [Aurora One](https://www.bfy.kr/aurora-one/) | **2.0.0** |
216217
| :yellow_heart: | STM32G030K6<br>STM32G030K8 | Generic Board | **2.0.0** | |
217218
| :yellow_heart: | STM32G031J4<br>STM32G031J6 | Generic Board | **2.0.0** | |
219+
| :yellow_heart: | STM32G031K4<br>STM32G031K6<br>STM32G031K8 | Generic Board | **2.0.0** | |
218220
| :yellow_heart: | STM32G041J6 | Generic Board | **2.0.0** | |
221+
| :yellow_heart: | STM32G041K6<br>STM32G041K8 | Generic Board | **2.0.0** | |
219222
| :yellow_heart: | STM32G071R6<br>STM32G071R8<br>STM32G071RB | Generic Board | **2.0.0** | |
220223
| :yellow_heart: | STM32G081RB | Generic Board | **2.0.0** | |
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Diff for: ‎boards.txt

+93
Original file line numberDiff line numberDiff line change
@@ -508,6 +508,19 @@ Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8
508508
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/NUCLEO_F303K8
509509
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.cmsis_lib_gcc=arm_cortexM4lf_math
510510

511+
# NUCLEO_G031K8 board
512+
Nucleo_32.menu.pnum.NUCLEO_G031K8=Nucleo G031K8
513+
Nucleo_32.menu.pnum.NUCLEO_G031K8.node=NOD_G031K8
514+
Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_size=65536
515+
Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_data_size=8192
516+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.mcu=cortex-m0plus
517+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.board=NUCLEO_G031K8
518+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.series=STM32G0xx
519+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.product_line=STM32G031xx
520+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
521+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.cmsis_lib_gcc=arm_cortexM0l_math
522+
Nucleo_32.menu.pnum.NUCLEO_G031K8.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
523+
511524
# NUCLEO_G431KB board
512525
Nucleo_32.menu.pnum.NUCLEO_G431KB=Nucleo G431KB
513526
Nucleo_32.menu.pnum.NUCLEO_G431KB.node="NODE_G431KB,NOD_G431KB"
@@ -1732,6 +1745,54 @@ GenG0.menu.pnum.GENERIC_G031J6MX.build.board=GENERIC_G031J6MX
17321745
GenG0.menu.pnum.GENERIC_G031J6MX.build.product_line=STM32G031xx
17331746
GenG0.menu.pnum.GENERIC_G031J6MX.build.variant=STM32G0xx/G031J(4-6)M_G041J6M
17341747

1748+
# Generic G031K4Tx
1749+
GenG0.menu.pnum.GENERIC_G031K4TX=Generic G031K4Tx
1750+
GenG0.menu.pnum.GENERIC_G031K4TX.upload.maximum_size=16384
1751+
GenG0.menu.pnum.GENERIC_G031K4TX.upload.maximum_data_size=8192
1752+
GenG0.menu.pnum.GENERIC_G031K4TX.build.board=GENERIC_G031K4TX
1753+
GenG0.menu.pnum.GENERIC_G031K4TX.build.product_line=STM32G031xx
1754+
GenG0.menu.pnum.GENERIC_G031K4TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1755+
1756+
# Generic G031K6Tx
1757+
GenG0.menu.pnum.GENERIC_G031K6TX=Generic G031K6Tx
1758+
GenG0.menu.pnum.GENERIC_G031K6TX.upload.maximum_size=32768
1759+
GenG0.menu.pnum.GENERIC_G031K6TX.upload.maximum_data_size=8192
1760+
GenG0.menu.pnum.GENERIC_G031K6TX.build.board=GENERIC_G031K6TX
1761+
GenG0.menu.pnum.GENERIC_G031K6TX.build.product_line=STM32G031xx
1762+
GenG0.menu.pnum.GENERIC_G031K6TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1763+
1764+
# Generic G031K8Tx
1765+
GenG0.menu.pnum.GENERIC_G031K8TX=Generic G031K8Tx
1766+
GenG0.menu.pnum.GENERIC_G031K8TX.upload.maximum_size=65536
1767+
GenG0.menu.pnum.GENERIC_G031K8TX.upload.maximum_data_size=8192
1768+
GenG0.menu.pnum.GENERIC_G031K8TX.build.board=GENERIC_G031K8TX
1769+
GenG0.menu.pnum.GENERIC_G031K8TX.build.product_line=STM32G031xx
1770+
GenG0.menu.pnum.GENERIC_G031K8TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1771+
1772+
# Generic G031K4Ux
1773+
GenG0.menu.pnum.GENERIC_G031K4UX=Generic G031K4Ux
1774+
GenG0.menu.pnum.GENERIC_G031K4UX.upload.maximum_size=16384
1775+
GenG0.menu.pnum.GENERIC_G031K4UX.upload.maximum_data_size=8192
1776+
GenG0.menu.pnum.GENERIC_G031K4UX.build.board=GENERIC_G031K4UX
1777+
GenG0.menu.pnum.GENERIC_G031K4UX.build.product_line=STM32G031xx
1778+
GenG0.menu.pnum.GENERIC_G031K4UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1779+
1780+
# Generic G031K6Ux
1781+
GenG0.menu.pnum.GENERIC_G031K6UX=Generic G031K6Ux
1782+
GenG0.menu.pnum.GENERIC_G031K6UX.upload.maximum_size=32768
1783+
GenG0.menu.pnum.GENERIC_G031K6UX.upload.maximum_data_size=8192
1784+
GenG0.menu.pnum.GENERIC_G031K6UX.build.board=GENERIC_G031K6UX
1785+
GenG0.menu.pnum.GENERIC_G031K6UX.build.product_line=STM32G031xx
1786+
GenG0.menu.pnum.GENERIC_G031K6UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1787+
1788+
# Generic G031K8Ux
1789+
GenG0.menu.pnum.GENERIC_G031K8UX=Generic G031K8Ux
1790+
GenG0.menu.pnum.GENERIC_G031K8UX.upload.maximum_size=65536
1791+
GenG0.menu.pnum.GENERIC_G031K8UX.upload.maximum_data_size=8192
1792+
GenG0.menu.pnum.GENERIC_G031K8UX.build.board=GENERIC_G031K8UX
1793+
GenG0.menu.pnum.GENERIC_G031K8UX.build.product_line=STM32G031xx
1794+
GenG0.menu.pnum.GENERIC_G031K8UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1795+
17351796
# Generic G041J6Mx
17361797
GenG0.menu.pnum.GENERIC_G041J6MX=Generic G041J6Mx
17371798
GenG0.menu.pnum.GENERIC_G041J6MX.upload.maximum_size=32768
@@ -1740,6 +1801,38 @@ GenG0.menu.pnum.GENERIC_G041J6MX.build.board=GENERIC_G041J6MX
17401801
GenG0.menu.pnum.GENERIC_G041J6MX.build.product_line=STM32G041xx
17411802
GenG0.menu.pnum.GENERIC_G041J6MX.build.variant=STM32G0xx/G031J(4-6)M_G041J6M
17421803

1804+
# Generic G041K6Tx
1805+
GenG0.menu.pnum.GENERIC_G041K6TX=Generic G041K6Tx
1806+
GenG0.menu.pnum.GENERIC_G041K6TX.upload.maximum_size=32768
1807+
GenG0.menu.pnum.GENERIC_G041K6TX.upload.maximum_data_size=8192
1808+
GenG0.menu.pnum.GENERIC_G041K6TX.build.board=GENERIC_G041K6TX
1809+
GenG0.menu.pnum.GENERIC_G041K6TX.build.product_line=STM32G041xx
1810+
GenG0.menu.pnum.GENERIC_G041K6TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1811+
1812+
# Generic G041K8Tx
1813+
GenG0.menu.pnum.GENERIC_G041K8TX=Generic G041K8Tx
1814+
GenG0.menu.pnum.GENERIC_G041K8TX.upload.maximum_size=65536
1815+
GenG0.menu.pnum.GENERIC_G041K8TX.upload.maximum_data_size=8192
1816+
GenG0.menu.pnum.GENERIC_G041K8TX.build.board=GENERIC_G041K8TX
1817+
GenG0.menu.pnum.GENERIC_G041K8TX.build.product_line=STM32G041xx
1818+
GenG0.menu.pnum.GENERIC_G041K8TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1819+
1820+
# Generic G041K6Ux
1821+
GenG0.menu.pnum.GENERIC_G041K6UX=Generic G041K6Ux
1822+
GenG0.menu.pnum.GENERIC_G041K6UX.upload.maximum_size=32768
1823+
GenG0.menu.pnum.GENERIC_G041K6UX.upload.maximum_data_size=8192
1824+
GenG0.menu.pnum.GENERIC_G041K6UX.build.board=GENERIC_G041K6UX
1825+
GenG0.menu.pnum.GENERIC_G041K6UX.build.product_line=STM32G041xx
1826+
GenG0.menu.pnum.GENERIC_G041K6UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1827+
1828+
# Generic G041K8Ux
1829+
GenG0.menu.pnum.GENERIC_G041K8UX=Generic G041K8Ux
1830+
GenG0.menu.pnum.GENERIC_G041K8UX.upload.maximum_size=65536
1831+
GenG0.menu.pnum.GENERIC_G041K8UX.upload.maximum_data_size=8192
1832+
GenG0.menu.pnum.GENERIC_G041K8UX.build.board=GENERIC_G041K8UX
1833+
GenG0.menu.pnum.GENERIC_G041K8UX.build.product_line=STM32G041xx
1834+
GenG0.menu.pnum.GENERIC_G041K8UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)
1835+
17431836
# Generic G071R6Tx
17441837
GenG0.menu.pnum.GENERIC_G071R6TX=Generic G071R6Tx
17451838
GenG0.menu.pnum.GENERIC_G071R6TX.upload.maximum_size=32768

Diff for: ‎variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/generic_clock.c

+33-2
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,39 @@
2424
*/
2525
WEAK void SystemClock_Config(void)
2626
{
27-
/* SystemClock_Config can be generated by STM32CubeMX */
28-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
27+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
28+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
29+
30+
/* Configure the main internal regulator output voltage */
31+
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
32+
/*
33+
* Initializes the RCC Oscillators according to the specified parameters
34+
* in the RCC_OscInitTypeDef structure.
35+
*/
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
37+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
38+
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
39+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
41+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
42+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
43+
RCC_OscInitStruct.PLL.PLLN = 8;
44+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
45+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
46+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
47+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
48+
Error_Handler();
49+
}
50+
/* Initializes the CPU, AHB and APB buses clocks */
51+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
52+
| RCC_CLOCKTYPE_PCLK1;
53+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
54+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
55+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
56+
57+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
58+
Error_Handler();
59+
}
2960
}
3061

3162
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/ldscript.ld

+177
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,177 @@
1+
/**
2+
******************************************************************************
3+
* @file LinkerScript.ld
4+
* @author Auto-generated by STM32CubeIDE
5+
* Abstract : Linker script for NUCLEO-G031K8 Board embedding STM32G031K8Tx Device from stm32g0 series
6+
* 64Kbytes FLASH
7+
* 8Kbytes RAM
8+
*
9+
* Set heap size, stack size and stack location according
10+
* to application requirements.
11+
*
12+
* Set memory bank area and size if external memory is used
13+
******************************************************************************
14+
* @attention
15+
*
16+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
17+
* All rights reserved.</center></h2>
18+
*
19+
* This software component is licensed by ST under BSD 3-Clause license,
20+
* the "License"; You may not use this file except in compliance with the
21+
* License. You may obtain a copy of the License at:
22+
* opensource.org/licenses/BSD-3-Clause
23+
*
24+
******************************************************************************
25+
*/
26+
27+
/* Entry Point */
28+
ENTRY(Reset_Handler)
29+
30+
/* Highest address of the user mode stack */
31+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
32+
33+
_Min_Heap_Size = 0x200; /* required amount of heap */
34+
_Min_Stack_Size = 0x400; /* required amount of stack */
35+
36+
/* Memories definition */
37+
MEMORY
38+
{
39+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
40+
FLASH (rx) : ORIGIN = 0x8000000+ LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
41+
}
42+
43+
/* Sections */
44+
SECTIONS
45+
{
46+
/* The startup code into "FLASH" Rom type memory */
47+
.isr_vector :
48+
{
49+
. = ALIGN(4);
50+
KEEP(*(.isr_vector)) /* Startup code */
51+
. = ALIGN(4);
52+
} >FLASH
53+
54+
/* The program code and other data into "FLASH" Rom type memory */
55+
.text :
56+
{
57+
. = ALIGN(4);
58+
*(.text) /* .text sections (code) */
59+
*(.text*) /* .text* sections (code) */
60+
*(.glue_7) /* glue arm to thumb code */
61+
*(.glue_7t) /* glue thumb to arm code */
62+
*(.eh_frame)
63+
64+
KEEP (*(.init))
65+
KEEP (*(.fini))
66+
67+
. = ALIGN(4);
68+
_etext = .; /* define a global symbols at end of code */
69+
} >FLASH
70+
71+
/* Constant data into "FLASH" Rom type memory */
72+
.rodata :
73+
{
74+
. = ALIGN(4);
75+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
76+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
77+
. = ALIGN(4);
78+
} >FLASH
79+
80+
.ARM.extab : {
81+
. = ALIGN(4);
82+
*(.ARM.extab* .gnu.linkonce.armextab.*)
83+
. = ALIGN(4);
84+
} >FLASH
85+
86+
.ARM : {
87+
. = ALIGN(4);
88+
__exidx_start = .;
89+
*(.ARM.exidx*)
90+
__exidx_end = .;
91+
. = ALIGN(4);
92+
} >FLASH
93+
94+
.preinit_array :
95+
{
96+
. = ALIGN(4);
97+
PROVIDE_HIDDEN (__preinit_array_start = .);
98+
KEEP (*(.preinit_array*))
99+
PROVIDE_HIDDEN (__preinit_array_end = .);
100+
. = ALIGN(4);
101+
} >FLASH
102+
103+
.init_array :
104+
{
105+
. = ALIGN(4);
106+
PROVIDE_HIDDEN (__init_array_start = .);
107+
KEEP (*(SORT(.init_array.*)))
108+
KEEP (*(.init_array*))
109+
PROVIDE_HIDDEN (__init_array_end = .);
110+
. = ALIGN(4);
111+
} >FLASH
112+
113+
.fini_array :
114+
{
115+
. = ALIGN(4);
116+
PROVIDE_HIDDEN (__fini_array_start = .);
117+
KEEP (*(SORT(.fini_array.*)))
118+
KEEP (*(.fini_array*))
119+
PROVIDE_HIDDEN (__fini_array_end = .);
120+
. = ALIGN(4);
121+
} >FLASH
122+
123+
/* Used by the startup to initialize data */
124+
_sidata = LOADADDR(.data);
125+
126+
/* Initialized data sections into "RAM" Ram type memory */
127+
.data :
128+
{
129+
. = ALIGN(4);
130+
_sdata = .; /* create a global symbol at data start */
131+
*(.data) /* .data sections */
132+
*(.data*) /* .data* sections */
133+
*(.RamFunc) /* .RamFunc sections */
134+
*(.RamFunc*) /* .RamFunc* sections */
135+
136+
. = ALIGN(4);
137+
_edata = .; /* define a global symbol at data end */
138+
139+
} >RAM AT> FLASH
140+
141+
/* Uninitialized data section into "RAM" Ram type memory */
142+
. = ALIGN(4);
143+
.bss :
144+
{
145+
/* This is used by the startup in order to initialize the .bss section */
146+
_sbss = .; /* define a global symbol at bss start */
147+
__bss_start__ = _sbss;
148+
*(.bss)
149+
*(.bss*)
150+
*(COMMON)
151+
152+
. = ALIGN(4);
153+
_ebss = .; /* define a global symbol at bss end */
154+
__bss_end__ = _ebss;
155+
} >RAM
156+
157+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
158+
._user_heap_stack :
159+
{
160+
. = ALIGN(8);
161+
PROVIDE ( end = . );
162+
PROVIDE ( _end = . );
163+
. = . + _Min_Heap_Size;
164+
. = . + _Min_Stack_Size;
165+
. = ALIGN(8);
166+
} >RAM
167+
168+
/* Remove information from the compiler libraries */
169+
/DISCARD/ :
170+
{
171+
libc.a ( * )
172+
libm.a ( * )
173+
libgcc.a ( * )
174+
}
175+
176+
.ARM.attributes 0 : { *(.ARM.attributes) }
177+
}

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