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Update porting of Nucleo F401RE from @Adminius
Update ram size info Change SystemClock_Config --> copied from one example of Nucleo F401RE in CubeFw F4 Update PeripheralPins.c to avoid duplicated pins and comment pins used by Serial (allow to test with firmata) Quick tests: Blink AnalogReadSerialOut Firmata (Analog, I/O, PWM) I2C (thanks cishield read/Write on i2c eeprom) SPI (TFTdisplayBitmapLogo Signed-off-by: Frederic.Pillon <[email protected]>
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‎boards.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -112,9 +112,9 @@ Nucleo_64.menu.Nucleo_64_board.NUCLEO_F303RE.build.extra_flags=-DSTM32F303xE
112112
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE=Nucleo F401RE
113113
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.node=NODE_F401RE
114114
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.upload.maximum_size=524288
115-
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.upload.maximum_data_size=65536
115+
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.upload.maximum_data_size=98304
116116
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.mcu=cortex-m4
117-
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.f_cpu=8000000L
117+
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.f_cpu=84000000L
118118
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.usb_product="NUCLEO-F401RE"
119119
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.board=NUCLEO_F401RE
120120
Nucleo_64.menu.Nucleo_64_board.NUCLEO_F401RE.build.series=STM32F4xx

‎variants/NUCLEO_F401RE/PeripheralPins.c

+18-18
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,8 @@
4242
const PinMap PinMap_ADC[] = {
4343
{PA0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
4444
{PA1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
45-
{PA2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
46-
{PA3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
45+
// {PA2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
46+
// {PA3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
4747
{PA4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
4848
{PA5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
4949
{PA6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
@@ -95,33 +95,33 @@ const PinMap PinMap_PWM[] = {
9595
{PA0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
9696
{PA1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
9797
{PA1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
98-
{PA2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
99-
{PA2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
100-
{PA2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
101-
{PA3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
102-
{PA3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
103-
{PA3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
98+
// {PA2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
99+
// {PA2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
100+
// {PA2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
101+
// {PA3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
102+
// {PA3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
103+
// {PA3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
104104
{PA5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
105105
{PA6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
106106
{PA7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
107-
{PA7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
107+
// {PA7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
108108
{PA8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
109109
{PA9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
110110
{PA10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
111111
{PA11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
112112
{PA15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
113113
{PB0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
114-
{PB0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
114+
// {PB0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
115115
{PB1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
116-
{PB1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
116+
// {PB1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
117117
{PB3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
118118
{PB4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
119119
{PB5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
120120
{PB6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
121121
{PB7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
122-
{PB8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
122+
// {PB8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
123123
{PB8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
124-
{PB9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
124+
// {PB9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
125125
{PB9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
126126
{PB10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
127127
{PB13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
@@ -181,7 +181,7 @@ const PinMap PinMap_UART_CTS[] = {
181181
const PinMap PinMap_SPI_MOSI[] = {
182182
{PA7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
183183
{PB5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
184-
{PB5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
184+
// {PB5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
185185
{PB15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
186186
{PC3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
187187
{PC12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -193,7 +193,7 @@ const PinMap PinMap_SPI_MOSI[] = {
193193
const PinMap PinMap_SPI_MISO[] = {
194194
{PA6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
195195
{PB4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
196-
{PB4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
196+
// {PB4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
197197
{PB14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
198198
{PC2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
199199
{PC11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -205,7 +205,7 @@ const PinMap PinMap_SPI_MISO[] = {
205205
const PinMap PinMap_SPI_SCLK[] = {
206206
{PA5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
207207
{PB3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
208-
{PB3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
208+
// {PB3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
209209
{PB10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
210210
{PB13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
211211
{PC10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
@@ -216,9 +216,9 @@ const PinMap PinMap_SPI_SCLK[] = {
216216
#ifdef HAL_SPI_MODULE_ENABLED
217217
const PinMap PinMap_SPI_SSEL[] = {
218218
{PA4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
219-
{PA4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
219+
// {PA4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
220220
{PA15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
221-
{PA15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
221+
// {PA15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
222222
{PB9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
223223
{PB12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
224224
{NC, NP, 0}

‎variants/NUCLEO_F401RE/ldscript.ld

+37-50
Original file line numberDiff line numberDiff line change
@@ -1,61 +1,48 @@
1-
/**
2-
******************************************************************************
3-
* @file STM32F303RE_FLASH.h
4-
* @author WI6LABS
5-
* @version V1.0.0
6-
* @date 27-July-2016
7-
* @brief Linker script for STM32F401RE Device with
8-
* 512KByte FLASH, 96KByte RAM
9-
*
10-
* Set heap size, stack size and stack location according
11-
* to application requirements.
12-
*
13-
* Set memory bank area and size if external memory is used.
14-
*
15-
******************************************************************************
16-
* @attention
17-
*
18-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
19-
*
20-
* Redistribution and use in source and binary forms, with or without modification,
21-
* are permitted provided that the following conditions are met:
22-
* 1. Redistributions of source code must retain the above copyright notice,
23-
* this list of conditions and the following disclaimer.
24-
* 2. Redistributions in binary form must reproduce the above copyright notice,
25-
* this list of conditions and the following disclaimer in the documentation
26-
* and/or other materials provided with the distribution.
27-
* 3. Neither the name of STMicroelectronics nor the names of its contributors
28-
* may be used to endorse or promote products derived from this software
29-
* without specific prior written permission.
30-
*
31-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32-
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33-
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35-
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36-
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37-
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38-
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39-
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40-
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41-
*
42-
******************************************************************************
43-
*/
1+
/*
2+
*****************************************************************************
3+
**
4+
5+
** File : LinkerScript.ld
6+
**
7+
** Abstract : Linker script for STM32F401RETx Device with
8+
** 512KByte FLASH, 96KByte RAM
9+
**
10+
** Set heap size, stack size and stack location according
11+
** to application requirements.
12+
**
13+
** Set memory bank area and size if external memory is used.
14+
**
15+
** Target : STMicroelectronics STM32
16+
**
17+
**
18+
** Distribution: The file is distributed as is, without any warranty
19+
** of any kind.
20+
**
21+
** (c)Copyright Ac6.
22+
** You may use this file as-is or modify it according to the needs of your
23+
** project. Distribution of this file (unmodified or modified) is not
24+
** permitted. Ac6 permit registered System Workbench for MCU users the
25+
** rights to distribute the assembled, compiled & linked contents of this
26+
** file as part of an application binary file, provided that it is built
27+
** using the System Workbench for MCU toolchain.
28+
**
29+
*****************************************************************************
30+
*/
4431

4532
/* Entry Point */
4633
ENTRY(Reset_Handler)
4734

4835
/* Highest address of the user mode stack */
49-
_estack = 0x2000FFFF; /* end of RAM */
36+
_estack = 0x20018000; /* end of RAM */
5037
/* Generate a link error if heap and stack don't fit into RAM */
5138
_Min_Heap_Size = 0x200;; /* required amount of heap */
5239
_Min_Stack_Size = 0x400;; /* required amount of stack */
5340

5441
/* Specify the memory areas */
5542
MEMORY
5643
{
57-
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
58-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
44+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
45+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
5946
}
6047

6148
/* Define output sections */
@@ -70,7 +57,7 @@ SECTIONS
7057
} >FLASH
7158

7259
/* The program code and other data goes into FLASH */
73-
.text ALIGN(4):
60+
.text :
7461
{
7562
. = ALIGN(4);
7663
*(.text) /* .text sections (code) */
@@ -87,7 +74,7 @@ SECTIONS
8774
} >FLASH
8875

8976
/* Constant data goes into FLASH */
90-
.rodata ALIGN(4):
77+
.rodata :
9178
{
9279
. = ALIGN(4);
9380
*(.rodata) /* .rodata sections (constants, strings, etc.) */
@@ -158,12 +145,12 @@ SECTIONS
158145
/* User_heap_stack section, used to check that there is enough RAM left */
159146
._user_heap_stack :
160147
{
161-
. = ALIGN(4);
148+
. = ALIGN(8);
162149
PROVIDE ( end = . );
163150
PROVIDE ( _end = . );
164151
. = . + _Min_Heap_Size;
165152
. = . + _Min_Stack_Size;
166-
. = ALIGN(4);
153+
. = ALIGN(8);
167154
} >RAM
168155

169156

‎variants/NUCLEO_F401RE/variant.cpp

+35-38
Original file line numberDiff line numberDiff line change
@@ -125,26 +125,23 @@ void serialEventRun(void)
125125
#ifdef __cplusplus
126126
extern "C" {
127127
#endif
128-
/*
129-
void __libc_init_array(void);
130-
131-
uint32_t pinNametoPinNumber(PinName p)
132-
{
133-
uint32_t i = 0;
134-
for(i = 0; i < NUM_DIGITAL_PINS; i++) {
135-
if (digital_arduino[i] == p)
136-
break;
137-
}
138-
return i;
139-
}
140-
*/
141-
/*void init( void )
142-
{
143-
hw_config_init();
144-
}*/
145-
146128
/**
147129
* @brief System Clock Configuration
130+
* The system Clock is configured as follow :
131+
* System Clock source = PLL (HSI)
132+
* SYSCLK(Hz) = 84000000
133+
* HCLK(Hz) = 84000000
134+
* AHB Prescaler = 1
135+
* APB1 Prescaler = 2
136+
* APB2 Prescaler = 1
137+
* HSI Frequency(Hz) = 16000000
138+
* PLL_M = 16
139+
* PLL_N = 336
140+
* PLL_P = 4
141+
* PLL_Q = 7
142+
* VDD(V) = 3.3
143+
* Main regulator output voltage = Scale2 mode
144+
* Flash Latency(WS) = 2
148145
* @param None
149146
* @retval None
150147
*/
@@ -158,35 +155,35 @@ WEAK void SystemClock_Config(void)
158155

159156
/* The voltage scaling allows optimizing the power consumption when the device is
160157
clocked below the maximum system frequency, to update the voltage scaling value
161-
regarding system frequency refer to product datasheet. */
162-
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
158+
regarding system frequency refer to product datasheet. */
159+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
163160

164-
/* Enable HSE Oscillator and activate PLL with HSE as source */
165-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
166-
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
161+
/* Enable HSI Oscillator and activate PLL with HSI as source */
162+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
163+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
164+
RCC_OscInitStruct.HSICalibrationValue = 0x10;
167165
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
168-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
169-
RCC_OscInitStruct.PLL.PLLM = 8;
166+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
167+
RCC_OscInitStruct.PLL.PLLM = 16;
170168
RCC_OscInitStruct.PLL.PLLN = 336;
171-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
169+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
172170
RCC_OscInitStruct.PLL.PLLQ = 7;
173-
HAL_RCC_OscConfig(&RCC_OscInitStruct);
174-
171+
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
172+
{
173+
/* Initialization Error */
174+
while(1);
175+
}
175176
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
176177
clocks dividers */
177-
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
178-
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
178+
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
179179
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
180180
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
181-
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
182-
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
183-
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
184-
185-
/* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */
186-
if (HAL_GetREVID() == 0x1001)
181+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
182+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
183+
if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
187184
{
188-
/* Enable the Flash prefetch */
189-
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
185+
/* Initialization Error */
186+
while(1);
190187
}
191188
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
192189

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