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Added NUCLEO_F070RB
Supersede stm32duino#1167 Signed-off-by: Geoffrey Hunter <[email protected]> Co-authored-by: Frederic.Pillon <[email protected]>
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Diff for: ‎README.md

+2
Original file line numberDiff line numberDiff line change
@@ -87,6 +87,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | |
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| :yellow_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | **2.0.0** | |
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| :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | |
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| :green_heart: | STM32F091RC | [Nucleo F091RC](http://www.st.com/en/evaluation-tools/nucleo-f091rc.html) | *0.1.0* | |
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| :green_heart: | STM32F103RB | [Nucleo F103RB](http://www.st.com/en/evaluation-tools/nucleo-f103rb.html) | *0.2.0* | |
@@ -159,6 +160,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :yellow_heart: | STM32F042C4<br>STM32F042C6 | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F051K4U<br>STM32F051K6U<br>STM32F051K8U | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F070CB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F070RB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F072C8<br>STM32F072CB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F072R8<br>STM32F072RB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32F091RB<br>STM32F091RC | Generic Board | **2.0.0** | |

Diff for: ‎boards.txt

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Original file line numberDiff line numberDiff line change
@@ -203,6 +203,18 @@ Nucleo_64.menu.pnum.NUCLEO_F030R8.build.product_line=STM32F030x8
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Nucleo_64.menu.pnum.NUCLEO_F030R8.build.variant=STM32F0xx/Generic_F030R8
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Nucleo_64.menu.pnum.NUCLEO_F030R8.build.cmsis_lib_gcc=arm_cortexM0l_math
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# NUCLEO_F070RB board
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Nucleo_64.menu.pnum.NUCLEO_F070RB=Nucleo F070RB
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Nucleo_64.menu.pnum.NUCLEO_F070RB.node="NODE_F070RB,NUCLEO"
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Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_size=131072
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Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_data_size=16384
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.mcu=cortex-m0
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.board=NUCLEO_F070RB
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.series=STM32F0xx
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.product_line=STM32F070xB
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.variant=STM32F0xx/Generic_F070RB
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Nucleo_64.menu.pnum.NUCLEO_F070RB.build.cmsis_lib_gcc=arm_cortexM0l_math
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# NUCLEO_F072RB board
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Nucleo_64.menu.pnum.NUCLEO_F072RB=Nucleo F072RB
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Nucleo_64.menu.pnum.NUCLEO_F072RB.node="NODE_F072RB,NUCLEO"
@@ -924,6 +936,14 @@ GenF0.menu.pnum.GENERIC_F070CB.build.board=GENERIC_F070CB
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GenF0.menu.pnum.GENERIC_F070CB.build.product_line=STM32F070xB
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GenF0.menu.pnum.GENERIC_F070CB.build.variant=STM32F0xx/Generic_F070CB
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# Generic F070RB
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GenF0.menu.pnum.GENERIC_F070RB=Generic F070RB
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GenF0.menu.pnum.GENERIC_F070RB.upload.maximum_size=122880
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GenF0.menu.pnum.GENERIC_F070RB.upload.maximum_data_size=16384
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GenF0.menu.pnum.GENERIC_F070RB.build.board=GENERIC_F070RB
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GenF0.menu.pnum.GENERIC_F070RB.build.product_line=STM32F070xB
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GenF0.menu.pnum.GENERIC_F070RB.build.variant=STM32F0xx/Generic_F070RB
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# Generic F072C8
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GenF0.menu.pnum.GENERIC_F072C8=Generic F072C8
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GenF0.menu.pnum.GENERIC_F072C8.upload.maximum_size=65536

Diff for: ‎variants/STM32F0xx/Generic_F070RB/PeripheralPins.c

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@@ -0,0 +1,236 @@
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/*
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*******************************************************************************
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* Copyright (c) 2021, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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/*
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* Automatically generated from STM32F070RBTx.xml
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* CubeMX DB release 6.0.10
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*/
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#include "Arduino.h"
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#include "PeripheralPins.h"
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/* =====
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* Notes:
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* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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* HW peripheral instances. You can use them the same way as any other "normal"
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* pin (i.e. analogWrite(PA7_ALT1, 128);).
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*
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* - Commented lines are alternative possibilities which are not used per default.
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* If you change them, you will have to know what you do
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* =====
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*/
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//*** ADC ***
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#ifdef HAL_ADC_MODULE_ENABLED
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WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0
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{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1
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{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2
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{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3
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{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4
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{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5
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{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6
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{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7
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{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8
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{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9
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{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10
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{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11
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{PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC_IN12
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{PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC_IN13
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{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC_IN14
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{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC_IN15
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{NC, NP, 0}
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};
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#endif
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//*** No DAC ***
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//*** I2C ***
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#ifdef HAL_I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
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{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
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{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C2)},
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{PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SCL[] = {
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{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
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{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
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{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C2)},
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{PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)},
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{NC, NP, 0}
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};
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#endif
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//*** TIM ***
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#ifdef HAL_TIM_MODULE_ENABLED
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WEAK const PinMap PinMap_TIM[] = {
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{PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 1)}, // TIM15_CH1N
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{PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 1, 0)}, // TIM15_CH1
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{PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 2, 0)}, // TIM15_CH2
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{PA_4, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1
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{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
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{PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM16, 1, 0)}, // TIM16_CH1
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{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
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{PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
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{PA_7_ALT2, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1
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{PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM17, 1, 0)}, // TIM17_CH1
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{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1
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{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2
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{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
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{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4
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{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
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{PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3
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{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
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{PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4
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{PB_1_ALT2, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM14, 1, 0)}, // TIM14_CH1
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{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
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{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
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{PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 1)}, // TIM16_CH1N
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{PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 1)}, // TIM17_CH1N
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{PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1
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{PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1
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{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
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{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
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{PB_14_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 1, 0)}, // TIM15_CH1
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{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
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{PB_15_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM15, 1, 1)}, // TIM15_CH1N
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{PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 2, 0)}, // TIM15_CH2
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{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 1, 0)}, // TIM3_CH1
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{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 2, 0)}, // TIM3_CH2
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{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 3, 0)}, // TIM3_CH3
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{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 4, 0)}, // TIM3_CH4
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{NC, NP, 0}
119+
};
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#endif
121+
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//*** UART ***
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#ifdef HAL_UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_TX[] = {
126+
{PA_0, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
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{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
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{PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
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{PA_14, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
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{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
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{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
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{PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)},
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{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)},
134+
{PC_10_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)},
135+
{NC, NP, 0}
136+
};
137+
#endif
138+
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#ifdef HAL_UART_MODULE_ENABLED
140+
WEAK const PinMap PinMap_UART_RX[] = {
141+
{PA_1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
142+
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
143+
{PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
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{PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
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{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
146+
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
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{PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)},
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{PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)},
149+
{PC_11_ALT1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)},
150+
{NC, NP, 0}
151+
};
152+
#endif
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#ifdef HAL_UART_MODULE_ENABLED
155+
WEAK const PinMap PinMap_UART_RTS[] = {
156+
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
157+
{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
158+
{PA_15, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
159+
{PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
160+
{PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
161+
{PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)},
162+
{NC, NP, 0}
163+
};
164+
#endif
165+
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#ifdef HAL_UART_MODULE_ENABLED
167+
WEAK const PinMap PinMap_UART_CTS[] = {
168+
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
169+
{PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
170+
{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
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{PB_7, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)},
172+
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)},
173+
{NC, NP, 0}
174+
};
175+
#endif
176+
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//*** SPI ***
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#ifdef HAL_SPI_MODULE_ENABLED
180+
WEAK const PinMap PinMap_SPI_MOSI[] = {
181+
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
182+
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
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{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
184+
{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
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{NC, NP, 0}
186+
};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
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WEAK const PinMap PinMap_SPI_MISO[] = {
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{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
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{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
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{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
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{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)},
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{NC, NP, 0}
196+
};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
200+
WEAK const PinMap PinMap_SPI_SCLK[] = {
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{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
202+
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
203+
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
204+
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
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{NC, NP, 0}
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};
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#endif
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#ifdef HAL_SPI_MODULE_ENABLED
210+
WEAK const PinMap PinMap_SPI_SSEL[] = {
211+
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
212+
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
213+
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
214+
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)},
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{NC, NP, 0}
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};
217+
#endif
218+
219+
//*** No CAN ***
220+
221+
//*** No ETHERNET ***
222+
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//*** No QUADSPI ***
224+
225+
//*** USB ***
226+
227+
#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
228+
WEAK const PinMap PinMap_USB[] = {
229+
{PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM
230+
{PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP
231+
{PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE
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{NC, NP, 0}
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};
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#endif
235+
236+
//*** No SD ***

Diff for: ‎variants/STM32F0xx/Generic_F070RB/PinNamesVar.h

+46
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
/* Alternate pin name */
2+
PA_6_ALT1 = PA_6 | ALT1,
3+
PA_7_ALT1 = PA_7 | ALT1,
4+
PA_7_ALT2 = PA_7 | ALT2,
5+
PA_7_ALT3 = PA_7 | ALT3,
6+
PB_0_ALT1 = PB_0 | ALT1,
7+
PB_1_ALT1 = PB_1 | ALT1,
8+
PB_1_ALT2 = PB_1 | ALT2,
9+
PB_14_ALT1 = PB_14 | ALT1,
10+
PB_15_ALT1 = PB_15 | ALT1,
11+
PB_15_ALT2 = PB_15 | ALT2,
12+
PC_10_ALT1 = PC_10 | ALT1,
13+
PC_11_ALT1 = PC_11 | ALT1,
14+
15+
/* SYS_WKUP */
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#ifdef PWR_WAKEUP_PIN1
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SYS_WKUP1 = PA_0,
18+
#endif
19+
#ifdef PWR_WAKEUP_PIN2
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SYS_WKUP2 = PC_13,
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#endif
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#ifdef PWR_WAKEUP_PIN3
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SYS_WKUP3 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN4
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SYS_WKUP4 = PA_2,
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#endif
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#ifdef PWR_WAKEUP_PIN5
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SYS_WKUP5 = PC_5,
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#endif
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#ifdef PWR_WAKEUP_PIN6
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SYS_WKUP6 = PB_5,
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#endif
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#ifdef PWR_WAKEUP_PIN7
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SYS_WKUP7 = PB_15,
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#endif
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#ifdef PWR_WAKEUP_PIN8
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SYS_WKUP8 = NC,
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#endif
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/* USB */
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#ifdef USBCON
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USB_DM = PA_11,
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USB_DP = PA_12,
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USB_NOE = PA_13,
46+
#endif

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