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[variant] Add Generic G4xx
All specific G4 variants moved to the generic variant. Signed-off-by: Frederic Pillon <[email protected]>
1 parent d61905e commit 24c724a

24 files changed

+1273
-1877
lines changed

Diff for: README.md

+14
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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- [Generic STM32F1 boards](#generic-stm32f1-boards)
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- [Generic STM32F3 boards](#generic-stm32f3-boards)
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- [Generic STM32F4 boards](#generic-stm32f4-boards)
58+
- [Generic STM32G4 boards](#generic-stm32g4-boards)
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- [Generic STM32H7 boards](#generic-stm32h7-boards)
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- [Generic STM32L0 boards](#generic-stm32l0-boards)
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- [Generic STM32L4 boards](#generic-stm32l4-boards)
@@ -205,6 +206,19 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32F446RC<br>STM32F446RE | Generic Board | *1.9.0* | |
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| :green_heart: | STM32F411CE | [ThunderPack v1.1+](https://github.com/jgillick/ThunderPack) | *1.9.0* | |
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209+
### Generic STM32G4 boards
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211+
| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :yellow_heart: | STM32G431K6<br>STM32G431K8<br>STM32G431KB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G441KB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G431R6<br>STM32G431R8<br>STM32G431RB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G441RB | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G473RB<br>STM32G473RC<br>STM32G473RE | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G474RB<br>STM32G474RC<br>STM32G474RE | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G483RE | Generic Board | **2.0.0** | |
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| :yellow_heart: | STM32G484RE | Generic Board | **2.0.0** | |
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### Generic STM32H7 boards
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| Status | Device(s) | Name | Release | Notes |

Diff for: boards.txt

+284-15
Large diffs are not rendered by default.

Diff for: variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/generic_clock.c

+43-2
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,49 @@
2323
*/
2424
WEAK void SystemClock_Config(void)
2525
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
26+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
27+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
28+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
29+
30+
/** Configure the main internal regulator output voltage
31+
*/
32+
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
33+
/** Initializes the RCC Oscillators according to the specified parameters
34+
* in the RCC_OscInitTypeDef structure.
35+
*/
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
37+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
38+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
39+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
40+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
41+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
42+
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
43+
RCC_OscInitStruct.PLL.PLLN = 85;
44+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
45+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
46+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
47+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
48+
Error_Handler();
49+
}
50+
/** Initializes the CPU, AHB and APB buses clocks
51+
*/
52+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
53+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
54+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
55+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
56+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
57+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
58+
59+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
60+
Error_Handler();
61+
}
62+
/** Initializes the peripherals clocks
63+
*/
64+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
65+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
66+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
67+
Error_Handler();
68+
}
2869
}
2970

3071
#endif /* ARDUINO_GENERIC_* */

Diff for: variants/STM32G4xx/NUCLEO_G474RE/ldscript.ld renamed to variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/ldscript.ld

+41-64
Original file line numberDiff line numberDiff line change
@@ -1,68 +1,43 @@
1-
/*
2-
******************************************************************************
3-
**
4-
** File : LinkerScript.ld
5-
**
6-
** Author : Auto-generated by STM32CubeIDE
7-
**
8-
** Abstract : Linker script for NUCLEO-G474RE Board embedding STM32G474RETx Device from STM32G4 series
9-
** 512Kbytes FLASH
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** 128Kbytes RAM
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**
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** Set heap size, stack size and stack location according
13-
** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
16-
**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is without any warranty
20-
** of any kind.
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**
22-
*****************************************************************************
23-
** @attention
24-
**
25-
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
26-
**
27-
** Redistribution and use in source and binary forms, with or without modification,
28-
** are permitted provided that the following conditions are met:
29-
** 1. Redistributions of source code must retain the above copyright notice,
30-
** this list of conditions and the following disclaimer.
31-
** 2. Redistributions in binary form must reproduce the above copyright notice,
32-
** this list of conditions and the following disclaimer in the documentation
33-
** and/or other materials provided with the distribution.
34-
** 3. Neither the name of STMicroelectronics nor the names of its contributors
35-
** may be used to endorse or promote products derived from this software
36-
** without specific prior written permission.
37-
**
38-
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
39-
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40-
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41-
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
42-
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43-
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
44-
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
45-
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
46-
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47-
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48-
**
49-
*****************************************************************************
50-
*/
1+
/**
2+
******************************************************************************
3+
* @file LinkerScript.ld
4+
* @author Auto-generated by STM32CubeIDE
5+
* @brief Linker script for STM32G431KBTx Device from STM32G4 series
6+
* 128Kbytes FLASH
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* 32Kbytes RAM
8+
*
9+
* Set heap size, stack size and stack location according
10+
* to application requirements.
11+
*
12+
* Set memory bank area and size if external memory is used
13+
******************************************************************************
14+
* @attention
15+
*
16+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
17+
* All rights reserved.</center></h2>
18+
*
19+
* This software component is licensed by ST under BSD 3-Clause license,
20+
* the "License"; You may not use this file except in compliance with the
21+
* License. You may obtain a copy of the License at:
22+
* opensource.org/licenses/BSD-3-Clause
23+
*
24+
******************************************************************************
25+
*/
5126

5227
/* Entry Point */
5328
ENTRY(Reset_Handler)
5429

5530
/* Highest address of the user mode stack */
56-
_estack = 0x20020000; /* end of "RAM" Ram type memory */
31+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
5732

5833
_Min_Heap_Size = 0x200; /* required amount of heap */
5934
_Min_Stack_Size = 0x400; /* required amount of stack */
6035

6136
/* Memories definition */
6237
MEMORY
6338
{
64-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
65-
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K
39+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
40+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
6641
}
6742

6843
/* Sections */
@@ -102,12 +77,12 @@ SECTIONS
10277
. = ALIGN(4);
10378
} >FLASH
10479

105-
.ARM.extab : {
106-
. = ALIGN(4);
107-
*(.ARM.extab* .gnu.linkonce.armextab.*)
108-
. = ALIGN(4);
80+
.ARM.extab : {
81+
. = ALIGN(4);
82+
*(.ARM.extab* .gnu.linkonce.armextab.*)
83+
. = ALIGN(4);
10984
} >FLASH
110-
85+
11186
.ARM : {
11287
. = ALIGN(4);
11388
__exidx_start = .;
@@ -124,7 +99,7 @@ SECTIONS
12499
PROVIDE_HIDDEN (__preinit_array_end = .);
125100
. = ALIGN(4);
126101
} >FLASH
127-
102+
128103
.init_array :
129104
{
130105
. = ALIGN(4);
@@ -134,7 +109,7 @@ SECTIONS
134109
PROVIDE_HIDDEN (__init_array_end = .);
135110
. = ALIGN(4);
136111
} >FLASH
137-
112+
138113
.fini_array :
139114
{
140115
. = ALIGN(4);
@@ -149,23 +124,25 @@ SECTIONS
149124
_sidata = LOADADDR(.data);
150125

151126
/* Initialized data sections into "RAM" Ram type memory */
152-
.data :
127+
.data :
153128
{
154129
. = ALIGN(4);
155130
_sdata = .; /* create a global symbol at data start */
156131
*(.data) /* .data sections */
157132
*(.data*) /* .data* sections */
133+
*(.RamFunc) /* .RamFunc sections */
134+
*(.RamFunc*) /* .RamFunc* sections */
158135

159136
. = ALIGN(4);
160137
_edata = .; /* define a global symbol at data end */
161-
138+
162139
} >RAM AT> FLASH
163-
140+
164141
/* Uninitialized data section into "RAM" Ram type memory */
165142
. = ALIGN(4);
166143
.bss :
167144
{
168-
/* This is used by the startup in order to initialize the .bss secion */
145+
/* This is used by the startup in order to initialize the .bss section */
169146
_sbss = .; /* define a global symbol at bss start */
170147
__bss_start__ = _sbss;
171148
*(.bss)

Diff for: variants/STM32G4xx/NUCLEO_G431KB/variant_NUCLEO_G431KB.cpp renamed to variants/STM32G4xx/G431K(6-8-B)(T-U)_G441KB(T-U)/variant_NUCLEO_G431KB.cpp

+6-11
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*
22
*******************************************************************************
3-
* Copyright (c) 2019, STMicroelectronics
3+
* Copyright (c) 2019-2021, STMicroelectronics
44
* All rights reserved.
55
*
66
* This software component is licensed by ST under BSD 3-Clause license,
@@ -10,13 +10,10 @@
1010
*
1111
*******************************************************************************
1212
*/
13+
#if defined(ARDUINO_NUCLEO_G431KB)
1314

1415
#include "pins_arduino.h"
1516

16-
#ifdef __cplusplus
17-
extern "C" {
18-
#endif
19-
2017
// Pin number
2118
const PinName digitalPin[] = {
2219
PA_10, // D0
@@ -55,15 +52,11 @@ const uint32_t analogInputPin[] = {
5552
21 // A7
5653
};
5754

58-
#ifdef __cplusplus
59-
}
60-
#endif
61-
6255
// ----------------------------------------------------------------------------
6356

6457
#ifdef __cplusplus
6558
extern "C" {
66-
#endif
59+
#endif // __cplusplus
6760

6861
/**
6962
* @brief System Clock Configuration
@@ -104,5 +97,7 @@ WEAK void SystemClock_Config(void)
10497
}
10598

10699
#ifdef __cplusplus
107-
}
100+
} // extern "C"
108101
#endif
102+
103+
#endif /* ARDUINO_NUCLEO_G431KB */

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