|
| 1 | +/* |
| 2 | + ******************************************************************************* |
| 3 | + * Copyright (c) 2020-2021, STMicroelectronics |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * This software component is licensed by ST under BSD 3-Clause license, |
| 7 | + * the "License"; You may not use this file except in compliance with the |
| 8 | + * License. You may obtain a copy of the License at: |
| 9 | + * opensource.org/licenses/BSD-3-Clause |
| 10 | + * |
| 11 | + ******************************************************************************* |
| 12 | + */ |
| 13 | +/* |
| 14 | + * Automatically generated from STM32L412C8Tx.xml, STM32L412C8Ux.xml |
| 15 | + * STM32L412CBTx.xml, STM32L412CBUx.xml |
| 16 | + * STM32L422CBTx.xml, STM32L422CBUx.xml |
| 17 | + * CubeMX DB release 6.0.21 |
| 18 | + */ |
| 19 | +#if !defined(CUSTOM_PERIPHERAL_PINS) |
| 20 | +#include "Arduino.h" |
| 21 | +#include "PeripheralPins.h" |
| 22 | + |
| 23 | +/* ===== |
| 24 | + * Notes: |
| 25 | + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other |
| 26 | + * HW peripheral instances. You can use them the same way as any other "normal" |
| 27 | + * pin (i.e. analogWrite(PA7_ALT1, 128);). |
| 28 | + * |
| 29 | + * - Commented lines are alternative possibilities which are not used per default. |
| 30 | + * If you change them, you will have to know what you do |
| 31 | + * ===== |
| 32 | + */ |
| 33 | + |
| 34 | +//*** ADC *** |
| 35 | + |
| 36 | +#ifdef HAL_ADC_MODULE_ENABLED |
| 37 | +WEAK const PinMap PinMap_ADC[] = { |
| 38 | + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 |
| 39 | + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 |
| 40 | + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 |
| 41 | + {PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 |
| 42 | + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 |
| 43 | + {PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 |
| 44 | + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 |
| 45 | + {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 |
| 46 | + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 |
| 47 | + {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 |
| 48 | + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 |
| 49 | + {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 |
| 50 | + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 |
| 51 | + {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 |
| 52 | + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 |
| 53 | + {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 |
| 54 | + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 |
| 55 | + {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 |
| 56 | + {NC, NP, 0} |
| 57 | +}; |
| 58 | +#endif |
| 59 | + |
| 60 | +//*** No DAC *** |
| 61 | + |
| 62 | +//*** I2C *** |
| 63 | + |
| 64 | +#ifdef HAL_I2C_MODULE_ENABLED |
| 65 | +WEAK const PinMap PinMap_I2C_SDA[] = { |
| 66 | + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 67 | + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
| 68 | + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 69 | + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 70 | + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
| 71 | + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
| 72 | + {NC, NP, 0} |
| 73 | +}; |
| 74 | +#endif |
| 75 | + |
| 76 | +#ifdef HAL_I2C_MODULE_ENABLED |
| 77 | +WEAK const PinMap PinMap_I2C_SCL[] = { |
| 78 | + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, |
| 79 | + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 80 | + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 81 | + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, |
| 82 | + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
| 83 | + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, |
| 84 | + {NC, NP, 0} |
| 85 | +}; |
| 86 | +#endif |
| 87 | + |
| 88 | +//*** TIM *** |
| 89 | + |
| 90 | +#ifdef HAL_TIM_MODULE_ENABLED |
| 91 | +WEAK const PinMap PinMap_TIM[] = { |
| 92 | + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 |
| 93 | + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 |
| 94 | + {PA_1_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N |
| 95 | + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 |
| 96 | + {PA_2_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 |
| 97 | + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 |
| 98 | + {PA_3_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 |
| 99 | + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 |
| 100 | + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 |
| 101 | + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N |
| 102 | + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 |
| 103 | + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 |
| 104 | + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 |
| 105 | + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 |
| 106 | + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 |
| 107 | + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N |
| 108 | + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N |
| 109 | + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 |
| 110 | + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N |
| 111 | + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 |
| 112 | + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 |
| 113 | + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 |
| 114 | + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N |
| 115 | + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N |
| 116 | + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N |
| 117 | + {PB_14_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 |
| 118 | + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N |
| 119 | + {PB_15_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 |
| 120 | + {NC, NP, 0} |
| 121 | +}; |
| 122 | +#endif |
| 123 | + |
| 124 | +//*** UART *** |
| 125 | + |
| 126 | +#ifdef HAL_UART_MODULE_ENABLED |
| 127 | +WEAK const PinMap PinMap_UART_TX[] = { |
| 128 | + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 129 | + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
| 130 | + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 131 | + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 132 | + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 133 | + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 134 | + {NC, NP, 0} |
| 135 | +}; |
| 136 | +#endif |
| 137 | + |
| 138 | +#ifdef HAL_UART_MODULE_ENABLED |
| 139 | +WEAK const PinMap PinMap_UART_RX[] = { |
| 140 | + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 141 | + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
| 142 | + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 143 | + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, |
| 144 | + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 145 | + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 146 | + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 147 | + {NC, NP, 0} |
| 148 | +}; |
| 149 | +#endif |
| 150 | + |
| 151 | +#ifdef HAL_UART_MODULE_ENABLED |
| 152 | +WEAK const PinMap PinMap_UART_RTS[] = { |
| 153 | + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
| 154 | + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 155 | + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 156 | + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 157 | + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 158 | + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 159 | + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 160 | + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 161 | + {NC, NP, 0} |
| 162 | +}; |
| 163 | +#endif |
| 164 | + |
| 165 | +#ifdef HAL_UART_MODULE_ENABLED |
| 166 | +WEAK const PinMap PinMap_UART_CTS[] = { |
| 167 | + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, |
| 168 | + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 169 | + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 170 | + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 171 | + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, |
| 172 | + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, |
| 173 | + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, |
| 174 | + {NC, NP, 0} |
| 175 | +}; |
| 176 | +#endif |
| 177 | + |
| 178 | +//*** SPI *** |
| 179 | + |
| 180 | +#ifdef HAL_SPI_MODULE_ENABLED |
| 181 | +WEAK const PinMap PinMap_SPI_MOSI[] = { |
| 182 | + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 183 | + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 184 | + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 185 | + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 186 | + {NC, NP, 0} |
| 187 | +}; |
| 188 | +#endif |
| 189 | + |
| 190 | +#ifdef HAL_SPI_MODULE_ENABLED |
| 191 | +WEAK const PinMap PinMap_SPI_MISO[] = { |
| 192 | + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 193 | + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 194 | + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 195 | + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 196 | + {NC, NP, 0} |
| 197 | +}; |
| 198 | +#endif |
| 199 | + |
| 200 | +#ifdef HAL_SPI_MODULE_ENABLED |
| 201 | +WEAK const PinMap PinMap_SPI_SCLK[] = { |
| 202 | + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 203 | + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 204 | + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 205 | + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 206 | + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 207 | + {NC, NP, 0} |
| 208 | +}; |
| 209 | +#endif |
| 210 | + |
| 211 | +#ifdef HAL_SPI_MODULE_ENABLED |
| 212 | +WEAK const PinMap PinMap_SPI_SSEL[] = { |
| 213 | + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 214 | + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 215 | + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, |
| 216 | + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 217 | + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, |
| 218 | + {NC, NP, 0} |
| 219 | +}; |
| 220 | +#endif |
| 221 | + |
| 222 | +//*** No CAN *** |
| 223 | + |
| 224 | +//*** No ETHERNET *** |
| 225 | + |
| 226 | +//*** QUADSPI *** |
| 227 | + |
| 228 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 229 | +WEAK const PinMap PinMap_QUADSPI_DATA0[] = { |
| 230 | + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 |
| 231 | + {NC, NP, 0} |
| 232 | +}; |
| 233 | +#endif |
| 234 | + |
| 235 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 236 | +WEAK const PinMap PinMap_QUADSPI_DATA1[] = { |
| 237 | + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 |
| 238 | + {NC, NP, 0} |
| 239 | +}; |
| 240 | +#endif |
| 241 | + |
| 242 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 243 | +WEAK const PinMap PinMap_QUADSPI_DATA2[] = { |
| 244 | + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 |
| 245 | + {NC, NP, 0} |
| 246 | +}; |
| 247 | +#endif |
| 248 | + |
| 249 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 250 | +WEAK const PinMap PinMap_QUADSPI_DATA3[] = { |
| 251 | + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 |
| 252 | + {NC, NP, 0} |
| 253 | +}; |
| 254 | +#endif |
| 255 | + |
| 256 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 257 | +WEAK const PinMap PinMap_QUADSPI_SCLK[] = { |
| 258 | + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK |
| 259 | + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK |
| 260 | + {NC, NP, 0} |
| 261 | +}; |
| 262 | +#endif |
| 263 | + |
| 264 | +#ifdef HAL_QSPI_MODULE_ENABLED |
| 265 | +WEAK const PinMap PinMap_QUADSPI_SSEL[] = { |
| 266 | + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS |
| 267 | + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS |
| 268 | + {NC, NP, 0} |
| 269 | +}; |
| 270 | +#endif |
| 271 | + |
| 272 | +//*** USB *** |
| 273 | + |
| 274 | +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) |
| 275 | +WEAK const PinMap PinMap_USB[] = { |
| 276 | + {PA_11, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DM |
| 277 | + {PA_12, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DP |
| 278 | + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE |
| 279 | + {NC, NP, 0} |
| 280 | +}; |
| 281 | +#endif |
| 282 | + |
| 283 | +//*** No SD *** |
| 284 | + |
| 285 | +#endif /* !CUSTOM_PERIPHERAL_PINS */ |
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