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[variant] Add Generic F3xx
Signed-off-by: Alexandre Bourdiol <[email protected]>
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Diff for: ‎README.md

+5
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
200200

201201
| Status | Device(s) | Name | Release | Notes |
202202
| :----: | :-------: | ---- | :-----: | :---- |
203+
| :yellow_heart: | STM32F302R6<br>STM32F302R8 | Generic Board | **2.0.0** | |
204+
| :yellow_heart: | STM32F303CB<br>STM32F303CC | Generic Board | **2.0.0** | |
203205
| :green_heart: | STM32F303CC | [RobotDyn Black Pill](https://stm32-base.org/boards/STM32F303CCT6-RobotDyn-Black-Pill) | *1.6.1* | [More info](https://robotdyn.com/catalog/development-boards/stm-boards-and-shields.html) |
206+
| :yellow_heart: | STM32F303K6<br>STM32F303K8 | Generic Board | **2.0.0** | |
207+
| :yellow_heart: | STM32F303RD<br>STM32F303RE | Generic Board | **2.0.0** | |
208+
| :yellow_heart: | STM32F334K4<br>STM32F334K6<br>STM32F334K8 | Generic Board | **2.0.0** | |
204209

205210
### Generic STM32F4 boards
206211

Diff for: ‎boards.txt

+95-6
Original file line numberDiff line numberDiff line change
@@ -279,7 +279,7 @@ Nucleo_64.menu.pnum.NUCLEO_F302R8.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
279279
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.board=NUCLEO_F302R8
280280
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.series=STM32F3xx
281281
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.product_line=STM32F302x8
282-
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.variant=STM32F3xx/NUCLEO_F302R8
282+
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.variant=STM32F3xx/F302R(6-8)T
283283
Nucleo_64.menu.pnum.NUCLEO_F302R8.build.cmsis_lib_gcc=arm_cortexM4lf_math
284284

285285
# NUCLEO_F303RE board
@@ -292,7 +292,7 @@ Nucleo_64.menu.pnum.NUCLEO_F303RE.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
292292
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.board=NUCLEO_F303RE
293293
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.series=STM32F3xx
294294
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.product_line=STM32F303xE
295-
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/NUCLEO_F303RE
295+
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/F303R(D-E)T
296296
Nucleo_64.menu.pnum.NUCLEO_F303RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
297297

298298
# NUCLEO_F401RE board
@@ -530,7 +530,7 @@ Nucleo_32.menu.pnum.NUCLEO_F303K8.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
530530
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.board=NUCLEO_F303K8
531531
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.series=STM32F3xx
532532
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8
533-
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/NUCLEO_F303K8
533+
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
534534
Nucleo_32.menu.pnum.NUCLEO_F303K8.build.cmsis_lib_gcc=arm_cortexM4lf_math
535535

536536
# NUCLEO_G031K8 board
@@ -1549,8 +1549,96 @@ GenF3.menu.pnum.BLACKPILL_F303CC.upload.maximum_size=262144
15491549
GenF3.menu.pnum.BLACKPILL_F303CC.upload.maximum_data_size=40960
15501550
GenF3.menu.pnum.BLACKPILL_F303CC.build.board=BLACKPILL_F303CC
15511551
GenF3.menu.pnum.BLACKPILL_F303CC.build.product_line=STM32F303xC
1552-
GenF3.menu.pnum.BLACKPILL_F303CC.build.variant_h=variant_PILL_F303XX.h
1553-
GenF3.menu.pnum.BLACKPILL_F303CC.build.variant=STM32F3xx/PILL_F303XX
1552+
GenF3.menu.pnum.BLACKPILL_F303CC.build.variant_h=variant_{build.board}.h
1553+
GenF3.menu.pnum.BLACKPILL_F303CC.build.variant=STM32F3xx/F303C(B-C)T
1554+
1555+
# Generic F302R6Tx
1556+
GenF3.menu.pnum.GENERIC_F302R6TX=Generic F302R6Tx
1557+
GenF3.menu.pnum.GENERIC_F302R6TX.upload.maximum_size=32768
1558+
GenF3.menu.pnum.GENERIC_F302R6TX.upload.maximum_data_size=16384
1559+
GenF3.menu.pnum.GENERIC_F302R6TX.build.board=GENERIC_F302R6TX
1560+
GenF3.menu.pnum.GENERIC_F302R6TX.build.product_line=STM32F302x8
1561+
GenF3.menu.pnum.GENERIC_F302R6TX.build.variant=STM32F3xx/F302R(6-8)T
1562+
1563+
# Generic F302R8Tx
1564+
GenF3.menu.pnum.GENERIC_F302R8TX=Generic F302R8Tx
1565+
GenF3.menu.pnum.GENERIC_F302R8TX.upload.maximum_size=65536
1566+
GenF3.menu.pnum.GENERIC_F302R8TX.upload.maximum_data_size=16384
1567+
GenF3.menu.pnum.GENERIC_F302R8TX.build.board=GENERIC_F302R8TX
1568+
GenF3.menu.pnum.GENERIC_F302R8TX.build.product_line=STM32F302x8
1569+
GenF3.menu.pnum.GENERIC_F302R8TX.build.variant=STM32F3xx/F302R(6-8)T
1570+
1571+
# Generic F303CBTx
1572+
GenF3.menu.pnum.GENERIC_F303CBTX=Generic F303CBTx
1573+
GenF3.menu.pnum.GENERIC_F303CBTX.upload.maximum_size=131072
1574+
GenF3.menu.pnum.GENERIC_F303CBTX.upload.maximum_data_size=32768
1575+
GenF3.menu.pnum.GENERIC_F303CBTX.build.board=GENERIC_F303CBTX
1576+
GenF3.menu.pnum.GENERIC_F303CBTX.build.product_line=STM32F303xC
1577+
GenF3.menu.pnum.GENERIC_F303CBTX.build.variant=STM32F3xx/F303C(B-C)T
1578+
1579+
# Generic F303CCTx
1580+
GenF3.menu.pnum.GENERIC_F303CCTX=Generic F303CCTx
1581+
GenF3.menu.pnum.GENERIC_F303CCTX.upload.maximum_size=262144
1582+
GenF3.menu.pnum.GENERIC_F303CCTX.upload.maximum_data_size=40960
1583+
GenF3.menu.pnum.GENERIC_F303CCTX.build.board=GENERIC_F303CCTX
1584+
GenF3.menu.pnum.GENERIC_F303CCTX.build.product_line=STM32F303xC
1585+
GenF3.menu.pnum.GENERIC_F303CCTX.build.variant=STM32F3xx/F303C(B-C)T
1586+
1587+
# Generic F303K6Tx
1588+
GenF3.menu.pnum.GENERIC_F303K6TX=Generic F303K6Tx
1589+
GenF3.menu.pnum.GENERIC_F303K6TX.upload.maximum_size=32768
1590+
GenF3.menu.pnum.GENERIC_F303K6TX.upload.maximum_data_size=12288
1591+
GenF3.menu.pnum.GENERIC_F303K6TX.build.board=GENERIC_F303K6TX
1592+
GenF3.menu.pnum.GENERIC_F303K6TX.build.product_line=STM32F303x8
1593+
GenF3.menu.pnum.GENERIC_F303K6TX.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
1594+
1595+
# Generic F303K8Tx
1596+
GenF3.menu.pnum.GENERIC_F303K8TX=Generic F303K8Tx
1597+
GenF3.menu.pnum.GENERIC_F303K8TX.upload.maximum_size=65536
1598+
GenF3.menu.pnum.GENERIC_F303K8TX.upload.maximum_data_size=12288
1599+
GenF3.menu.pnum.GENERIC_F303K8TX.build.board=GENERIC_F303K8TX
1600+
GenF3.menu.pnum.GENERIC_F303K8TX.build.product_line=STM32F303x8
1601+
GenF3.menu.pnum.GENERIC_F303K8TX.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
1602+
1603+
# Generic F303RDTx
1604+
GenF3.menu.pnum.GENERIC_F303RDTX=Generic F303RDTx
1605+
GenF3.menu.pnum.GENERIC_F303RDTX.upload.maximum_size=393216
1606+
GenF3.menu.pnum.GENERIC_F303RDTX.upload.maximum_data_size=65536
1607+
GenF3.menu.pnum.GENERIC_F303RDTX.build.board=GENERIC_F303RDTX
1608+
GenF3.menu.pnum.GENERIC_F303RDTX.build.product_line=STM32F303xE
1609+
GenF3.menu.pnum.GENERIC_F303RDTX.build.variant=STM32F3xx/F303R(D-E)T
1610+
1611+
# Generic F303RETx
1612+
GenF3.menu.pnum.GENERIC_F303RETX=Generic F303RETx
1613+
GenF3.menu.pnum.GENERIC_F303RETX.upload.maximum_size=524288
1614+
GenF3.menu.pnum.GENERIC_F303RETX.upload.maximum_data_size=65536
1615+
GenF3.menu.pnum.GENERIC_F303RETX.build.board=GENERIC_F303RETX
1616+
GenF3.menu.pnum.GENERIC_F303RETX.build.product_line=STM32F303xE
1617+
GenF3.menu.pnum.GENERIC_F303RETX.build.variant=STM32F3xx/F303R(D-E)T
1618+
1619+
# Generic F334K4Tx
1620+
GenF3.menu.pnum.GENERIC_F334K4TX=Generic F334K4Tx
1621+
GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_size=16384
1622+
GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_data_size=12288
1623+
GenF3.menu.pnum.GENERIC_F334K4TX.build.board=GENERIC_F334K4TX
1624+
GenF3.menu.pnum.GENERIC_F334K4TX.build.product_line=STM32F334x8
1625+
GenF3.menu.pnum.GENERIC_F334K4TX.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
1626+
1627+
# Generic F334K6Tx
1628+
GenF3.menu.pnum.GENERIC_F334K6TX=Generic F334K6Tx
1629+
GenF3.menu.pnum.GENERIC_F334K6TX.upload.maximum_size=32768
1630+
GenF3.menu.pnum.GENERIC_F334K6TX.upload.maximum_data_size=12288
1631+
GenF3.menu.pnum.GENERIC_F334K6TX.build.board=GENERIC_F334K6TX
1632+
GenF3.menu.pnum.GENERIC_F334K6TX.build.product_line=STM32F334x8
1633+
GenF3.menu.pnum.GENERIC_F334K6TX.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
1634+
1635+
# Generic F334K8Tx
1636+
GenF3.menu.pnum.GENERIC_F334K8TX=Generic F334K8Tx
1637+
GenF3.menu.pnum.GENERIC_F334K8TX.upload.maximum_size=65536
1638+
GenF3.menu.pnum.GENERIC_F334K8TX.upload.maximum_data_size=12288
1639+
GenF3.menu.pnum.GENERIC_F334K8TX.build.board=GENERIC_F334K8TX
1640+
GenF3.menu.pnum.GENERIC_F334K8TX.build.product_line=STM32F334x8
1641+
GenF3.menu.pnum.GENERIC_F334K8TX.build.variant=STM32F3xx/F303K(6-8)T_F334K(4-6-8)T
15541642

15551643
# Upload menu
15561644
GenF3.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
@@ -4480,7 +4568,8 @@ GenFlight.menu.pnum.Sparky_V1.build.cmsis_lib_gcc=arm_cortexM4lf_math
44804568
GenFlight.menu.pnum.Sparky_V1.build.board=SPARKY_F303CC
44814569
GenFlight.menu.pnum.Sparky_V1.build.product_line=STM32F303xC
44824570
GenFlight.menu.pnum.Sparky_V1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
4483-
GenFlight.menu.pnum.Sparky_V1.build.variant=STM32F3xx/SPARKY_F303CC
4571+
GenFlight.menu.pnum.Sparky_V1.build.variant=STM32F3xx/F303C(B-C)T
4572+
GenFlight.menu.pnum.Sparky_V1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
44844573

44854574
# Upload menu
44864575
GenFlight.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)

Diff for: ‎variants/STM32F3xx/F302R(6-8)T/generic_clock.c

+65-2
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,72 @@
1919
* @retval None
2020
*/
2121
WEAK void SystemClock_Config(void)
22+
#if defined(USBCON)
2223
{
23-
/* SystemClock_Config can be generated by STM32CubeMX */
24-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
25+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
26+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
27+
28+
/** Initializes the RCC Oscillators according to the specified parameters
29+
* in the RCC_OscInitTypeDef structure.
30+
*/
31+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
32+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
33+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
34+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
35+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
36+
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
37+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
38+
Error_Handler();
39+
}
40+
/** Initializes the CPU, AHB and APB buses clocks
41+
*/
42+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
43+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
44+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
45+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
46+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
47+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
48+
49+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
50+
Error_Handler();
51+
}
52+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
53+
PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL;
54+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
55+
Error_Handler();
56+
}
57+
}
58+
#else
59+
{
60+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
61+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
62+
63+
/** Initializes the RCC Oscillators according to the specified parameters
64+
* in the RCC_OscInitTypeDef structure.
65+
*/
66+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
67+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
68+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
69+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
70+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
71+
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
72+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
73+
Error_Handler();
74+
}
75+
/** Initializes the CPU, AHB and APB buses clocks
76+
*/
77+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
78+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
79+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
80+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
81+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
82+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
83+
84+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
85+
Error_Handler();
86+
}
2587
}
88+
#endif /* USBCON */
2689

2790
#endif /* ARDUINO_GENERIC_* */

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