IDF release/v5.1 a9aea676e7

Author: me-no-dev

esp32/bin/bootloader_dio_40m.elf

@@ -436,6 +436,7 @@
 #define CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID 1
 #define CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT 1
 #define CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM 1
+#define CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM 1
 #define CONFIG_DAC_DMA_AUTO_16BIT_ALIGN 1
 #define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1
 #define CONFIG_EFUSE_MAX_BLK_LEN 192
@@ -771,6 +772,7 @@
 #define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
 #define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
 #define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
+#define CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM 1
 #define CONFIG_MQTT_PROTOCOL_311 1
 #define CONFIG_MQTT_TRANSPORT_SSL 1
 #define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
@@ -1082,5 +1084,5 @@
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
 #define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
-#define CONFIG_ARDUINO_IDF_COMMIT "d3c99ed3b8"
+#define CONFIG_ARDUINO_IDF_COMMIT "a9aea676e7"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v5.1"

esp32/bin/bootloader_dio_80m.elf

@@ -1 +1 @@
--DESP_PLATFORM -DIDF_VER=\"v5.1.1-1-gd3c99ed3b8-dirty\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY 
+-DESP_PLATFORM -DIDF_VER=\"v5.1.1-229-ga9aea676e7-dirty\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DUNITY_INCLUDE_CONFIG_H -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DconfigENABLE_FREERTOS_DEBUG_OCDAWARE=1 -DTF_LITE_STATIC_MEMORY 

esp32/bin/bootloader_qio_40m.elf

@@ -47,7 +47,6 @@ typedef enum {
     ESP_BT_STATUS_MEMORY_FULL   = 20,           /* relate to BT_STATUS_MEMORY_FULL in bt_def.h */
     ESP_BT_STATUS_EIR_TOO_LARGE,                /* relate to BT_STATUS_EIR_TOO_LARGE in bt_def.h */
     ESP_BT_STATUS_HCI_SUCCESS   = ESP_BT_STATUS_BASE_FOR_HCI_ERR,
-    ESP_BT_STATUS_HCI_PENDING,
     ESP_BT_STATUS_HCI_ILLEGAL_COMMAND,
     ESP_BT_STATUS_HCI_NO_CONNECTION,
     ESP_BT_STATUS_HCI_HW_FAILURE,

esp32/bin/bootloader_qio_80m.elf

@@ -106,6 +106,7 @@ typedef struct {
     bool                    fec_required;           /*!< FEC is required or not, true by default */
     bool                    include_txpower;        /*!< EIR data include TX power, false by default */
     bool                    include_uuid;           /*!< EIR data include UUID, false by default */
+    bool                    include_name;           /*!< EIR data include device name, true by default */
     uint8_t                 flag;                   /*!< EIR flags, see ESP_BT_EIR_FLAG for details, EIR will not include flag if it is 0, 0 by default */
     uint16_t                manufacturer_len;       /*!< Manufacturer data length, 0 by default */
     uint8_t                 *p_manufacturer_data;   /*!< Manufacturer data point */

esp32/dio_qspi/include/sdkconfig.h

@@ -125,7 +125,7 @@ typedef union {
     } search_res;                       /*!< Gatt client callback param of ESP_GATTC_SEARCH_RES_EVT */
 
     /**
-     * @brief ESP_GATTC_READ_CHAR_EVT,  ESP_GATTC_READ_DESCR_EVT
+     * @brief ESP_GATTC_READ_CHAR_EVT, ESP_GATTC_READ_DESCR_EVT, ESP_GATTC_READ_MULTIPLE_EVT, ESP_GATTC_READ_MULTI_VAR_EVT
      */
     struct gattc_read_char_evt_param {
 

esp32/flags/defines

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,7 +28,7 @@ bool rtc_gpio_is_valid_gpio(gpio_num_t gpio_num);
 
 #define RTC_GPIO_IS_VALID_GPIO(gpio_num) rtc_gpio_is_valid_gpio(gpio_num)
 
-#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+#if SOC_RTCIO_PIN_COUNT > 0
 /**
  * @brief Get RTC IO index number by gpio number.
  *
@@ -63,6 +63,7 @@ esp_err_t rtc_gpio_init(gpio_num_t gpio_num);
  */
 esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num);
 
+#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
 /**
  * @brief Get the RTC IO input level
  *
@@ -231,24 +232,6 @@ esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num);
  */
 esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num);
 
-/**
- * @brief Helper function to disconnect internal circuits from an RTC IO
- * This function disables input, output, pullup, pulldown, and enables
- * hold feature for an RTC IO.
- * Use this function if an RTC IO needs to be disconnected from internal
- * circuits in deep sleep, to minimize leakage current.
- *
- * In particular, for ESP32-WROVER module, call
- * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
- * deep sleep current.
- *
- * @param gpio_num GPIO number (e.g. GPIO_NUM_12).
- * @return
- *      - ESP_OK on success
- *      - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO
- */
-esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num);
-
 /**
  * @brief Enable force hold signal for all RTC IOs
  *
@@ -267,6 +250,26 @@ esp_err_t rtc_gpio_force_hold_dis_all(void);
 
 #endif // SOC_RTCIO_HOLD_SUPPORTED
 
+#if SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+/**
+ * @brief Helper function to disconnect internal circuits from an RTC IO
+ * This function disables input, output, pullup, pulldown, and enables
+ * hold feature for an RTC IO.
+ * Use this function if an RTC IO needs to be disconnected from internal
+ * circuits in deep sleep, to minimize leakage current.
+ *
+ * In particular, for ESP32-WROVER module, call
+ * rtc_gpio_isolate(GPIO_NUM_12) before entering deep sleep, to reduce
+ * deep sleep current.
+ *
+ * @param gpio_num GPIO number (e.g. GPIO_NUM_12).
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_INVALID_ARG if GPIO is not an RTC IO
+ */
+esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num);
+#endif // SOC_RTCIO_HOLD_SUPPORTED && SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
+
 #if SOC_RTCIO_WAKE_SUPPORTED
 
 /**
@@ -292,6 +295,8 @@ esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num);
 
 #endif // SOC_RTCIO_WAKE_SUPPORTED
 
+#endif // SOC_RTCIO_PIN_COUNT > 0
+
 #ifdef __cplusplus
 }
 #endif

esp32/include/bt/host/bluedroid/api/include/api/esp_bt_defs.h

@@ -24,6 +24,8 @@ typedef struct {
     gptimer_count_direction_t direction; /*!< Count direction */
     uint32_t resolution_hz;              /*!< Counter resolution (working frequency) in Hz,
                                               hence, the step size of each count tick equals to (1 / resolution_hz) seconds */
+    int intr_priority;                   /*!< GPTimer interrupt priority,
+                                              if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     struct {
         uint32_t intr_shared: 1;         /*!< Set true, the timer interrupt number can be shared with other peripherals */
     } flags;                             /*!< GPTimer config flags*/

esp32/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h

@@ -132,6 +132,8 @@ esp_err_t mcpwm_capture_timer_set_phase_on_sync(mcpwm_cap_timer_handle_t cap_tim
  */
 typedef struct {
     int gpio_num;                    /*!< GPIO used capturing input signal */
+    int intr_priority;               /*!< MCPWM capture interrupt priority,
+                                          if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     uint32_t prescale;               /*!< Prescale of input signal, effective frequency = cap_input_clk/prescale */
     struct {
         uint32_t pos_edge: 1;          /*!< Whether to capture on positive edge */

esp32/include/bt/host/bluedroid/api/include/api/esp_gattc_api.h

@@ -19,6 +19,8 @@ extern "C" {
  * @brief MCPWM comparator configuration
  */
 typedef struct {
+    int intr_priority;                  /*!< MCPWM comparator interrupt priority,
+                                             if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     struct {
         uint32_t update_cmp_on_tez: 1;  /*!< Whether to update compare value when timer count equals to zero (tez) */
         uint32_t update_cmp_on_tep: 1;  /*!< Whether to update compare value when timer count equals to peak (tep) */

esp32/include/driver/gpio/include/driver/rtc_io.h

@@ -20,8 +20,10 @@ extern "C" {
  * @brief MCPWM GPIO fault configuration structure
  */
 typedef struct {
-    int group_id; /*!< In which MCPWM group that the GPIO fault belongs to */
-    int gpio_num; /*!< GPIO used by the fault signal */
+    int group_id;                 /*!< In which MCPWM group that the GPIO fault belongs to */
+    int intr_priority;            /*!< MCPWM GPIO fault interrupt priority,
+                                       if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
+    int gpio_num;                 /*!< GPIO used by the fault signal */
     struct {
         uint32_t active_level: 1; /*!< On which level the fault signal is treated as active */
         uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */

esp32/include/driver/gptimer/include/driver/gptimer.h

@@ -24,6 +24,9 @@ typedef struct {
     struct {
         uint32_t invert_pwm: 1;   /*!< Whether to invert the PWM signal (done by GPIO matrix) */
         uint32_t io_loop_back: 1; /*!< For debug/test, the signal output from the GPIO will be fed to the input path as well */
+        uint32_t io_od_mode: 1;   /*!< Configure the GPIO as open-drain mode */
+        uint32_t pull_up: 1;      /*!< Whether to pull up internally */
+        uint32_t pull_down: 1;    /*!< Whether to pull down internally */
     } flags;                      /*!< Extra configuration flags for generator */
 } mcpwm_generator_config_t;
 

esp32/include/driver/mcpwm/include/driver/mcpwm_cap.h

@@ -19,7 +19,9 @@ extern "C" {
  * @brief MCPWM operator configuration
  */
 typedef struct {
-    int group_id; /*!< Specify from which group to allocate the MCPWM operator */
+    int group_id;                              /*!< Specify from which group to allocate the MCPWM operator */
+    int intr_priority;                         /*!< MCPWM operator interrupt priority,
+                                                    if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     struct {
         uint32_t update_gen_action_on_tez: 1;  /*!< Whether to update generator action when timer counts to zero */
         uint32_t update_gen_action_on_tep: 1;  /*!< Whether to update generator action when timer counts to peak */
@@ -135,6 +137,7 @@ esp_err_t mcpwm_operator_register_event_callbacks(mcpwm_oper_handle_t oper, cons
  * @brief MCPWM carrier configuration structure
  */
 typedef struct {
+    mcpwm_carrier_clock_source_t clk_src;  /*!< MCPWM carrier clock source */
     uint32_t frequency_hz;            /*!< Carrier frequency in Hz */
     uint32_t first_pulse_duration_us; /*!< The duration of the first PWM pulse, in us */
     float duty_cycle;                 /*!< Carrier duty cycle */

esp32/include/driver/mcpwm/include/driver/mcpwm_cmpr.h

@@ -35,6 +35,8 @@ typedef struct {
                                               The step size of each count tick equals to (1 / resolution_hz) seconds */
     mcpwm_timer_count_mode_t count_mode; /*!< Count mode */
     uint32_t period_ticks;               /*!< Number of count ticks within a period */
+    int intr_priority;                   /*!< MCPWM timer interrupt priority,
+                                              if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     struct {
         uint32_t update_period_on_empty: 1; /*!< Whether to update period when timer counts to zero */
         uint32_t update_period_on_sync: 1;  /*!< Whether to update period on sync event */

esp32/include/driver/mcpwm/include/driver/mcpwm_fault.h

@@ -59,8 +59,10 @@ typedef struct {
  * @brief PCNT unit configuration
  */
 typedef struct {
-    int low_limit;  /*!< Low limitation of the count unit, should be lower than 0 */
-    int high_limit; /*!< High limitation of the count unit, should be higher than 0 */
+    int low_limit;      /*!< Low limitation of the count unit, should be lower than 0 */
+    int high_limit;     /*!< High limitation of the count unit, should be higher than 0 */
+    int intr_priority;  /*!< PCNT interrupt priority,
+                            if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
     struct {
         uint32_t accum_count: 1; /*!< Whether to accumulate the count value when overflows at the high/low limit */
     } flags;       /*!< Extra flags */

esp32/include/driver/mcpwm/include/driver/mcpwm_gen.h

@@ -304,7 +304,7 @@ void esp_intr_disable_source(int inum);
  */
 static inline int esp_intr_flags_to_level(int flags)
 {
-    return __builtin_ffs((flags & ESP_INTR_FLAG_LEVELMASK) >> 1) + 1;
+    return __builtin_ffs((flags & ESP_INTR_FLAG_LEVELMASK) >> 1);
 }
 
 /**@}*/

esp32/include/driver/mcpwm/include/driver/mcpwm_oper.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -26,10 +26,21 @@ typedef void (*esp_deep_sleep_cb_t)(void);
 /**
  * @brief Logic function used for EXT1 wakeup mode.
  */
+#if SOC_PM_SUPPORT_EXT1_WAKEUP
+#if CONFIG_IDF_TARGET_ESP32
 typedef enum {
     ESP_EXT1_WAKEUP_ALL_LOW = 0,    //!< Wake the chip when all selected GPIOs go low
     ESP_EXT1_WAKEUP_ANY_HIGH = 1    //!< Wake the chip when any of the selected GPIOs go high
 } esp_sleep_ext1_wakeup_mode_t;
+#else
+typedef enum {
+    ESP_EXT1_WAKEUP_ANY_LOW = 0,    //!< Wake the chip when any of the selected GPIOs go low
+    ESP_EXT1_WAKEUP_ANY_HIGH = 1,    //!< Wake the chip when any of the selected GPIOs go high
+    ESP_EXT1_WAKEUP_ALL_LOW __attribute__((deprecated("wakeup mode \"ALL_LOW\" is no longer supported after ESP32, \
+    please use ESP_EXT1_WAKEUP_ANY_LOW instead"))) = ESP_EXT1_WAKEUP_ANY_LOW
+} esp_sleep_ext1_wakeup_mode_t;
+#endif
+#endif
 
 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
 typedef enum {
@@ -250,18 +261,27 @@ esp_err_t esp_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level);
  * @note Internal pullups and pulldowns don't work when RTC peripherals are
  *       shut down. In this case, external resistors need to be added.
  *       Alternatively, RTC peripherals (and pullups/pulldowns) may be
- *       kept enabled using esp_sleep_pd_config function.
+ *       kept enabled using esp_sleep_pd_config function. If we turn off the
+ *       ``RTC_PERIPH`` domain or certain chips lack the ``RTC_PERIPH`` domain,
+ *       we will use the HOLD feature to maintain the pull-up and pull-down on
+ *       the pins during sleep. HOLD feature will be acted on the pin internally
+ *       before the system entering sleep, and this can further reduce power consumption.
  *
  * @param mask  bit mask of GPIO numbers which will cause wakeup. Only GPIOs
  *              which have RTC functionality can be used in this bit map.
  *              For different SoCs, the related GPIOs are:
- *                - ESP32: 0, 2, 4, 12-15, 25-27, 32-39;
- *                - ESP32-S2: 0-21;
- *                - ESP32-S3: 0-21.
- *                - ESP32-C6: 0-7.
+ *                - ESP32: 0, 2, 4, 12-15, 25-27, 32-39
+ *                - ESP32-S2: 0-21
+ *                - ESP32-S3: 0-21
+ *                - ESP32-C6: 0-7
+ *                - ESP32-H2: 7-14
  * @param mode select logic function used to determine wakeup condition:
- *            - ESP_EXT1_WAKEUP_ALL_LOW: wake up when all selected GPIOs are low
- *            - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high
+ *             When target chip is ESP32:
+ *                - ESP_EXT1_WAKEUP_ALL_LOW: wake up when all selected GPIOs are low
+ *                - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high
+ *             When target chip is ESP32-S2, ESP32-S3, ESP32-C6 or ESP32-H2:
+ *                - ESP_EXT1_WAKEUP_ANY_LOW: wake up when any of the selected GPIOs is low
+ *                - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high
  * @return
  *      - ESP_OK on success
  *      - ESP_ERR_INVALID_ARG if any of the selected GPIOs is not an RTC GPIO,
@@ -415,9 +435,12 @@ esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain,
 /**
  * @brief Enter deep sleep with the configured wakeup options
  *
- * This function does not return.
+ * @note In general, the function does not return, but if the sleep is rejected,
+ * then it returns from it.
+ *
+ * The reason for the rejection can be such as a short sleep time.
  */
-void esp_deep_sleep_start(void) __attribute__((__noreturn__));
+void esp_deep_sleep_start(void);
 
 /**
  * @brief Enter light sleep with the configured wakeup options
@@ -441,9 +464,14 @@ esp_err_t esp_light_sleep_start(void);
  * Call to this function is equivalent to a call to esp_deep_sleep_enable_timer_wakeup
  * followed by a call to esp_deep_sleep_start.
  *
+ * @note In general, the function does not return, but if the sleep is rejected,
+ * then it returns from it.
+ *
+ * The reason for the rejection can be such as a short sleep time.
+ *
  * @param time_in_us  deep-sleep time, unit: microsecond
  */
-void esp_deep_sleep(uint64_t time_in_us) __attribute__((__noreturn__));
+void esp_deep_sleep(uint64_t time_in_us);
 
 
 /**

esp32/include/driver/mcpwm/include/driver/mcpwm_timer.h

@@ -136,6 +136,7 @@ typedef struct {
     struct {
         unsigned int dc_low_on_data: 1;  /*!< If this flag is enabled, DC line = 0 means transfer data, DC line = 1 means transfer command; vice versa */
         unsigned int octal_mode: 1;      /*!< transmit with octal mode (8 data lines), this mode is used to simulate Intel 8080 timing */
+        unsigned int quad_mode: 1;       /*!< transmit with quad mode (4 data lines), this mode is useful when transmitting LCD parameters (Only use one line for command) */
         unsigned int sio_mode: 1; /*!< Read and write through a single data line (MOSI) */
         unsigned int lsb_first: 1;       /*!< transmit LSB bit first */
         unsigned int cs_high_active: 1;  /*!< CS line is high active */

esp32/include/driver/pcnt/include/driver/pulse_cnt.h

@@ -99,14 +99,25 @@ typedef bool (*esp_lcd_rgb_panel_vsync_cb_t)(esp_lcd_panel_handle_t panel, const
  */
 typedef bool (*esp_lcd_rgb_panel_bounce_buf_fill_cb_t)(esp_lcd_panel_handle_t panel, void *bounce_buf, int pos_px, int len_bytes, void *user_ctx);
 
+/**
+ * @brief Prototype for the function to be called when the bounce buffer finish copying the entire frame.
+ *
+ * @param[in] panel LCD panel handle, returned from `esp_lcd_new_rgb_panel`
+ * @param[in] edata Panel event data, fed by driver
+ * @param[in] user_ctx User data, passed from `esp_lcd_rgb_panel_register_event_callbacks()`
+ * @return Whether a high priority task has been waken up by this function
+ */
+typedef bool (*esp_lcd_rgb_panel_bounce_buf_finish_cb_t)(esp_lcd_panel_handle_t panel, const esp_lcd_rgb_panel_event_data_t *edata, void *user_ctx);
+
 /**
  * @brief Group of supported RGB LCD panel callbacks
  * @note The callbacks are all running under ISR environment
  * @note When CONFIG_LCD_RGB_ISR_IRAM_SAFE is enabled, the callback itself and functions called by it should be placed in IRAM.
  */
 typedef struct {
-    esp_lcd_rgb_panel_vsync_cb_t on_vsync;                  /*!< VSYNC event callback */
-    esp_lcd_rgb_panel_bounce_buf_fill_cb_t on_bounce_empty; /*!< Bounce buffer empty callback. */
+    esp_lcd_rgb_panel_vsync_cb_t on_vsync;                      /*!< VSYNC event callback */
+    esp_lcd_rgb_panel_bounce_buf_fill_cb_t on_bounce_empty;     /*!< Bounce buffer empty callback. */
+    esp_lcd_rgb_panel_bounce_buf_finish_cb_t on_bounce_frame_finish;  /*!< Bounce buffer finish callback. */
 } esp_lcd_rgb_panel_event_callbacks_t;
 
 /**

esp32/include/esp_hw_support/include/esp_intr_alloc.h

@@ -51,6 +51,7 @@ extern "C" {
   *     LP_AON_STORE6_REG     FAST_RTC_MEMORY_ENTRY
   *     LP_AON_STORE7_REG     FAST_RTC_MEMORY_CRC
   *     LP_AON_STORE8_REG     Store light sleep wake stub addr
+  *     LP_AON_STORE9_REG     Store the sleep mode at bit[0]  (0:light sleep 1:deep sleep)
   *************************************************************************************
   */
 
@@ -63,6 +64,7 @@ extern "C" {
 #define RTC_RESET_CAUSE_REG     LP_AON_STORE6_REG
 #define RTC_MEMORY_CRC_REG      LP_AON_STORE7_REG
 #define LIGHT_SLEEP_WAKE_STUB_ADDR_REG  LP_AON_STORE8_REG
+#define SLEEP_MODE_REG          LP_AON_STORE9_REG
 
 #define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
 

esp32/include/esp_hw_support/include/esp_sleep.h

@@ -19,7 +19,7 @@ extern "C" {
 #endif
 
 extern bool g_panic_abort;
-
+extern char *g_panic_abort_details;
 extern void *g_exc_frames[SOC_CPU_CORES_NUM];
 
 // Function to print longer amounts of information such as the details