From e7ec21814324ca1141ecc01c4e092fd0d3bc79fd Mon Sep 17 00:00:00 2001 From: Rodrigo Garcia Date: Tue, 7 May 2024 17:36:31 -0300 Subject: [PATCH 1/2] RTC reserves 512 only --- configs/defconfig.esp32s3 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/defconfig.esp32s3 b/configs/defconfig.esp32s3 index 463e145b3..2c2cba3cd 100644 --- a/configs/defconfig.esp32s3 +++ b/configs/defconfig.esp32s3 @@ -16,4 +16,4 @@ CONFIG_ULP_COPROC_ENABLED=y # Choose FSM or RISCV exclusively! Never both. CONFIG_ULP_COPROC_TYPE_FSM=y # CONFIG_ULP_COPROC_TYPE_RISCV=y -CONFIG_ULP_COPROC_RESERVE_MEM=4096 +CONFIG_ULP_COPROC_RESERVE_MEM=512 From 477cc881f60aabaa74622ac96be28e66cefb4e77 Mon Sep 17 00:00:00 2001 From: Rodrigo Garcia Date: Tue, 7 May 2024 17:36:53 -0300 Subject: [PATCH 2/2] RTC reserves 512 only --- configs/defconfig.esp32s2 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/defconfig.esp32s2 b/configs/defconfig.esp32s2 index 9b25bfafe..3b0af548a 100644 --- a/configs/defconfig.esp32s2 +++ b/configs/defconfig.esp32s2 @@ -14,4 +14,4 @@ CONFIG_ULP_COPROC_ENABLED=y # Choose FSM or RISCV exclusively! Never both. CONFIG_ULP_COPROC_TYPE_FSM=y # CONFIG_ULP_COPROC_TYPE_RISCV=y -CONFIG_ULP_COPROC_RESERVE_MEM=4096 +CONFIG_ULP_COPROC_RESERVE_MEM=512