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1 parent bfe5450 commit c0924e2Copy full SHA for c0924e2
configs/defconfig.esp32s3
@@ -9,12 +9,11 @@ CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO=y
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CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
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CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=3120
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
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-# ULP Setting for IDF 4.x
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-CONFIG_ESP32S3_ULP_COPROC_ENABLED=y
+
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# ULP Setting for IDF 5.x
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CONFIG_ULP_COPROC_ENABLED=y
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-# end of ULP COPROC_ENABLE
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-# Is it FSM or RISCV exclusively?
+# end of ULP COPROC_ENABLE
+# Choose FSM or RISCV exclusively! Never both.
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CONFIG_ULP_COPROC_TYPE_FSM=y
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# CONFIG_ULP_COPROC_TYPE_RISCV=y
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CONFIG_ULP_COPROC_RESERVE_MEM=4096
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