|
| 1 | +diff --git a/components/hal/esp32/include/hal/i2s_ll.h b/components/hal/esp32/include/hal/i2s_ll.h |
| 2 | +index fff68feaca..144ae402c3 100644 |
| 3 | +--- a/components/hal/esp32/include/hal/i2s_ll.h |
| 4 | ++++ b/components/hal/esp32/include/hal/i2s_ll.h |
| 5 | +@@ -24,7 +24,6 @@ |
| 6 | + |
| 7 | + #include <stdbool.h> |
| 8 | + #include "hal/misc.h" |
| 9 | +-#include "hal/assert.h" |
| 10 | + #include "soc/i2s_periph.h" |
| 11 | + #include "soc/i2s_struct.h" |
| 12 | + #include "hal/i2s_types.h" |
| 13 | +@@ -689,57 +688,22 @@ static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enab |
| 14 | + * @brief Set I2S tx chan mode |
| 15 | + * |
| 16 | + * @param hw Peripheral I2S hardware instance address. |
| 17 | +- * @param chan_fmt The channel format of the TX channel |
| 18 | +- */ |
| 19 | +-static inline void i2s_ll_tx_set_chan_mod(i2s_dev_t *hw, i2s_channel_fmt_t chan_fmt) |
| 20 | +-{ |
| 21 | +- switch (chan_fmt) { |
| 22 | +- case I2S_CHANNEL_FMT_ALL_RIGHT: |
| 23 | +- hw->conf_chan.tx_chan_mod = 1; |
| 24 | +- break; |
| 25 | +- case I2S_CHANNEL_FMT_ONLY_RIGHT: |
| 26 | +- hw->conf_chan.tx_chan_mod = 3; |
| 27 | +- break; |
| 28 | +- case I2S_CHANNEL_FMT_ALL_LEFT: |
| 29 | +- hw->conf_chan.tx_chan_mod = 2; |
| 30 | +- break; |
| 31 | +- case I2S_CHANNEL_FMT_ONLY_LEFT: |
| 32 | +- hw->conf_chan.tx_chan_mod = 4; |
| 33 | +- break; |
| 34 | +- case I2S_CHANNEL_FMT_RIGHT_LEFT: |
| 35 | +- hw->conf_chan.tx_chan_mod = 0; |
| 36 | +- break; |
| 37 | +- default: |
| 38 | +- HAL_ASSERT(false); |
| 39 | +- } |
| 40 | ++ * @param val value to set tx chan mode |
| 41 | ++ */ |
| 42 | ++static inline void i2s_ll_tx_set_chan_mod(i2s_dev_t *hw, uint32_t val) |
| 43 | ++{ |
| 44 | ++ hw->conf_chan.tx_chan_mod = val; |
| 45 | + } |
| 46 | + |
| 47 | + /** |
| 48 | + * @brief Set I2S rx chan mode |
| 49 | + * |
| 50 | + * @param hw Peripheral I2S hardware instance address. |
| 51 | +- * @param chan_fmt The channel format of the RX channel |
| 52 | +- * @param is_msb_right Is msb_right enabled, if it does, we need to flip the channel |
| 53 | +- */ |
| 54 | +-static inline void i2s_ll_rx_set_chan_mod(i2s_dev_t *hw, i2s_channel_fmt_t chan_fmt, bool is_msb_right) |
| 55 | +-{ |
| 56 | +- switch (chan_fmt) { |
| 57 | +- case I2S_CHANNEL_FMT_ALL_RIGHT: |
| 58 | +- /* fall through */ |
| 59 | +- case I2S_CHANNEL_FMT_ONLY_RIGHT: |
| 60 | +- hw->conf_chan.rx_chan_mod = is_msb_right ? 1 : 2; |
| 61 | +- break; |
| 62 | +- case I2S_CHANNEL_FMT_ALL_LEFT: |
| 63 | +- /* fall through */ |
| 64 | +- case I2S_CHANNEL_FMT_ONLY_LEFT: |
| 65 | +- hw->conf_chan.rx_chan_mod = is_msb_right ? 2 : 1; |
| 66 | +- break; |
| 67 | +- case I2S_CHANNEL_FMT_RIGHT_LEFT: |
| 68 | +- hw->conf_chan.rx_chan_mod = 0; |
| 69 | +- break; |
| 70 | +- default: |
| 71 | +- HAL_ASSERT(false); |
| 72 | +- } |
| 73 | ++ * @param val value to set rx chan mode |
| 74 | ++ */ |
| 75 | ++static inline void i2s_ll_rx_set_chan_mod(i2s_dev_t *hw, uint32_t val) |
| 76 | ++{ |
| 77 | ++ hw->conf_chan.rx_chan_mod = val; |
| 78 | + } |
| 79 | + |
| 80 | + /** |
| 81 | +diff --git a/components/hal/esp32s2/include/hal/i2s_ll.h b/components/hal/esp32s2/include/hal/i2s_ll.h |
| 82 | +index 5bd0daa7fb..521c5e70dc 100644 |
| 83 | +--- a/components/hal/esp32s2/include/hal/i2s_ll.h |
| 84 | ++++ b/components/hal/esp32s2/include/hal/i2s_ll.h |
| 85 | +@@ -24,7 +24,6 @@ |
| 86 | + |
| 87 | + #include <stdbool.h> |
| 88 | + #include "hal/misc.h" |
| 89 | +-#include "hal/assert.h" |
| 90 | + #include "soc/i2s_periph.h" |
| 91 | + #include "soc/i2s_struct.h" |
| 92 | + #include "hal/i2s_types.h" |
| 93 | +@@ -765,57 +764,22 @@ static inline void i2s_ll_rx_enable_msb_shift(i2s_dev_t *hw, bool msb_shift_enab |
| 94 | + * @brief Set I2S tx chan mode |
| 95 | + * |
| 96 | + * @param hw Peripheral I2S hardware instance address. |
| 97 | +- * @param chan_fmt The channel format of the TX channel |
| 98 | +- */ |
| 99 | +-static inline void i2s_ll_tx_set_chan_mod(i2s_dev_t *hw, i2s_channel_fmt_t chan_fmt) |
| 100 | +-{ |
| 101 | +- switch (chan_fmt) { |
| 102 | +- case I2S_CHANNEL_FMT_ALL_RIGHT: |
| 103 | +- hw->conf_chan.tx_chan_mod = 1; |
| 104 | +- break; |
| 105 | +- case I2S_CHANNEL_FMT_ONLY_RIGHT: |
| 106 | +- hw->conf_chan.tx_chan_mod = 3; |
| 107 | +- break; |
| 108 | +- case I2S_CHANNEL_FMT_ALL_LEFT: |
| 109 | +- hw->conf_chan.tx_chan_mod = 2; |
| 110 | +- break; |
| 111 | +- case I2S_CHANNEL_FMT_ONLY_LEFT: |
| 112 | +- hw->conf_chan.tx_chan_mod = 4; |
| 113 | +- break; |
| 114 | +- case I2S_CHANNEL_FMT_RIGHT_LEFT: |
| 115 | +- hw->conf_chan.tx_chan_mod = 0; |
| 116 | +- break; |
| 117 | +- default: |
| 118 | +- HAL_ASSERT(false); |
| 119 | +- } |
| 120 | ++ * @param val value to set tx chan mode |
| 121 | ++ */ |
| 122 | ++static inline void i2s_ll_tx_set_chan_mod(i2s_dev_t *hw, uint32_t val) |
| 123 | ++{ |
| 124 | ++ hw->conf_chan.tx_chan_mod = val; |
| 125 | + } |
| 126 | + |
| 127 | + /** |
| 128 | + * @brief Set I2S rx chan mode |
| 129 | + * |
| 130 | + * @param hw Peripheral I2S hardware instance address. |
| 131 | +- * @param chan_fmt The channel format of the RX channel |
| 132 | +- * @param is_msb_right Is msb_right enabled, if it does, we need to flip the channel |
| 133 | +- */ |
| 134 | +-static inline void i2s_ll_rx_set_chan_mod(i2s_dev_t *hw, i2s_channel_fmt_t chan_fmt, bool is_msb_right) |
| 135 | +-{ |
| 136 | +- switch (chan_fmt) { |
| 137 | +- case I2S_CHANNEL_FMT_ALL_RIGHT: |
| 138 | +- /* fall through */ |
| 139 | +- case I2S_CHANNEL_FMT_ONLY_RIGHT: |
| 140 | +- hw->conf_chan.rx_chan_mod = is_msb_right ? 1 : 2; |
| 141 | +- break; |
| 142 | +- case I2S_CHANNEL_FMT_ALL_LEFT: |
| 143 | +- /* fall through */ |
| 144 | +- case I2S_CHANNEL_FMT_ONLY_LEFT: |
| 145 | +- hw->conf_chan.rx_chan_mod = is_msb_right ? 2 : 1; |
| 146 | +- break; |
| 147 | +- case I2S_CHANNEL_FMT_RIGHT_LEFT: |
| 148 | +- hw->conf_chan.rx_chan_mod = 0; |
| 149 | +- break; |
| 150 | +- default: |
| 151 | +- HAL_ASSERT(false); |
| 152 | +- } |
| 153 | ++ * @param val value to set rx chan mode |
| 154 | ++ */ |
| 155 | ++static inline void i2s_ll_rx_set_chan_mod(i2s_dev_t *hw, uint32_t val) |
| 156 | ++{ |
| 157 | ++ hw->conf_chan.rx_chan_mod = val; |
| 158 | + } |
| 159 | + |
| 160 | + /** |
| 161 | +diff --git a/components/hal/i2s_hal.c b/components/hal/i2s_hal.c |
| 162 | +index b6d27f978d..e6e08df39b 100644 |
| 163 | +--- a/components/hal/i2s_hal.c |
| 164 | ++++ b/components/hal/i2s_hal.c |
| 165 | +@@ -12,11 +12,6 @@ |
| 166 | + #include "hal/i2s_hal.h" |
| 167 | + #include "sdkconfig.h" |
| 168 | + |
| 169 | +-#ifndef SOC_I2S_SUPPORTS_TDM |
| 170 | +-#define I2S_HAL_DEFAULT_MSB_RIGHT (true) // Default msb_right bit to true |
| 171 | +-#define I2S_HAL_DEFAULT_RIGHT_FIRST (I2S_HAL_DEFAULT_MSB_RIGHT) // Normally right_first bit keeps same as msb_right |
| 172 | +-#endif // SOC_I2S_SUPPORTS_TDM |
| 173 | +- |
| 174 | + /** |
| 175 | + * @brief Calculate the closest sample rate clock configuration. |
| 176 | + * clock relationship: |
| 177 | +@@ -190,9 +185,9 @@ void i2s_hal_tx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t * |
| 178 | + #if CONFIG_IDF_TARGET_ESP32 |
| 179 | + i2s_ll_tx_enable_msb_right(hal->dev, hal_cfg->sample_bits <= I2S_BITS_PER_SAMPLE_16BIT); |
| 180 | + #else |
| 181 | +- i2s_ll_tx_enable_msb_right(hal->dev, I2S_HAL_DEFAULT_MSB_RIGHT); |
| 182 | ++ i2s_ll_tx_enable_msb_right(hal->dev, false); |
| 183 | + #endif |
| 184 | +- i2s_ll_tx_enable_right_first(hal->dev, I2S_HAL_DEFAULT_RIGHT_FIRST); |
| 185 | ++ i2s_ll_tx_enable_right_first(hal->dev, false); |
| 186 | + i2s_ll_tx_force_enable_fifo_mod(hal->dev, true); |
| 187 | + #endif |
| 188 | + } |
| 189 | +@@ -218,9 +213,9 @@ void i2s_hal_rx_set_common_mode(i2s_hal_context_t *hal, const i2s_hal_config_t * |
| 190 | + #if CONFIG_IDF_TARGET_ESP32 |
| 191 | + i2s_ll_rx_enable_msb_right(hal->dev, hal_cfg->sample_bits <= I2S_BITS_PER_SAMPLE_16BIT); |
| 192 | + #else |
| 193 | +- i2s_ll_rx_enable_msb_right(hal->dev, I2S_HAL_DEFAULT_MSB_RIGHT); |
| 194 | ++ i2s_ll_rx_enable_msb_right(hal->dev, false); |
| 195 | + #endif |
| 196 | +- i2s_ll_rx_enable_right_first(hal->dev, I2S_HAL_DEFAULT_RIGHT_FIRST); |
| 197 | ++ i2s_ll_rx_enable_right_first(hal->dev, false); |
| 198 | + i2s_ll_rx_force_enable_fifo_mod(hal->dev, true); |
| 199 | + #endif |
| 200 | + } |
| 201 | +@@ -253,7 +248,7 @@ void i2s_hal_tx_set_channel_style(i2s_hal_context_t *hal, const i2s_hal_config_t |
| 202 | + i2s_ll_tx_set_active_chan_mask(hal->dev, hal_cfg->chan_mask >> 16); |
| 203 | + i2s_ll_tx_set_chan_num(hal->dev, chan_num); |
| 204 | + #else |
| 205 | +- i2s_ll_tx_set_chan_mod(hal->dev, hal_cfg->chan_fmt); |
| 206 | ++ i2s_ll_tx_set_chan_mod(hal->dev, hal_cfg->chan_fmt < I2S_CHANNEL_FMT_ONLY_RIGHT ? hal_cfg->chan_fmt : (hal_cfg->chan_fmt >> 1)); // 0-two channel;1-right;2-left;3-righ;4-left |
| 207 | + #endif // SOC_I2S_SUPPORTS_TDM |
| 208 | + #if SOC_I2S_SUPPORTS_PDM_CODEC |
| 209 | + if (hal_cfg->mode & I2S_MODE_PDM) { |
| 210 | +@@ -297,16 +292,8 @@ void i2s_hal_rx_set_channel_style(i2s_hal_context_t *hal, const i2s_hal_config_t |
| 211 | + is_mono = (hal_cfg->mode & I2S_MODE_PDM) ? false : true; |
| 212 | + #endif // SOC_I2S_SUPPORTS_PDM_RX |
| 213 | + #else |
| 214 | +- /* rx_chan_mod is related to msb_right, we take it into consideration here. |
| 215 | +- * It is calculated again here instead of reading the value from the register, |
| 216 | +- * so that we can avoid introducing the calling sequence dependency */ |
| 217 | +- bool is_msb_right = I2S_HAL_DEFAULT_MSB_RIGHT; // Set default to false for ESP32-S2 |
| 218 | +-#if CONFIG_IDF_TARGET_ESP32 |
| 219 | +- /* Specially, `msb_right` on esp32 is related to sample bits and PDM mode */ |
| 220 | +- is_msb_right |= (hal_cfg->sample_bits <= I2S_BITS_PER_SAMPLE_16BIT) || (hal_cfg->mode & I2S_MODE_PDM); |
| 221 | +-#endif // CONFIG_IDF_TARGET_ESP32 |
| 222 | +- i2s_ll_rx_set_chan_mod(hal->dev, hal_cfg->chan_fmt, is_msb_right); |
| 223 | +-#endif // SOC_I2S_SUPPORTS_TDM |
| 224 | ++ i2s_ll_rx_set_chan_mod(hal->dev, hal_cfg->chan_fmt < I2S_CHANNEL_FMT_ONLY_RIGHT ? hal_cfg->chan_fmt : (hal_cfg->chan_fmt >> 1)); // 0-two channel;1-right;2-left;3-righ;4-left |
| 225 | ++#endif |
| 226 | + i2s_ll_rx_set_sample_bit(hal->dev, chan_bits, data_bits); |
| 227 | + i2s_ll_rx_enable_mono_mode(hal->dev, is_mono); |
| 228 | + |
| 229 | + |
| 230 | + |
| 231 | + |
| 232 | + |
| 233 | + |
| 234 | + |
| 235 | + |
| 236 | + |
| 237 | + |
| 238 | + |
| 239 | + |
| 240 | + |
| 241 | + |
| 242 | + |
| 243 | + |
| 244 | + |
| 245 | + |
| 246 | + |
| 247 | + |
| 248 | + |
| 249 | + |
| 250 | + |
| 251 | + |
| 252 | + |
| 253 | + |
| 254 | + |
| 255 | + |
0 commit comments