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1 | 1 | /*
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2 |
| - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD |
| 2 | + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD |
3 | 3 | *
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4 | 4 | * SPDX-License-Identifier: Apache-2.0
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5 | 5 | */
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@@ -1503,7 +1503,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
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1503 | 1503 | // Sometimes when the FSM get stuck, the ACK_ERR interrupt will occur endlessly until we reset the FSM and clear bus.
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1504 | 1504 | esp_err_t ret = ESP_FAIL;
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1505 | 1505 | i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
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1506 |
| - TickType_t ticks_start = xTaskGetTickCount(); |
| 1506 | + const TickType_t ticks_start = xTaskGetTickCount(); |
1507 | 1507 | portBASE_TYPE res = xSemaphoreTake(p_i2c->cmd_mux, ticks_to_wait);
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1508 | 1508 | if (res == pdFALSE) {
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1509 | 1509 | return ESP_ERR_TIMEOUT;
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@@ -1543,13 +1543,15 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
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1543 | 1543 | i2c_cmd_evt_t evt;
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1544 | 1544 | while (1) {
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1545 | 1545 | TickType_t wait_time = xTaskGetTickCount();
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1546 |
| - if (wait_time - ticks_start > ticks_to_wait) { // out of time |
1547 |
| - wait_time = I2C_CMD_ALIVE_INTERVAL_TICK; |
| 1546 | + const TickType_t elapsed = wait_time - ticks_start; |
| 1547 | + if (elapsed >= ticks_to_wait) { // out of time |
| 1548 | + /* Before triggering a timeout, empty the queue by giving a wait_time of 0: |
| 1549 | + * - if the queue is empty, `pdFALSE` will be returned and the loop will be exited |
| 1550 | + * - if the queue is not empty, we will pop an element and come back here again |
| 1551 | + */ |
| 1552 | + wait_time = 0; |
1548 | 1553 | } else {
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1549 |
| - wait_time = ticks_to_wait - (wait_time - ticks_start); |
1550 |
| - if (wait_time < I2C_CMD_ALIVE_INTERVAL_TICK) { |
1551 |
| - wait_time = I2C_CMD_ALIVE_INTERVAL_TICK; |
1552 |
| - } |
| 1554 | + wait_time = MIN(ticks_to_wait - elapsed, I2C_CMD_ALIVE_INTERVAL_TICK); |
1553 | 1555 | }
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1554 | 1556 | // In master mode, since we don't have an interrupt to detective bus error or FSM state, what we do here is to make
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1555 | 1557 | // sure the interrupt mechanism for master mode is still working.
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