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ginkgmginkgm
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Merge branch 'fix/adc_hal_reading_efuse_in_critical' into 'master'
adc: fixed efuse called in critical section issue See merge request espressif/esp-idf!11519
2 parents e440746 + 04d6b11 commit 49022d4

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9 files changed

+172
-149
lines changed

9 files changed

+172
-149
lines changed

‎components/driver/adc_common.c

Lines changed: 26 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,16 @@ static esp_pm_lock_handle_t s_adc2_arbiter_lock;
121121
ADC Common
122122
---------------------------------------------------------------*/
123123

124+
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
125+
static uint32_t get_calibration_offset(adc_ll_num_t adc_n, adc_channel_t chan)
126+
{
127+
adc_atten_t atten = adc_hal_get_atten(adc_n, chan);
128+
129+
extern uint32_t adc_get_calibration_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool no_cal);
130+
return adc_get_calibration_offset(adc_n, chan, atten, false);
131+
}
132+
#endif
133+
124134
void adc_power_acquire(void)
125135
{
126136
bool powered_on = false;
@@ -269,13 +279,6 @@ esp_err_t adc_rtc_reset(void)
269279
ADC_EXIT_CRITICAL();
270280
return ESP_OK;
271281
}
272-
273-
static inline void adc_set_init_code(adc_ll_num_t adc_n, adc_channel_t channel)
274-
{
275-
adc_atten_t atten = adc_hal_get_atten(adc_n, channel);
276-
uint32_t cal_val = adc_hal_calibration(adc_n, channel, atten, true, false);
277-
adc_hal_set_calibration_param(adc_n, cal_val);
278-
}
279282
#endif
280283

281284
/*-------------------------------------------------------------------------------------
@@ -369,20 +372,25 @@ int adc1_get_raw(adc1_channel_t channel)
369372
adc1_rtc_mode_acquire();
370373
adc_power_acquire();
371374

375+
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
376+
// Get calibration value before going into critical section
377+
uint32_t cal_val = get_calibration_offset(ADC_NUM_1, channel);
378+
#endif
379+
372380
ADC_ENTER_CRITICAL();
373381
#ifdef CONFIG_IDF_TARGET_ESP32
374382
adc_hal_hall_disable(); //Disable other peripherals.
375383
adc_hal_amp_disable(); //Currently the LNA is not open, close it by default.
376384
#endif
377-
#if !CONFIG_IDF_TARGET_ESP32
378-
adc_set_init_code(ADC_NUM_1, channel); // calibration for adc
385+
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
386+
adc_hal_set_calibration_param(ADC_NUM_1, cal_val);
379387
#endif
380388
adc_hal_set_controller(ADC_NUM_1, ADC_CTRL_RTC); //Set controller
381389
adc_hal_convert(ADC_NUM_1, channel, &adc_value); //Start conversion, For ADC1, the data always valid.
382-
ADC_EXIT_CRITICAL();
383390
#if !CONFIG_IDF_TARGET_ESP32
384391
adc_hal_rtc_reset(); //Reset FSM of rtc controller
385392
#endif
393+
ADC_EXIT_CRITICAL();
386394

387395
adc_power_release();
388396
adc1_lock_release();
@@ -520,6 +528,11 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
520528

521529
adc_power_acquire(); //in critical section with whole rtc module
522530

531+
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
532+
// Get calibration value before going into critical section
533+
uint32_t cal_val = get_calibration_offset(ADC_NUM_2, channel);
534+
#endif
535+
523536
ADC2_ENTER_CRITICAL(); //avoid collision with other tasks
524537

525538
if ( ADC2_WIFI_LOCK_TRY_ACQUIRE() == -1 ) { //try the lock, return if failed (wifi using).
@@ -532,7 +545,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
532545
#endif
533546
adc2_config_width(width_bit); // in critical section with whole rtc module. because the PWDET use the same registers, place it here.
534547
#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
535-
adc_set_init_code(ADC_NUM_2, channel); // calibration for adc
548+
adc_hal_set_calibration_param(ADC_NUM_2, cal_val);
536549
#endif
537550
adc_hal_set_controller(ADC_NUM_2, ADC_CTRL_RTC);// set controller
538551

@@ -557,12 +570,12 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
557570
#endif //CONFIG_PM_ENABLE
558571
#endif //CONFIG_IDF_TARGET_ESP32
559572

560-
ADC2_WIFI_LOCK_RELEASE();
561-
ADC2_EXIT_CRITICAL();
562573

563574
#if !CONFIG_IDF_TARGET_ESP32
564575
adc_rtc_reset();
565576
#endif
577+
ADC2_WIFI_LOCK_RELEASE();
578+
ADC2_EXIT_CRITICAL();
566579

567580
if (adc_value < 0) {
568581
ESP_LOGD( ADC_TAG, "ADC2 ARB: Return data is invalid." );

‎components/driver/esp32s2/adc.c

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include "driver/rtc_cntl.h"
3030
#include "driver/gpio.h"
3131
#include "driver/adc.h"
32+
#include "esp32s2/esp_efuse_rtc_table.h"
3233

3334
#include "hal/adc_types.h"
3435
#include "hal/adc_hal.h"
@@ -61,6 +62,8 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
6162
static esp_pm_lock_handle_t s_adc_digi_arbiter_lock = NULL;
6263
#endif //CONFIG_PM_ENABLE
6364

65+
esp_err_t adc_cal_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten);
66+
6467
/*---------------------------------------------------------------
6568
Digital controller setting
6669
---------------------------------------------------------------*/
@@ -106,6 +109,17 @@ esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
106109
}
107110
#endif //CONFIG_PM_ENABLE
108111

112+
if (config->conv_mode & ADC_CONV_SINGLE_UNIT_1) {
113+
for (int i = 0; i < config->adc1_pattern_len; i++) {
114+
adc_cal_offset(ADC_NUM_1, config->adc1_pattern[i].channel, config->adc1_pattern[i].atten);
115+
}
116+
}
117+
if (config->conv_mode & ADC_CONV_SINGLE_UNIT_2) {
118+
for (int i = 0; i < config->adc2_pattern_len; i++) {
119+
adc_cal_offset(ADC_NUM_2, config->adc2_pattern[i].channel, config->adc2_pattern[i].atten);
120+
}
121+
}
122+
109123
ADC_ENTER_CRITICAL();
110124
adc_hal_digi_controller_config(config);
111125
ADC_EXIT_CRITICAL();
@@ -413,3 +427,54 @@ esp_err_t adc_digi_isr_deregister(void)
413427
/*---------------------------------------------------------------
414428
RTC controller setting
415429
---------------------------------------------------------------*/
430+
431+
/*---------------------------------------------------------------
432+
Calibration
433+
---------------------------------------------------------------*/
434+
435+
static uint16_t s_adc_cali_param[ADC_NUM_MAX][ADC_ATTEN_MAX] = { {0}, {0} };
436+
437+
//NOTE: according to calibration version, different types of lock may be taken during the process:
438+
// 1. Semaphore when reading efuse
439+
// 2. Spinlock when actually doing ADC calibration
440+
//This function shoudn't be called inside critical section or ISR
441+
uint32_t adc_get_calibration_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool no_cal)
442+
{
443+
#ifdef CONFIG_IDF_ENV_FPGA
444+
return 0;
445+
#endif
446+
447+
if (s_adc_cali_param[adc_n][atten]) {
448+
ESP_LOGV(ADC_TAG, "Use calibrated val ADC%d atten=%d: %04X", adc_n, atten, s_adc_cali_param[adc_n][atten]);
449+
return (uint32_t)s_adc_cali_param[adc_n][atten];
450+
}
451+
452+
if (no_cal) {
453+
return 0; //indicating failure
454+
}
455+
456+
uint32_t dout = 0;
457+
// check if we can fetch the values from eFuse.
458+
int version = esp_efuse_rtc_table_read_calib_version();
459+
if (version == 2) {
460+
int tag = esp_efuse_rtc_table_get_tag(version, adc_n + 1, atten, RTCCALIB_V2_PARAM_VINIT);
461+
dout = esp_efuse_rtc_table_get_parsed_efuse_value(tag, false);
462+
} else {
463+
const bool internal_gnd = true;
464+
ADC_ENTER_CRITICAL();
465+
dout = adc_hal_self_calibration(adc_n, channel, atten, internal_gnd);
466+
ADC_EXIT_CRITICAL();
467+
}
468+
ESP_LOGD(ADC_TAG, "Calib(V%d) ADC%d atten=%d: %04X", version, adc_n, atten, dout);
469+
s_adc_cali_param[adc_n][atten] = (uint16_t)dout;
470+
return dout;
471+
}
472+
473+
esp_err_t adc_cal_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten)
474+
{
475+
uint32_t cal_val = adc_get_calibration_offset(adc_n, channel, atten, false);
476+
ADC_ENTER_CRITICAL();
477+
adc_hal_set_calibration_param(adc_n, cal_val);
478+
ADC_EXIT_CRITICAL();
479+
return ESP_OK;
480+
}

‎components/driver/esp32s2/adc2_init_cal.c

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,11 @@ Don't put any other code into this file. */
2525
*/
2626
static __attribute__((constructor)) void adc2_init_code_calibration(void)
2727
{
28-
adc_hal_set_calibration_param(ADC_NUM_2, adc_hal_calibration(ADC_NUM_2, 0, ADC_ATTEN_DB_11, true, false));
28+
const adc_ll_num_t adc_n = ADC_NUM_2;
29+
const adc_atten_t atten = ADC_ATTEN_DB_11;
30+
const adc_channel_t channel = 0;
31+
extern esp_err_t adc_cal_offset(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten);
32+
adc_cal_offset(adc_n, channel, atten);
2933
}
3034

3135
/** Don't call `adc2_cal_include` in user code. */

‎components/hal/esp32c3/adc_hal.c

Lines changed: 16 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,6 @@ void adc_hal_digi_deinit(void)
4040
adc_hal_deinit();
4141
}
4242

43-
static inline void adc_set_init_code(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten)
44-
{
45-
uint32_t cal_val = adc_hal_calibration(adc_n, channel, atten, true, false);
46-
adc_hal_set_calibration_param(adc_n, cal_val);
47-
}
48-
4943
void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
5044
{
5145
/* If enable digtal controller, adc xpd should always on. */
@@ -58,7 +52,6 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
5852
adc_ll_digi_set_pattern_table_len(ADC_NUM_1, cfg->adc1_pattern_len);
5953
for (int i = 0; i < cfg->adc1_pattern_len; i++) {
6054
adc_ll_digi_set_pattern_table(ADC_NUM_1, i, cfg->adc1_pattern[i]);
61-
adc_set_init_code(ADC_NUM_1, cfg->adc1_pattern[i].channel, cfg->adc1_pattern[i].atten);
6255
}
6356
}
6457
}
@@ -68,7 +61,6 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
6861
adc_ll_digi_set_pattern_table_len(ADC_NUM_2, cfg->adc2_pattern_len);
6962
for (int i = 0; i < cfg->adc2_pattern_len; i++) {
7063
adc_ll_digi_set_pattern_table(ADC_NUM_2, i, cfg->adc2_pattern[i]);
71-
adc_set_init_code(ADC_NUM_2, cfg->adc2_pattern[i].channel, cfg->adc2_pattern[i].atten);
7264
}
7365
}
7466
}
@@ -162,44 +154,27 @@ void adc_hal_arbiter_config(adc_arbiter_t *config)
162154
/*---------------------------------------------------------------
163155
ADC calibration setting
164156
---------------------------------------------------------------*/
165-
166-
#define ADC_HAL_CAL_OFFSET_RANGE (4096)
167157
#define ADC_HAL_CAL_TIMES (10)
158+
#define ADC_HAL_CAL_OFFSET_RANGE (4096)
168159

169-
static uint16_t s_adc_cali_param[ADC_NUM_MAX][ADC_ATTEN_MAX] = { {0}, {0} };
170-
171-
static uint32_t adc_hal_read_self_cal(adc_ll_num_t adc_n, int channel)
160+
static uint32_t read_cal_channel(adc_ll_num_t adc_n, int channel)
172161
{
173162
adc_ll_rtc_start_convert(adc_n, channel);
174163
while (adc_ll_rtc_convert_is_done(adc_n) != true);
175164
return (uint32_t)adc_ll_rtc_get_convert_value(adc_n);
176165
}
177166

178-
uint32_t adc_hal_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd, bool force_cal)
167+
uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd)
179168
{
180-
if (!force_cal) {
181-
if (s_adc_cali_param[adc_n][atten]) {
182-
return (uint32_t)s_adc_cali_param[adc_n][atten];
183-
}
184-
}
185-
186-
uint32_t code_list[ADC_HAL_CAL_TIMES] = {0};
187-
uint32_t code_sum = 0;
188-
uint32_t code_h = 0;
189-
uint32_t code_l = 0;
190-
uint32_t chk_code = 0;
191-
uint32_t dout = 0;
192-
193169
adc_hal_set_power_manage(ADC_POWER_SW_ON);
170+
194171
if (adc_n == ADC_NUM_2) {
195172
adc_arbiter_t config = ADC_ARBITER_CONFIG_DEFAULT();
196173
adc_hal_arbiter_config(&config);
197174
}
198175
adc_hal_set_controller(adc_n, ADC_CTRL_RTC); //Set controller
199176

200-
// adc_hal_arbiter_config(adc_arbiter_t *config)
201177
adc_ll_calibration_prepare(adc_n, channel, internal_gnd);
202-
203178
/* Enable/disable internal connect GND (for calibration). */
204179
if (internal_gnd) {
205180
adc_ll_rtc_disable_channel(adc_n, channel);
@@ -209,25 +184,31 @@ uint32_t adc_hal_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atte
209184
adc_ll_set_atten(adc_n, channel, atten);
210185
}
211186

187+
uint32_t code_list[ADC_HAL_CAL_TIMES] = {0};
188+
uint32_t code_sum = 0;
189+
uint32_t code_h = 0;
190+
uint32_t code_l = 0;
191+
uint32_t chk_code = 0;
192+
212193
for (uint8_t rpt = 0 ; rpt < ADC_HAL_CAL_TIMES ; rpt ++) {
213194
code_h = ADC_HAL_CAL_OFFSET_RANGE;
214195
code_l = 0;
215196
chk_code = (code_h + code_l) / 2;
216197
adc_ll_set_calibration_param(adc_n, chk_code);
217-
dout = adc_hal_read_self_cal(adc_n, channel);
198+
uint32_t self_cal = read_cal_channel(adc_n, channel);
218199
while (code_h - code_l > 1) {
219-
if (dout == 0) {
200+
if (self_cal == 0) {
220201
code_h = chk_code;
221202
} else {
222203
code_l = chk_code;
223204
}
224205
chk_code = (code_h + code_l) / 2;
225206
adc_ll_set_calibration_param(adc_n, chk_code);
226-
dout = adc_hal_read_self_cal(adc_n, channel);
207+
self_cal = read_cal_channel(adc_n, channel);
227208
if ((code_h - code_l == 1)) {
228209
chk_code += 1;
229210
adc_ll_set_calibration_param(adc_n, chk_code);
230-
dout = adc_hal_read_self_cal(adc_n, channel);
211+
self_cal = read_cal_channel(adc_n, channel);
231212
}
232213
}
233214
code_list[rpt] = chk_code;
@@ -244,12 +225,10 @@ uint32_t adc_hal_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atte
244225
}
245226
}
246227
chk_code = code_h + code_l;
247-
dout = ((code_sum - chk_code) % (ADC_HAL_CAL_TIMES - 2) < 4)
228+
uint32_t ret = ((code_sum - chk_code) % (ADC_HAL_CAL_TIMES - 2) < 4)
248229
? (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2)
249230
: (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + 1;
250231

251-
adc_ll_set_calibration_param(adc_n, dout);
252232
adc_ll_calibration_finish(adc_n);
253-
s_adc_cali_param[adc_n][atten] = (uint16_t)dout;
254-
return dout;
233+
return ret;
255234
}

‎components/hal/esp32c3/include/hal/adc_hal.h

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -232,21 +232,20 @@ void adc_hal_arbiter_config(adc_arbiter_t *config);
232232
---------------------------------------------------------------*/
233233

234234
/**
235-
* Calibrate the ADC according to the parameters.
235+
* Calibrate the ADC using internal connections.
236236
*
237237
* @note Different ADC units and different attenuation options use different calibration data (initial data).
238238
*
239239
* @param adc_n ADC index number.
240240
* @param channel adc channel number.
241+
* @param atten The attenuation for the channel
241242
* @param internal_gnd true: Disconnect from the IO port and use the internal GND as the calibration voltage.
242243
* false: Use IO external voltage as calibration voltage.
243-
* @param force_cal true: Do not use the results that have already been verified, and perform the verification again. It will take a long time.
244-
* false: Use the result of the last calibration.
245244
*
246245
* @return
247246
* - The calibration result (initial data) to ADC, use `adc_hal_set_calibration_param` to set.
248247
*/
249-
uint32_t adc_hal_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd, bool force_cal);
248+
uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc_atten_t atten, bool internal_gnd);
250249

251250
/**
252251
* Set the calibration result (initial data) to ADC.

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