From 169d4b525e10721094366793f03566629131ac5e Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Sun, 21 Aug 2022 13:38:41 +0200
Subject: [PATCH 1/2] Get real Flash Chip Size

---
 cores/esp32/Esp.cpp | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp
index 6cca85ac64c..a1de03d3659 100644
--- a/cores/esp32/Esp.cpp
+++ b/cores/esp32/Esp.cpp
@@ -305,13 +305,17 @@ const char * EspClass::getSdkVersion(void)
     return esp_get_idf_version();
 }
 
+uint32_t ESP_getFlashChipId(void)
+{
+  uint32_t id = g_rom_flashchip.device_id;
+  id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
+  return id;
+}
+
 uint32_t EspClass::getFlashChipSize(void)
 {
-    esp_image_header_t fhdr;
-    if(flashRead(ESP_FLASH_IMAGE_BASE, (uint32_t*)&fhdr, sizeof(esp_image_header_t)) && fhdr.magic != ESP_IMAGE_HEADER_MAGIC) {
-        return 0;
-    }
-    return magicFlashChipSize(fhdr.spi_size);
+  uint32_t id = (ESP_getFlashChipId() >> 16) & 0xFF;
+  return 2 << (id - 1);
 }
 
 uint32_t EspClass::getFlashChipSpeed(void)

From fa0228825b497fae977e0ace431c70b7e740e877 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Wed, 24 Aug 2022 17:19:04 +0200
Subject: [PATCH 2/2] Get correct Flash Chip Mode

---
 cores/esp32/Esp.cpp | 67 ++++++++++++++++++++++-----------------------
 cores/esp32/Esp.h   | 15 +---------
 2 files changed, 33 insertions(+), 49 deletions(-)

diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp
index a1de03d3659..72bb331dd89 100644
--- a/cores/esp32/Esp.cpp
+++ b/cores/esp32/Esp.cpp
@@ -30,6 +30,7 @@ extern "C" {
 }
 #include <MD5Builder.h>
 
+#include "soc/spi_reg.h"
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
 #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
@@ -55,6 +56,14 @@ extern "C" {
 #define ESP_FLASH_IMAGE_BASE 0x1000
 #endif
 
+// REG_SPI_BASE is not defined for S3/C3 ??
+
+#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+  #ifndef REG_SPI_BASE
+  #define REG_SPI_BASE(i)     (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
+  #endif // REG_SPI_BASE
+#endif // TARGET
+
 /**
  * User-defined Literals
  *  usage:
@@ -192,7 +201,7 @@ static uint32_t sketchSize(sketchSize_t response) {
         return data.image_len;
     }
 }
-    
+
 uint32_t EspClass::getSketchSize () {
     return sketchSize(SKETCH_SIZE_TOTAL);
 }
@@ -327,31 +336,28 @@ uint32_t EspClass::getFlashChipSpeed(void)
     return magicFlashChipSpeed(fhdr.spi_speed);
 }
 
-FlashMode_t EspClass::getFlashChipMode(void)
-{
-    esp_image_header_t fhdr;
-    if(flashRead(ESP_FLASH_IMAGE_BASE, (uint32_t*)&fhdr, sizeof(esp_image_header_t)) && fhdr.magic != ESP_IMAGE_HEADER_MAGIC) {
-        return FM_UNKNOWN;
-    }
-    return magicFlashChipMode(fhdr.spi_mode);
-}
-
-uint32_t EspClass::magicFlashChipSize(uint8_t byte)
-{
-    switch(byte & 0x0F) {
-    case 0x0: // 8 MBit (1MB)
-        return (1_MB);
-    case 0x1: // 16 MBit (2MB)
-        return (2_MB);
-    case 0x2: // 32 MBit (4MB)
-        return (4_MB);
-    case 0x3: // 64 MBit (8MB)
-        return (8_MB);
-    case 0x4: // 128 MBit (16MB)
-        return (16_MB);
-    default: // fail?
-        return 0;
-    }
+const char * EspClass::getFlashChipMode(void)
+{
+   #if CONFIG_IDF_TARGET_ESP32S2
+   uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
+   #else
+   uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
+   #endif
+   /* Not all of the following constants are already defined in older versions of spi_reg.h, so do it manually for now*/
+   if (spi_ctrl & BIT(24)) { //SPI_FREAD_QIO
+       return ("QIO");
+   } else if (spi_ctrl & BIT(20)) { //SPI_FREAD_QUAD
+       return ("QOUT");
+   } else if (spi_ctrl &  BIT(23)) { //SPI_FREAD_DIO
+       return ("DIO");
+   } else if (spi_ctrl & BIT(14)) { // SPI_FREAD_DUAL
+       return ("DOUT");
+   } else if (spi_ctrl & BIT(13)) { //SPI_FASTRD_MODE
+       return ("Fast");
+   } else {
+       return ("Slow");
+   }
+   return ("DOUT");
 }
 
 uint32_t EspClass::magicFlashChipSpeed(uint8_t byte)
@@ -370,15 +376,6 @@ uint32_t EspClass::magicFlashChipSpeed(uint8_t byte)
     }
 }
 
-FlashMode_t EspClass::magicFlashChipMode(uint8_t byte)
-{
-    FlashMode_t mode = (FlashMode_t) byte;
-    if(mode > FM_SLOW_READ) {
-        mode = FM_UNKNOWN;
-    }
-    return mode;
-}
-
 bool EspClass::flashEraseSector(uint32_t sector)
 {
     return spi_flash_erase_sector(sector) == ESP_OK;
diff --git a/cores/esp32/Esp.h b/cores/esp32/Esp.h
index 34ddb3bde11..451797f8b69 100644
--- a/cores/esp32/Esp.h
+++ b/cores/esp32/Esp.h
@@ -41,17 +41,6 @@ typedef enum {
     WDTO_8S     = 8000 //!< WDTO_8S
 } WDTO_t;
 
-
-typedef enum {
-    FM_QIO = 0x00,
-    FM_QOUT = 0x01,
-    FM_DIO = 0x02,
-    FM_DOUT = 0x03,
-    FM_FAST_READ = 0x04,
-    FM_SLOW_READ = 0x05,
-    FM_UNKNOWN = 0xff
-} FlashMode_t;
-
 typedef enum {
     SKETCH_SIZE_TOTAL = 0,
     SKETCH_SIZE_FREE = 1
@@ -87,11 +76,9 @@ class EspClass
 
     uint32_t getFlashChipSize();
     uint32_t getFlashChipSpeed();
-    FlashMode_t getFlashChipMode();
+    const char * getFlashChipMode();
 
-    uint32_t magicFlashChipSize(uint8_t byte);
     uint32_t magicFlashChipSpeed(uint8_t byte);
-    FlashMode_t magicFlashChipMode(uint8_t byte);
 
     uint32_t getSketchSize();
     String getSketchMD5();