Merge branch 'master' into feature/ipaddress-v6-support

Author: sgryphon

Diff for: .github/ISSUE_TEMPLATE/Issue-report.yml

@@ -41,6 +41,7 @@ body:
       options:
         - latest master (checkout manually)
         - latest development Release Candidate (RC-X)
+        - v2.0.5 
         - v2.0.4
         - v2.0.3
         - v2.0.2

Diff for: .github/workflows/upload-idf-component.yml

@@ -12,8 +12,9 @@ jobs:
           submodules: "recursive"
 
       - name: Upload components to the component registry
-        uses: espressif/github-actions/upload_components@master
+        uses: espressif/upload-components-ci-action@v1
         with:
           name: arduino-esp32
+          version: ${{ github.ref_name }}
           namespace: espressif
           api_token: ${{ secrets.IDF_COMPONENT_API_TOKEN }}

Diff for: boards.txt

@@ -79,8 +79,9 @@
 #define degrees(rad) ((rad)*RAD_TO_DEG)
 #define sq(x) ((x)*(x))
 
-#define sei()
-#define cli()
+// ESP32xx runs FreeRTOS... disabling interrupts can lead to issues, such as Watchdog Timeout
+#define sei() portENABLE_INTERRUPTS()
+#define cli() portDISABLE_INTERRUPTS()
 #define interrupts() sei()
 #define noInterrupts() cli()
 

Diff for: cores/esp32/Arduino.h

@@ -30,6 +30,7 @@ extern "C" {
 }
 #include <MD5Builder.h>
 
+#include "soc/spi_reg.h"
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
 #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
@@ -55,6 +56,14 @@ extern "C" {
 #define ESP_FLASH_IMAGE_BASE 0x1000
 #endif
 
+// REG_SPI_BASE is not defined for S3/C3 ??
+
+#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+  #ifndef REG_SPI_BASE
+  #define REG_SPI_BASE(i)     (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
+  #endif // REG_SPI_BASE
+#endif // TARGET
+
 /**
  * User-defined Literals
  *  usage:
@@ -192,7 +201,7 @@ static uint32_t sketchSize(sketchSize_t response) {
         return data.image_len;
     }
 }
-    
+
 uint32_t EspClass::getSketchSize () {
     return sketchSize(SKETCH_SIZE_TOTAL);
 }
@@ -305,13 +314,17 @@ const char * EspClass::getSdkVersion(void)
     return esp_get_idf_version();
 }
 
+uint32_t ESP_getFlashChipId(void)
+{
+  uint32_t id = g_rom_flashchip.device_id;
+  id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
+  return id;
+}
+
 uint32_t EspClass::getFlashChipSize(void)
 {
-    esp_image_header_t fhdr;
-    if(flashRead(ESP_FLASH_IMAGE_BASE, (uint32_t*)&fhdr, sizeof(esp_image_header_t)) && fhdr.magic != ESP_IMAGE_HEADER_MAGIC) {
-        return 0;
-    }
-    return magicFlashChipSize(fhdr.spi_size);
+  uint32_t id = (ESP_getFlashChipId() >> 16) & 0xFF;
+  return 2 << (id - 1);
 }
 
 uint32_t EspClass::getFlashChipSpeed(void)
@@ -325,11 +338,26 @@ uint32_t EspClass::getFlashChipSpeed(void)
 
 FlashMode_t EspClass::getFlashChipMode(void)
 {
-    esp_image_header_t fhdr;
-    if(flashRead(ESP_FLASH_IMAGE_BASE, (uint32_t*)&fhdr, sizeof(esp_image_header_t)) && fhdr.magic != ESP_IMAGE_HEADER_MAGIC) {
-        return FM_UNKNOWN;
-    }
-    return magicFlashChipMode(fhdr.spi_mode);
+   #if CONFIG_IDF_TARGET_ESP32S2
+   uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
+   #else
+   uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
+   #endif
+   /* Not all of the following constants are already defined in older versions of spi_reg.h, so do it manually for now*/
+   if (spi_ctrl & BIT(24)) { //SPI_FREAD_QIO
+       return (FM_QIO);
+   } else if (spi_ctrl & BIT(20)) { //SPI_FREAD_QUAD
+       return (FM_QOUT);
+   } else if (spi_ctrl &  BIT(23)) { //SPI_FREAD_DIO
+       return (FM_DIO);
+   } else if (spi_ctrl & BIT(14)) { // SPI_FREAD_DUAL
+       return (FM_DOUT);
+   } else if (spi_ctrl & BIT(13)) { //SPI_FASTRD_MODE
+       return (FM_FAST_READ);
+   } else {
+       return (FM_SLOW_READ);
+   }
+   return (FM_DOUT);
 }
 
 uint32_t EspClass::magicFlashChipSize(uint8_t byte)

Diff for: cores/esp32/Esp.cpp

@@ -140,7 +140,7 @@ _txBufferSize(0),
 _onReceiveCB(NULL), 
 _onReceiveErrorCB(NULL),
 _onReceiveTimeout(true),
-_rxTimeout(10),
+_rxTimeout(2),
 _eventTask(NULL)
 #if !CONFIG_DISABLE_HAL_LOCKS
     ,_lock(NULL)
@@ -212,6 +212,18 @@ void HardwareSerial::onReceive(OnReceiveCb function, bool onlyOnTimeout)
     HSERIAL_MUTEX_UNLOCK();
 }
 
+// This function allow the user to define how many bytes will trigger an Interrupt that will copy RX FIFO to the internal RX Ringbuffer
+// ISR will also move data from FIFO to RX Ringbuffer after a RX Timeout defined in HardwareSerial::setRxTimeout(uint8_t symbols_timeout)
+// A low value of FIFO Full bytes will consume more CPU time within the ISR
+// A high value of FIFO Full bytes will make the application wait longer to have byte available for the Stkech in a streaming scenario
+// Both RX FIFO Full and RX Timeout may affect when onReceive() will be called
+void HardwareSerial::setRxFIFOFull(uint8_t fifoBytes)
+{
+    HSERIAL_MUTEX_LOCK();
+    uartSetRxFIFOFull(_uart, fifoBytes); // Set new timeout
+    HSERIAL_MUTEX_UNLOCK();
+}
+
 // timout is calculates in time to receive UART symbols at the UART baudrate.
 // the estimation is about 11 bits per symbol (SERIAL_8N1)
 void HardwareSerial::setRxTimeout(uint8_t symbols_timeout)
@@ -223,7 +235,7 @@ void HardwareSerial::setRxTimeout(uint8_t symbols_timeout)
     _rxTimeout = symbols_timeout;   
     if (!symbols_timeout) _onReceiveTimeout = false;  // only when RX timeout is disabled, we also must disable this flag 
 
-    if(_uart != NULL) uart_set_rx_timeout(_uart_nr, _rxTimeout); // Set new timeout
+    uartSetRxTimeout(_uart, _rxTimeout); // Set new timeout
 
     HSERIAL_MUTEX_UNLOCK();
 }
@@ -250,6 +262,7 @@ void HardwareSerial::_uartEventTask(void *args)
         for(;;) {
             //Waiting for UART event.
             if(xQueueReceive(uartEventQueue, (void * )&event, (portTickType)portMAX_DELAY)) {
+                hardwareSerial_error_t currentErr = UART_NO_ERROR;
                 switch(event.type) {
                     case UART_DATA:
                         if(uart->_onReceiveCB && uart->available() > 0 && 
@@ -258,28 +271,32 @@ void HardwareSerial::_uartEventTask(void *args)
                         break;
                     case UART_FIFO_OVF:
                         log_w("UART%d FIFO Overflow. Consider adding Hardware Flow Control to your Application.", uart->_uart_nr);
-                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_FIFO_OVF_ERROR);
+                        currentErr = UART_FIFO_OVF_ERROR;
                         break;
                     case UART_BUFFER_FULL:
                         log_w("UART%d Buffer Full. Consider increasing your buffer size of your Application.", uart->_uart_nr);
-                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_BUFFER_FULL_ERROR);
+                        currentErr = UART_BUFFER_FULL_ERROR;
                         break;
                     case UART_BREAK:
                         log_w("UART%d RX break.", uart->_uart_nr);
-                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_BREAK_ERROR);
+                        currentErr = UART_BREAK_ERROR;
                         break;
                     case UART_PARITY_ERR:
                         log_w("UART%d parity error.", uart->_uart_nr);
-                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_PARITY_ERROR);
+                        currentErr = UART_PARITY_ERROR;
                         break;
                     case UART_FRAME_ERR:
                         log_w("UART%d frame error.", uart->_uart_nr);
-                        if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(UART_FRAME_ERROR);
+                        currentErr = UART_FRAME_ERROR;
                         break;
                     default:
                         log_w("UART%d unknown event type %d.", uart->_uart_nr, event.type);
                         break;
                 }
+                if (currentErr != UART_NO_ERROR) {
+                    if(uart->_onReceiveErrorCB) uart->_onReceiveErrorCB(currentErr);
+                    if(uart->_onReceiveCB && uart->available() > 0) uart->_onReceiveCB();   // forces User Callback too
+                }
             }
         }
     }
@@ -366,9 +383,7 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
     }
 
     // Set UART RX timeout
-    if (_uart != NULL) {
-        uart_set_rx_timeout(_uart_nr, _rxTimeout);
-    }
+    uartSetRxTimeout(_uart, _rxTimeout);
 
     HSERIAL_MUTEX_UNLOCK();
 }

Diff for: cores/esp32/HardwareSerial.cpp

@@ -57,6 +57,7 @@
 #include "freertos/semphr.h"
 
 typedef enum {
+    UART_NO_ERROR,
     UART_BREAK_ERROR,
     UART_BUFFER_FULL_ERROR,
     UART_FIFO_OVF_ERROR,
@@ -81,6 +82,12 @@ class HardwareSerial: public Stream
     //                       For a baudrate of 9600, SERIAL_8N1 (10 bit symbol) and symbols_timeout = 3, the timeout would be 3 / (9600 / 10) = 3.125 ms
     void setRxTimeout(uint8_t symbols_timeout);
 
+    // setRxFIFOFull(uint8_t fifoBytes) will set the number of bytes that will trigger UART_INTR_RXFIFO_FULL interrupt and fill up RxRingBuffer
+    // This affects some functions such as Serial::available() and Serial.read() because, in a UART flow of receiving data, Serial internal 
+    // RxRingBuffer will be filled only after these number of bytes arrive or a RX Timeout happens.
+    // This parameter can be set to 1 in order to receive byte by byte, but it will also consume more CPU time as the ISR will be activates often.
+    void setRxFIFOFull(uint8_t fifoBytes);
+
     // onReceive will setup a callback that will be called whenever an UART interruption occurs (UART_INTR_RXFIFO_FULL or UART_INTR_RXFIFO_TOUT)
     // UART_INTR_RXFIFO_FULL interrupt triggers at UART_FULL_THRESH_DEFAULT bytes received (defined as 120 bytes by default in IDF)
     // UART_INTR_RXFIFO_TOUT interrupt triggers at UART_TOUT_THRESH_DEFAULT symbols passed without any reception (defined as 10 symbos by default in IDF)
@@ -91,7 +98,7 @@ class HardwareSerial: public Stream
     //         false -- The callback will be called when FIFO reaches 120 bytes and also on RX Timeout.
     //                  The stream of incommig bytes will be "split" into blocks of 120 bytes on each callback.
     //                  This option avoid any sort of Rx Overflow, but leaves the UART packet reassembling work to the Application.
-    void onReceive(OnReceiveCb function, bool onlyOnTimeout = true);
+    void onReceive(OnReceiveCb function, bool onlyOnTimeout = false);
 
     // onReceive will be called on error events (see hardwareSerial_error_t)
     void onReceiveError(OnReceiveErrorCb function);

Diff for: cores/esp32/HardwareSerial.h

@@ -211,7 +211,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
     capb = calculateApb(&cconf);
     //New APB
     apb = calculateApb(&conf);
-    log_d("%s: %u / %u = %u Mhz, APB: %u Hz", (conf.source == RTC_CPU_FREQ_SRC_PLL)?"PLL":((conf.source == RTC_CPU_FREQ_SRC_APLL)?"APLL":((conf.source == RTC_CPU_FREQ_SRC_XTAL)?"XTAL":"8M")), conf.source_freq_mhz, conf.div, conf.freq_mhz, apb);
+    
     //Call peripheral functions before the APB change
     if(apb_change_callbacks){
         triggerApbChangeCallback(APB_BEFORE_CHANGE, capb, apb);
@@ -241,6 +241,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
     if(apb_change_callbacks){
         triggerApbChangeCallback(APB_AFTER_CHANGE, capb, apb);
     }
+    log_d("%s: %u / %u = %u Mhz, APB: %u Hz", (conf.source == RTC_CPU_FREQ_SRC_PLL)?"PLL":((conf.source == RTC_CPU_FREQ_SRC_APLL)?"APLL":((conf.source == RTC_CPU_FREQ_SRC_XTAL)?"XTAL":"8M")), conf.source_freq_mhz, conf.div, conf.freq_mhz, apb);
     return true;
 }
 

Diff for: cores/esp32/esp32-hal-cpu.c

@@ -162,7 +162,6 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
     uart_config.rx_flow_ctrl_thresh = rxfifo_full_thrhd;
     uart_config.source_clk = UART_SCLK_APB;
 
-
     ESP_ERROR_CHECK(uart_driver_install(uart_nr, rx_buffer_size, tx_buffer_size, 20, &(uart->uart_event_queue), 0));
     ESP_ERROR_CHECK(uart_param_config(uart_nr, &uart_config));
     ESP_ERROR_CHECK(uart_set_pin(uart_nr, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
@@ -172,13 +171,56 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
         // invert signal for both Rx and Tx
         ESP_ERROR_CHECK(uart_set_line_inverse(uart_nr, UART_SIGNAL_TXD_INV | UART_SIGNAL_RXD_INV));    
     }
-
+    
     UART_MUTEX_UNLOCK();
 
     uartFlush(uart);
     return uart;
 }
 
+// This code is under testing - for now just keep it here
+void uartSetFastReading(uart_t* uart)
+{
+    if(uart == NULL) {
+        return;
+    }
+
+    UART_MUTEX_LOCK();
+    // override default RX IDF Driver Interrupt - no BREAK, PARITY or OVERFLOW
+    uart_intr_config_t uart_intr = {
+        .intr_enable_mask = UART_INTR_RXFIFO_FULL | UART_INTR_RXFIFO_TOUT,   // only these IRQs - no BREAK, PARITY or OVERFLOW
+        .rx_timeout_thresh = 1,
+        .txfifo_empty_intr_thresh = 10,
+        .rxfifo_full_thresh = 2,
+    };
+
+    ESP_ERROR_CHECK(uart_intr_config(uart->num, &uart_intr));
+    UART_MUTEX_UNLOCK();
+}
+
+
+void uartSetRxTimeout(uart_t* uart, uint8_t numSymbTimeout)
+{
+    if(uart == NULL) {
+        return;
+    }
+
+    UART_MUTEX_LOCK();
+    uart_set_rx_timeout(uart->num, numSymbTimeout);
+    UART_MUTEX_UNLOCK();
+}
+
+void uartSetRxFIFOFull(uart_t* uart, uint8_t numBytesFIFOFull)
+{
+    if(uart == NULL) {
+        return;
+    }
+
+    UART_MUTEX_LOCK();
+    uart_set_rx_full_threshold(uart->num, numBytesFIFOFull);
+    UART_MUTEX_UNLOCK();
+}
+
 void uartEnd(uart_t* uart)
 {
     if(uart == NULL) {

Diff for: cores/esp32/esp32-hal-uart.c

@@ -82,6 +82,9 @@ void uartSetBaudRate(uart_t* uart, uint32_t baud_rate);
 uint32_t uartGetBaudRate(uart_t* uart);
 
 void uartSetRxInvert(uart_t* uart, bool invert);
+void uartSetRxTimeout(uart_t* uart, uint8_t numSymbTimeout);
+void uartSetRxFIFOFull(uart_t* uart, uint8_t numBytesFIFOFull);
+void uartSetFastReading(uart_t* uart);
 
 void uartSetDebug(uart_t* uart);
 int uartGetDebug();

Diff for: cores/esp32/esp32-hal-uart.h

@@ -23,7 +23,7 @@ extern "C" {
 /** Minor version number (x.X.x) */
 #define ESP_ARDUINO_VERSION_MINOR   0
 /** Patch version number (x.x.X) */
-#define ESP_ARDUINO_VERSION_PATCH   4
+#define ESP_ARDUINO_VERSION_PATCH   5
 
 /**
  * Macro to convert ARDUINO version number into an integer

Diff for: cores/esp32/esp_arduino_version.h

@@ -8,7 +8,7 @@ Development Boards
 You will need a development board or a custom board with the ESP32 (see Supported SoC's) to start playing.
 There is a bunch of different types and models widely available on the Internet. You need to choose one that covers all your requirements.
 
-To help you on this selection, we point out some facts about choosing the proper boardsto help you to save money and time.
+To help you on this selection, we point out some facts about choosing the proper boards to help you to save money and time.
 
 **One ESP32 to rule them all!**
 
@@ -112,4 +112,4 @@ Resources
 
 .. |board_lolin_d32_pro| raw:: html
 
-  <a href="https://www.wemos.cc/en/latest/d32/d32_pro.html" target="_blank">LOLIN D32 Pro</a>
+  <a href="https://www.wemos.cc/en/latest/d32/d32_pro.html" target="_blank">LOLIN D32 Pro</a>

Diff for: docs/source/boards/boards.rst

@@ -37,6 +37,8 @@ Installation
     cd ../.. && \
     idf.py menuconfig
 
+.. note:: If you use Arduino with ESP-IDF often, you can place the arduino folder into global components folder.
+
 Configuration
 -------------
 

Diff for: docs/source/esp-idf_component.rst

@@ -11,3 +11,7 @@ To use the arduino-esp32 core with a modified sdkconfig option, you need to use
 
 Note that modifying ``sdkconfig`` or ``sdkconfig.h`` files found in the arduino-esp32 project tree **does not** result in changes to these options. This is because ESP-IDF libraries are included into the arduino-esp32 project tree as pre-built libraries.
 
+How to compile libs with different debug level?
+-----------------------------------------------
+
+The short answer is ``esp32-arduino-lib-builder/configs/defconfig.common:44``. A guide explaining the process can be found here <guides/core_debug>