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Y1hsiaochunnnP-R-O-C-H-Y
Y1hsiaochunnn
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P-R-O-C-H-Y
authored
Added variant for Waveshare ESP32-S3-Zero (#10241)
* Added variant for ESP32-S3-Zero * Added variant for ESP32-S3-Zero * Fixed CI failures due to I2C and SPI pin definitions * Fixed custom partitions * Fix the partition without ota * Fix waveshare esp32-s3-zero partition table, add 4MB partition content * Fix waveshare esp32-s3-zero partition table, add 4MB partition content * Update tools/partitions/max_app_4MB.csv Co-authored-by: Jan Procházka <[email protected]> * change boards.txt --------- Co-authored-by: Jan Procházka <[email protected]>
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Diff for: ‎boards.txt

+192
Original file line numberDiff line numberDiff line change
@@ -39125,6 +39125,198 @@ Geekble_ESP32C3.menu.EraseFlash.none.upload.erase_cmd=
3912539125
Geekble_ESP32C3.menu.EraseFlash.all=Enabled
3912639126
Geekble_ESP32C3.menu.EraseFlash.all.upload.erase_cmd=-e
3912739127

39128+
##############################################################
39129+
39130+
waveshare_esp32_s3_zero.name=Waveshare ESP32-S3-Zero
39131+
waveshare_esp32_s3_zero.vid.0=0x303a
39132+
waveshare_esp32_s3_zero.pid.0=0x822B
39133+
waveshare_esp32_s3_zero.upload_port.0.vid=0x303a
39134+
waveshare_esp32_s3_zero.upload_port.0.pid=0x822B
39135+
39136+
waveshare_esp32_s3_zero.bootloader.tool=esptool_py
39137+
waveshare_esp32_s3_zero.bootloader.tool.default=esptool_py
39138+
39139+
waveshare_esp32_s3_zero.upload.tool=esptool_py
39140+
waveshare_esp32_s3_zero.upload.tool.default=esptool_py
39141+
waveshare_esp32_s3_zero.upload.tool.network=esp_ota
39142+
39143+
waveshare_esp32_s3_zero.upload.maximum_size=1310720
39144+
39145+
waveshare_esp32_s3_zero.upload.maximum_data_size=327680
39146+
waveshare_esp32_s3_zero.upload.flags=
39147+
waveshare_esp32_s3_zero.upload.extra_flags=
39148+
waveshare_esp32_s3_zero.upload.use_1200bps_touch=false
39149+
waveshare_esp32_s3_zero.upload.wait_for_upload_port=false
39150+
39151+
waveshare_esp32_s3_zero.serial.disableDTR=false
39152+
waveshare_esp32_s3_zero.serial.disableRTS=false
39153+
39154+
waveshare_esp32_s3_zero.build.tarch=xtensa
39155+
waveshare_esp32_s3_zero.build.bootloader_addr=0x0
39156+
waveshare_esp32_s3_zero.build.target=esp32s3
39157+
waveshare_esp32_s3_zero.build.mcu=esp32s3
39158+
waveshare_esp32_s3_zero.build.core=esp32
39159+
waveshare_esp32_s3_zero.build.variant=waveshare_esp32_s3_zero
39160+
waveshare_esp32_s3_zero.build.board=WAVESHARE_ESP32_S3_ZERO
39161+
39162+
waveshare_esp32_s3_zero.build.usb_mode=1
39163+
waveshare_esp32_s3_zero.build.cdc_on_boot=0
39164+
waveshare_esp32_s3_zero.build.msc_on_boot=0
39165+
waveshare_esp32_s3_zero.build.dfu_on_boot=0
39166+
waveshare_esp32_s3_zero.build.f_cpu=240000000L
39167+
waveshare_esp32_s3_zero.build.flash_size=4MB
39168+
waveshare_esp32_s3_zero.build.flash_freq=80m
39169+
waveshare_esp32_s3_zero.build.flash_mode=dio
39170+
waveshare_esp32_s3_zero.build.boot=qio
39171+
waveshare_esp32_s3_zero.build.boot_freq=80m
39172+
waveshare_esp32_s3_zero.build.partitions=default
39173+
waveshare_esp32_s3_zero.build.defines=
39174+
waveshare_esp32_s3_zero.build.loop_core=
39175+
waveshare_esp32_s3_zero.build.event_core=
39176+
waveshare_esp32_s3_zero.build.psram_type=qspi
39177+
waveshare_esp32_s3_zero.build.memory_type={build.boot}_{build.psram_type}
39178+
39179+
waveshare_esp32_s3_zero.menu.PSRAM.disabled=Disabled
39180+
waveshare_esp32_s3_zero.menu.PSRAM.disabled.build.defines=
39181+
waveshare_esp32_s3_zero.menu.PSRAM.disabled.build.psram_type=qspi
39182+
waveshare_esp32_s3_zero.menu.PSRAM.enabled=Enabled
39183+
waveshare_esp32_s3_zero.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
39184+
waveshare_esp32_s3_zero.menu.PSRAM.enabled.build.psram_type=qspi
39185+
39186+
waveshare_esp32_s3_zero.menu.FlashMode.qio=QIO 80MHz
39187+
waveshare_esp32_s3_zero.menu.FlashMode.qio.build.flash_mode=dio
39188+
waveshare_esp32_s3_zero.menu.FlashMode.qio.build.boot=qio
39189+
waveshare_esp32_s3_zero.menu.FlashMode.qio.build.boot_freq=80m
39190+
waveshare_esp32_s3_zero.menu.FlashMode.qio.build.flash_freq=80m
39191+
waveshare_esp32_s3_zero.menu.FlashMode.qio120=QIO 120MHz
39192+
waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.flash_mode=dio
39193+
waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.boot=qio
39194+
waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.boot_freq=120m
39195+
waveshare_esp32_s3_zero.menu.FlashMode.qio120.build.flash_freq=80m
39196+
39197+
waveshare_esp32_s3_zero.menu.LoopCore.1=Core 1
39198+
waveshare_esp32_s3_zero.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
39199+
waveshare_esp32_s3_zero.menu.LoopCore.0=Core 0
39200+
waveshare_esp32_s3_zero.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
39201+
39202+
waveshare_esp32_s3_zero.menu.EventsCore.1=Core 1
39203+
waveshare_esp32_s3_zero.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
39204+
waveshare_esp32_s3_zero.menu.EventsCore.0=Core 0
39205+
waveshare_esp32_s3_zero.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
39206+
39207+
waveshare_esp32_s3_zero.menu.USBMode.hwcdc=Hardware CDC and JTAG
39208+
waveshare_esp32_s3_zero.menu.USBMode.hwcdc.build.usb_mode=1
39209+
waveshare_esp32_s3_zero.menu.USBMode.default=USB-OTG (TinyUSB)
39210+
waveshare_esp32_s3_zero.menu.USBMode.default.build.usb_mode=0
39211+
39212+
waveshare_esp32_s3_zero.menu.CDCOnBoot.default=Disabled
39213+
waveshare_esp32_s3_zero.menu.CDCOnBoot.default.build.cdc_on_boot=0
39214+
waveshare_esp32_s3_zero.menu.CDCOnBoot.cdc=Enabled
39215+
waveshare_esp32_s3_zero.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
39216+
39217+
waveshare_esp32_s3_zero.menu.MSCOnBoot.default=Disabled
39218+
waveshare_esp32_s3_zero.menu.MSCOnBoot.default.build.msc_on_boot=0
39219+
waveshare_esp32_s3_zero.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
39220+
waveshare_esp32_s3_zero.menu.MSCOnBoot.msc.build.msc_on_boot=1
39221+
39222+
waveshare_esp32_s3_zero.menu.DFUOnBoot.default=Disabled
39223+
waveshare_esp32_s3_zero.menu.DFUOnBoot.default.build.dfu_on_boot=0
39224+
waveshare_esp32_s3_zero.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
39225+
waveshare_esp32_s3_zero.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
39226+
39227+
waveshare_esp32_s3_zero.menu.UploadMode.default=UART0 / Hardware CDC
39228+
waveshare_esp32_s3_zero.menu.UploadMode.default.upload.use_1200bps_touch=false
39229+
waveshare_esp32_s3_zero.menu.UploadMode.default.upload.wait_for_upload_port=false
39230+
waveshare_esp32_s3_zero.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
39231+
waveshare_esp32_s3_zero.menu.UploadMode.cdc.upload.use_1200bps_touch=true
39232+
waveshare_esp32_s3_zero.menu.UploadMode.cdc.upload.wait_for_upload_port=true
39233+
39234+
waveshare_esp32_s3_zero.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
39235+
waveshare_esp32_s3_zero.menu.PartitionScheme.default.build.partitions=default
39236+
waveshare_esp32_s3_zero.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
39237+
waveshare_esp32_s3_zero.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
39238+
waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
39239+
waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota.build.partitions=no_ota
39240+
waveshare_esp32_s3_zero.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
39241+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
39242+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
39243+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
39244+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
39245+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
39246+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
39247+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
39248+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
39249+
waveshare_esp32_s3_zero.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
39250+
waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
39251+
waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app.build.partitions=huge_app
39252+
waveshare_esp32_s3_zero.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
39253+
waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
39254+
waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
39255+
waveshare_esp32_s3_zero.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
39256+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker=RainMaker 4MB
39257+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
39258+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080
39259+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA
39260+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota
39261+
waveshare_esp32_s3_zero.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656
39262+
39263+
waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs=OTA no FS (2MB APP with OTA)
39264+
waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs.build.custom_partitions=ota_nofs_4MB
39265+
waveshare_esp32_s3_zero.menu.PartitionScheme.otanofs.upload.maximum_size=2031616
39266+
waveshare_esp32_s3_zero.menu.PartitionScheme.all_app=Max APP (4MB APP no OTA)
39267+
waveshare_esp32_s3_zero.menu.PartitionScheme.all_app.build.custom_partitions=max_app_4MB
39268+
waveshare_esp32_s3_zero.menu.PartitionScheme.all_app.upload.maximum_size=4063232
39269+
39270+
waveshare_esp32_s3_zero.menu.PartitionScheme.custom=Custom
39271+
waveshare_esp32_s3_zero.menu.PartitionScheme.custom.build.partitions=
39272+
waveshare_esp32_s3_zero.menu.PartitionScheme.custom.upload.maximum_size=16777216
39273+
39274+
waveshare_esp32_s3_zero.menu.CPUFreq.240=240MHz (WiFi)
39275+
waveshare_esp32_s3_zero.menu.CPUFreq.240.build.f_cpu=240000000L
39276+
waveshare_esp32_s3_zero.menu.CPUFreq.160=160MHz (WiFi)
39277+
waveshare_esp32_s3_zero.menu.CPUFreq.160.build.f_cpu=160000000L
39278+
waveshare_esp32_s3_zero.menu.CPUFreq.80=80MHz (WiFi)
39279+
waveshare_esp32_s3_zero.menu.CPUFreq.80.build.f_cpu=80000000L
39280+
waveshare_esp32_s3_zero.menu.CPUFreq.40=40MHz
39281+
waveshare_esp32_s3_zero.menu.CPUFreq.40.build.f_cpu=40000000L
39282+
waveshare_esp32_s3_zero.menu.CPUFreq.20=20MHz
39283+
waveshare_esp32_s3_zero.menu.CPUFreq.20.build.f_cpu=20000000L
39284+
waveshare_esp32_s3_zero.menu.CPUFreq.10=10MHz
39285+
waveshare_esp32_s3_zero.menu.CPUFreq.10.build.f_cpu=10000000L
39286+
39287+
waveshare_esp32_s3_zero.menu.UploadSpeed.921600=921600
39288+
waveshare_esp32_s3_zero.menu.UploadSpeed.921600.upload.speed=921600
39289+
waveshare_esp32_s3_zero.menu.UploadSpeed.115200=115200
39290+
waveshare_esp32_s3_zero.menu.UploadSpeed.115200.upload.speed=115200
39291+
waveshare_esp32_s3_zero.menu.UploadSpeed.256000.windows=256000
39292+
waveshare_esp32_s3_zero.menu.UploadSpeed.256000.upload.speed=256000
39293+
waveshare_esp32_s3_zero.menu.UploadSpeed.230400.windows.upload.speed=256000
39294+
waveshare_esp32_s3_zero.menu.UploadSpeed.230400=230400
39295+
waveshare_esp32_s3_zero.menu.UploadSpeed.230400.upload.speed=230400
39296+
waveshare_esp32_s3_zero.menu.UploadSpeed.460800.linux=460800
39297+
waveshare_esp32_s3_zero.menu.UploadSpeed.460800.macosx=460800
39298+
waveshare_esp32_s3_zero.menu.UploadSpeed.460800.upload.speed=460800
39299+
waveshare_esp32_s3_zero.menu.UploadSpeed.512000.windows=512000
39300+
waveshare_esp32_s3_zero.menu.UploadSpeed.512000.upload.speed=512000
39301+
39302+
waveshare_esp32_s3_zero.menu.DebugLevel.none=None
39303+
waveshare_esp32_s3_zero.menu.DebugLevel.none.build.code_debug=0
39304+
waveshare_esp32_s3_zero.menu.DebugLevel.error=Error
39305+
waveshare_esp32_s3_zero.menu.DebugLevel.error.build.code_debug=1
39306+
waveshare_esp32_s3_zero.menu.DebugLevel.warn=Warn
39307+
waveshare_esp32_s3_zero.menu.DebugLevel.warn.build.code_debug=2
39308+
waveshare_esp32_s3_zero.menu.DebugLevel.info=Info
39309+
waveshare_esp32_s3_zero.menu.DebugLevel.info.build.code_debug=3
39310+
waveshare_esp32_s3_zero.menu.DebugLevel.debug=Debug
39311+
waveshare_esp32_s3_zero.menu.DebugLevel.debug.build.code_debug=4
39312+
waveshare_esp32_s3_zero.menu.DebugLevel.verbose=Verbose
39313+
waveshare_esp32_s3_zero.menu.DebugLevel.verbose.build.code_debug=5
39314+
39315+
waveshare_esp32_s3_zero.menu.EraseFlash.none=Disabled
39316+
waveshare_esp32_s3_zero.menu.EraseFlash.none.upload.erase_cmd=
39317+
waveshare_esp32_s3_zero.menu.EraseFlash.all=Enabled
39318+
waveshare_esp32_s3_zero.menu.EraseFlash.all.upload.erase_cmd=-e
39319+
3912839320
######################################################
3912939321

3913039322
ws_esp32_s3_matrix.name=Waveshare ESP32-S3-Matrix

Diff for: ‎tools/partitions/max_app_4MB.csv

+5
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Name, Type, SubType, Offset, Size, Flags
2+
nvs, data, nvs, 0x9000, 0x5000,
3+
otadata, data, ota, 0xe000, 0x2000,
4+
app0, app, factory, 0x10000, 0x3E0000,
5+
coredump, data, coredump,0x3F0000,0x10000,

Diff for: ‎tools/partitions/ota_nofs_4MB.csv

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@@ -0,0 +1,6 @@
1+
# Name, Type, SubType, Offset, Size, Flags
2+
nvs, data, nvs, 0x9000, 0x5000,
3+
otadata, data, ota, 0xE000, 0x2000,
4+
app0, app, ota_0, 0x10000, 0x1F0000,
5+
app1, app, ota_1, 0x200000, 0x1F0000,
6+
coredump, data, coredump, 0x3F0000, 0x10000,

Diff for: ‎variants/waveshare_esp32_s3_zero/pins_arduino.h

+81
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@@ -0,0 +1,81 @@
1+
#ifndef Pins_Arduino_h
2+
#define Pins_Arduino_h
3+
4+
#include <stdint.h>
5+
6+
#define USB_VID 0x303a
7+
#define USB_PID 0x822B
8+
#define USB_MANUFACTURER "Waveshare"
9+
#define USB_PRODUCT "ESP32-S3-Zero"
10+
#define USB_SERIAL "" // Empty string for MAC address
11+
12+
// Partial voltage measurement method
13+
#define WS_RGB 21
14+
15+
// Mapping based on the ESP32S3 data sheet - alternate for OUTPUT
16+
static const uint8_t OUTPUT_IO1 = 1;
17+
static const uint8_t OUTPUT_IO2 = 2;
18+
static const uint8_t OUTPUT_IO3 = 3;
19+
static const uint8_t OUTPUT_IO4 = 4;
20+
static const uint8_t OUTPUT_IO5 = 5;
21+
static const uint8_t OUTPUT_IO6 = 6;
22+
static const uint8_t OUTPUT_IO7 = 7;
23+
static const uint8_t OUTPUT_IO8 = 8;
24+
static const uint8_t OUTPUT_IO9 = 9;
25+
static const uint8_t OUTPUT_IO10 = 10;
26+
static const uint8_t OUTPUT_IO11 = 11;
27+
static const uint8_t OUTPUT_IO12 = 12;
28+
static const uint8_t OUTPUT_IO13 = 13;
29+
30+
// Def for I2C that shares the IMU I2C pins
31+
static const uint8_t SDA = -1;
32+
static const uint8_t SCL = -1;
33+
34+
// Mapping based on the ESP32S3 data sheet - alternate for SPI2
35+
static const uint8_t SS = 34; // FSPICS0
36+
static const uint8_t MOSI = 35; // FSPID
37+
static const uint8_t MISO = 37; // FSPIQ
38+
static const uint8_t SCK = 36; // FSPICLK
39+
40+
// UART0 pins
41+
static const uint8_t TX = 43;
42+
static const uint8_t RX = 44;
43+
44+
// Analog capable pins on the header
45+
static const uint8_t A0 = 1;
46+
static const uint8_t A1 = 2;
47+
static const uint8_t A2 = 3;
48+
static const uint8_t A3 = 4;
49+
static const uint8_t A4 = 5;
50+
static const uint8_t A5 = 6;
51+
static const uint8_t A6 = 7;
52+
53+
// GPIO capable pins on the header
54+
static const uint8_t D0 = 7;
55+
static const uint8_t D1 = 6;
56+
static const uint8_t D2 = 5;
57+
static const uint8_t D3 = 4;
58+
static const uint8_t D4 = 3;
59+
static const uint8_t D5 = 2;
60+
static const uint8_t D6 = 1;
61+
static const uint8_t D7 = 44;
62+
static const uint8_t D8 = 43;
63+
static const uint8_t D9 = 40;
64+
static const uint8_t D10 = 39;
65+
static const uint8_t D11 = 38;
66+
static const uint8_t D12 = 37;
67+
static const uint8_t D13 = 36;
68+
static const uint8_t D14 = 35;
69+
static const uint8_t D15 = 34;
70+
static const uint8_t D16 = 33;
71+
72+
// Touch input capable pins on the header
73+
static const uint8_t T1 = 1;
74+
static const uint8_t T2 = 2;
75+
static const uint8_t T3 = 3;
76+
static const uint8_t T4 = 4;
77+
static const uint8_t T5 = 5;
78+
static const uint8_t T6 = 6;
79+
static const uint8_t T7 = 7;
80+
81+
#endif /* Pins_Arduino_h */

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