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CircuitARTpre-commit-ci-lite[bot]
CircuitART
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pre-commit-ci-lite[bot]
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feat(board): Add CircuitART Zero S3 board (#10108)
* new board esp32s3 * Update boards.txt add circuitart_zero_s3 details * Update pins_arduino.h removed unnecessary pin definitions pins_arduino.h as suggested by P-R-O-C-H-Y * ci(pre-commit): Apply automatic fixes --------- Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>
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Diff for: ‎boards.txt

+161
Original file line numberDiff line numberDiff line change
@@ -38845,3 +38845,164 @@ elecrow_crowpanel_7.menu.EraseFlash.all=Enabled
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elecrow_crowpanel_7.menu.EraseFlash.all.upload.erase_cmd=-e
3884638846

3884738847
##############################################################
38848+
38849+
circuitart_zero_s3.name=CircuitART Zero S3
38850+
circuitart_zero_s3.vid.0=0x303a
38851+
circuitart_zero_s3.pid.0=0x80DB
38852+
38853+
circuitart_zero_s3.bootloader.tool=esptool_py
38854+
circuitart_zero_s3.bootloader.tool.default=esptool_py
38855+
38856+
circuitart_zero_s3.upload.tool=esptool_py
38857+
circuitart_zero_s3.upload.tool.default=esptool_py
38858+
circuitart_zero_s3.upload.tool.network=esp_ota
38859+
38860+
circuitart_zero_s3.upload.maximum_size=1310720
38861+
circuitart_zero_s3.upload.maximum_data_size=327680
38862+
circuitart_zero_s3.upload.flags=
38863+
circuitart_zero_s3.upload.extra_flags=
38864+
circuitart_zero_s3.upload.use_1200bps_touch=false
38865+
circuitart_zero_s3.upload.wait_for_upload_port=false
38866+
38867+
circuitart_zero_s3.serial.disableDTR=false
38868+
circuitart_zero_s3.serial.disableRTS=false
38869+
38870+
circuitart_zero_s3.build.tarch=xtensa
38871+
circuitart_zero_s3.build.bootloader_addr=0x0
38872+
circuitart_zero_s3.build.target=esp32s3
38873+
circuitart_zero_s3.build.mcu=esp32s3
38874+
circuitart_zero_s3.build.core=esp32
38875+
circuitart_zero_s3.build.variant=circuitart_zero_s3
38876+
circuitart_zero_s3.build.board=CIRCUITART_ZERO_S3
38877+
38878+
circuitart_zero_s3.build.usb_mode=1
38879+
circuitart_zero_s3.build.cdc_on_boot=0
38880+
circuitart_zero_s3.build.msc_on_boot=0
38881+
circuitart_zero_s3.build.dfu_on_boot=0
38882+
circuitart_zero_s3.build.f_cpu=240000000L
38883+
circuitart_zero_s3.build.flash_size=16MB
38884+
circuitart_zero_s3.build.flash_freq=80m
38885+
circuitart_zero_s3.build.flash_mode=dio
38886+
circuitart_zero_s3.build.boot=qio
38887+
circuitart_zero_s3.build.partitions=default
38888+
circuitart_zero_s3.build.defines=
38889+
circuitart_zero_s3.build.loop_core=
38890+
circuitart_zero_s3.build.event_core=
38891+
circuitart_zero_s3.build.flash_type=qio
38892+
circuitart_zero_s3.build.psram_type=qspi
38893+
circuitart_zero_s3.build.memory_type=qio_qspi
38894+
38895+
circuitart_zero_s3.menu.LoopCore.1=Core 1
38896+
circuitart_zero_s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
38897+
circuitart_zero_s3.menu.LoopCore.0=Core 0
38898+
circuitart_zero_s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
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38900+
circuitart_zero_s3.menu.EventsCore.1=Core 1
38901+
circuitart_zero_s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
38902+
circuitart_zero_s3.menu.EventsCore.0=Core 0
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circuitart_zero_s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
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38905+
circuitart_zero_s3.menu.USBMode.default=USB-OTG (TinyUSB)
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circuitart_zero_s3.menu.USBMode.default.build.usb_mode=0
38907+
circuitart_zero_s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
38908+
circuitart_zero_s3.menu.USBMode.hwcdc.build.usb_mode=1
38909+
38910+
circuitart_zero_s3.menu.CDCOnBoot.cdc=Enabled
38911+
circuitart_zero_s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
38912+
circuitart_zero_s3.menu.CDCOnBoot.default=Disabled
38913+
circuitart_zero_s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
38914+
38915+
circuitart_zero_s3.menu.MSCOnBoot.default=Disabled
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circuitart_zero_s3.menu.MSCOnBoot.default.build.msc_on_boot=0
38917+
circuitart_zero_s3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
38918+
circuitart_zero_s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
38919+
38920+
circuitart_zero_s3.menu.DFUOnBoot.default=Disabled
38921+
circuitart_zero_s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
38922+
circuitart_zero_s3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
38923+
circuitart_zero_s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
38924+
38925+
circuitart_zero_s3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
38926+
circuitart_zero_s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
38927+
circuitart_zero_s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
38928+
circuitart_zero_s3.menu.UploadMode.default=UART0 / Hardware CDC
38929+
circuitart_zero_s3.menu.UploadMode.default.upload.use_1200bps_touch=false
38930+
circuitart_zero_s3.menu.UploadMode.default.upload.wait_for_upload_port=false
38931+
38932+
circuitart_zero_s3.menu.PSRAM.enabled=Enabled
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circuitart_zero_s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
38934+
circuitart_zero_s3.menu.PSRAM.disabled=Disabled
38935+
circuitart_zero_s3.menu.PSRAM.disabled.build.defines=
38936+
38937+
circuitart_zero_s3.menu.PartitionScheme.default_16MB=Default (6.25MB APP/3.43MB SPIFFS)
38938+
circuitart_zero_s3.menu.PartitionScheme.default_16MB.build.partitions=default_16MB
38939+
circuitart_zero_s3.menu.PartitionScheme.default_16MB.upload.maximum_size=6553600
38940+
circuitart_zero_s3.menu.PartitionScheme.tinyuf2=TinyUF2 Compatibility (2MB APP/12MB FFAT)
38941+
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader_tinyuf2
38942+
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions_tinyuf2
38943+
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
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circuitart_zero_s3.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
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circuitart_zero_s3.menu.PartitionScheme.large_spiffs=Large SPIFFS (4.5MB APP/6.93MB SPIFFS)
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circuitart_zero_s3.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
38947+
circuitart_zero_s3.menu.PartitionScheme.large_spiffs.upload.maximum_size=4718592
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circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB=FFAT (3MB APP/9MB FATFS)
38949+
circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
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circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
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circuitart_zero_s3.menu.PartitionScheme.fatflash=Large FFAT (2MB APP/12.5MB FATFS)
38952+
circuitart_zero_s3.menu.PartitionScheme.fatflash.build.partitions=ffat
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circuitart_zero_s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
38954+
38955+
circuitart_zero_s3.menu.CPUFreq.240=240MHz (WiFi)
38956+
circuitart_zero_s3.menu.CPUFreq.240.build.f_cpu=240000000L
38957+
circuitart_zero_s3.menu.CPUFreq.160=160MHz (WiFi)
38958+
circuitart_zero_s3.menu.CPUFreq.160.build.f_cpu=160000000L
38959+
circuitart_zero_s3.menu.CPUFreq.80=80MHz (WiFi)
38960+
circuitart_zero_s3.menu.CPUFreq.80.build.f_cpu=80000000L
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circuitart_zero_s3.menu.CPUFreq.40=40MHz
38962+
circuitart_zero_s3.menu.CPUFreq.40.build.f_cpu=40000000L
38963+
circuitart_zero_s3.menu.CPUFreq.20=20MHz
38964+
circuitart_zero_s3.menu.CPUFreq.20.build.f_cpu=20000000L
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circuitart_zero_s3.menu.CPUFreq.10=10MHz
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circuitart_zero_s3.menu.CPUFreq.10.build.f_cpu=10000000L
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38968+
circuitart_zero_s3.menu.FlashMode.qio=QIO
38969+
circuitart_zero_s3.menu.FlashMode.qio.build.flash_mode=dio
38970+
circuitart_zero_s3.menu.FlashMode.qio.build.boot=qio
38971+
circuitart_zero_s3.menu.FlashMode.dio=DIO
38972+
circuitart_zero_s3.menu.FlashMode.dio.build.flash_mode=dio
38973+
circuitart_zero_s3.menu.FlashMode.dio.build.boot=dio
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circuitart_zero_s3.menu.UploadSpeed.921600=921600
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circuitart_zero_s3.menu.UploadSpeed.921600.upload.speed=921600
38977+
circuitart_zero_s3.menu.UploadSpeed.115200=115200
38978+
circuitart_zero_s3.menu.UploadSpeed.115200.upload.speed=115200
38979+
circuitart_zero_s3.menu.UploadSpeed.256000.windows=256000
38980+
circuitart_zero_s3.menu.UploadSpeed.256000.upload.speed=256000
38981+
circuitart_zero_s3.menu.UploadSpeed.230400.windows.upload.speed=256000
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circuitart_zero_s3.menu.UploadSpeed.230400=230400
38983+
circuitart_zero_s3.menu.UploadSpeed.230400.upload.speed=230400
38984+
circuitart_zero_s3.menu.UploadSpeed.460800.linux=460800
38985+
circuitart_zero_s3.menu.UploadSpeed.460800.macosx=460800
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circuitart_zero_s3.menu.UploadSpeed.460800.upload.speed=460800
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circuitart_zero_s3.menu.UploadSpeed.512000.windows=512000
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circuitart_zero_s3.menu.UploadSpeed.512000.upload.speed=512000
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circuitart_zero_s3.menu.DebugLevel.none=None
38991+
circuitart_zero_s3.menu.DebugLevel.none.build.code_debug=0
38992+
circuitart_zero_s3.menu.DebugLevel.error=Error
38993+
circuitart_zero_s3.menu.DebugLevel.error.build.code_debug=1
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circuitart_zero_s3.menu.DebugLevel.warn=Warn
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circuitart_zero_s3.menu.DebugLevel.warn.build.code_debug=2
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circuitart_zero_s3.menu.DebugLevel.info=Info
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circuitart_zero_s3.menu.DebugLevel.info.build.code_debug=3
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circuitart_zero_s3.menu.DebugLevel.debug=Debug
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circuitart_zero_s3.menu.DebugLevel.debug.build.code_debug=4
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circuitart_zero_s3.menu.DebugLevel.verbose=Verbose
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circuitart_zero_s3.menu.DebugLevel.verbose.build.code_debug=5
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circuitart_zero_s3.menu.EraseFlash.none=Disabled
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circuitart_zero_s3.menu.EraseFlash.none.upload.erase_cmd=
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circuitart_zero_s3.menu.EraseFlash.all=Enabled
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circuitart_zero_s3.menu.EraseFlash.all.upload.erase_cmd=-e
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##############################################################

Diff for: ‎variants/circuitart_zero_s3/bootloader_tinyuf2.bin

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Diff for: ‎variants/circuitart_zero_s3/partitions_tinyuf2.csv

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# ESP-IDF Partition Table
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# Name, Type, SubType, Offset, Size, Flags
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# bootloader.bin,, 0x1000, 32K
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# partition table,, 0x8000, 4K
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nvs, data, nvs, 0x9000, 20K,
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otadata, data, ota, 0xe000, 8K,
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ota_0, app, ota_0, 0x10000, 2048K,
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ota_1, app, ota_1, 0x210000, 2048K,
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uf2, app, factory,0x410000, 256K,
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ffat, data, fat, 0x450000, 11968K,

Diff for: ‎variants/circuitart_zero_s3/pins_arduino.h

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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include <stdint.h>
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#define USB_VID 0x303A
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#define USB_PID 0x80DB
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#define USB_MANUFACTURER "CircuitART"
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#define USB_PRODUCT "ZeroS3"
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#define USB_SERIAL "" // Empty string for MAC adddress
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// User LED
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#define LED_BUILTIN 46
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#define BUILTIN_LED LED_BUILTIN // backward compatibility
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// Neopixel
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#define PIN_NEOPIXEL 47
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// RGB_BUILTIN and RGB_BRIGHTNESS can be used in new Arduino API neopixelWrite() and digitalWrite() for blinking
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#define RGB_BUILTIN (PIN_NEOPIXEL + SOC_GPIO_PIN_COUNT)
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#define RGB_BRIGHTNESS 64
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#define NEOPIXEL_NUM 1 // number of neopixels
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static const uint8_t KEY_BUILTIN = 0;
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static const uint8_t TFT_DC = 5;
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static const uint8_t TFT_CS = 39;
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static const uint8_t TFT_RST = 40;
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static const uint8_t TFT_RESET = 40;
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static const uint8_t SD_CS = 42;
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static const uint8_t SD_CHIP_SELECT = 42;
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static const uint8_t TX = 43;
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static const uint8_t RX = 44;
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static const uint8_t TX0 = 43;
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static const uint8_t RX0 = 44;
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static const uint8_t TX1 = 40;
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static const uint8_t RX2 = 41;
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static const uint8_t SDA = 33;
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static const uint8_t SCL = 34;
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static const uint8_t SS = 39;
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static const uint8_t MOSI = 35;
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static const uint8_t SCK = 36;
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static const uint8_t MISO = 37;
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static const uint8_t DAC1 = 17;
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static const uint8_t DAC2 = 18;
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static const uint8_t A0 = 1;
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static const uint8_t A1 = 2;
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static const uint8_t A2 = 3;
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static const uint8_t A3 = 4;
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static const uint8_t A4 = 5;
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static const uint8_t A5 = 6;
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static const uint8_t A6 = 7;
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static const uint8_t A7 = 8;
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static const uint8_t A8 = 9;
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static const uint8_t A9 = 10;
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static const uint8_t A10 = 11;
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static const uint8_t A11 = 12;
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static const uint8_t A12 = 13;
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static const uint8_t A13 = 14;
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static const uint8_t A14 = 15;
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static const uint8_t A15 = 16;
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static const uint8_t A16 = 17;
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static const uint8_t A17 = 18;
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static const uint8_t T1 = 1;
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static const uint8_t T2 = 2;
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static const uint8_t T3 = 3;
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static const uint8_t T4 = 4;
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static const uint8_t T5 = 5;
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static const uint8_t T6 = 6;
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static const uint8_t T7 = 7;
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static const uint8_t T8 = 8;
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static const uint8_t T9 = 9;
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static const uint8_t T10 = 10;
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static const uint8_t T11 = 11;
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static const uint8_t T12 = 12;
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static const uint8_t T13 = 13;
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static const uint8_t T14 = 14;
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static const uint8_t T15 = 15;
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static const uint8_t D0 = 0;
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static const uint8_t D1 = 1;
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static const uint8_t D2 = 2;
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static const uint8_t D3 = 3;
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static const uint8_t D4 = 4;
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static const uint8_t D5 = 5;
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static const uint8_t D6 = 6;
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static const uint8_t D7 = 7;
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static const uint8_t D8 = 8;
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static const uint8_t D9 = 9;
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static const uint8_t D10 = 10;
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static const uint8_t D11 = 11;
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static const uint8_t D12 = 12;
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static const uint8_t D13 = 13;
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static const uint8_t D14 = 14;
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static const uint8_t D15 = 15;
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static const uint8_t D16 = 16;
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static const uint8_t D17 = 17;
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static const uint8_t D18 = 18;
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static const uint8_t D33 = 33;
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static const uint8_t D34 = 34;
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static const uint8_t D35 = 35;
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static const uint8_t D36 = 36;
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static const uint8_t D37 = 37;
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static const uint8_t D38 = 38;
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static const uint8_t D39 = 39;
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static const uint8_t D40 = 40;
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static const uint8_t D41 = 41;
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// Camera
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#define TFT_CAM_POWER 21
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#define PWDN_GPIO_NUM -1 // connected through expander
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#define RESET_GPIO_NUM -1 // connected through expander
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#define XCLK_GPIO_NUM 15
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#define SIOD_GPIO_NUM SDA
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#define SIOC_GPIO_NUM SCL
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#define Y9_GPIO_NUM 14 //16
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#define Y8_GPIO_NUM 13 //14
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#define Y7_GPIO_NUM 11 //13
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#define Y6_GPIO_NUM 10
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#define Y5_GPIO_NUM 9 //8
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#define Y4_GPIO_NUM 8 //6
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#define Y3_GPIO_NUM 7
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#define Y2_GPIO_NUM 6 //9
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#define VSYNC_GPIO_NUM 38
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#define HREF_GPIO_NUM 48
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#define PCLK_GPIO_NUM 16 //11
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#endif /* Pins_Arduino_h */

Diff for: ‎variants/circuitart_zero_s3/tinyuf2.bin

186 KB
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