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feat(uart): fixes uart higher 230400 in update baudrate
1 parent 3dd4b0d commit a509e2b

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Diff for: cores/esp32/esp32-hal-uart.c

+6-1
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
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#include "esp_rom_gpio.h"
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static int s_uart_debug_nr = 0; // UART number for debug output
37+
#define REF_TICK_BAUDRATE_LIMIT 250000 // this is maximum UART badrate using REF_TICK as clock source
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struct uart_struct_t {
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@@ -508,7 +509,7 @@ uart_t *uartBegin(
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#if SOC_UART_SUPPORT_XTAL_CLK
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uart_config.source_clk = UART_SCLK_XTAL; // valid for C2, S3, C3, C6, H2 and P4
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#elif SOC_UART_SUPPORT_REF_TICK
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if (baudrate <= 250000) {
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if (baudrate <= REF_TICK_BAUDRATE_LIMIT) {
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uart_config.source_clk = UART_SCLK_REF_TICK; // valid for ESP32, S2 - MAX supported baud rate is 250 Kbps
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} else {
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uart_config.source_clk = UART_SCLK_APB; // baudrate may change with the APB Frequency!
@@ -790,6 +791,10 @@ void uartSetBaudRate(uart_t *uart, uint32_t baud_rate) {
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return;
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}
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UART_MUTEX_LOCK();
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#if !SOC_UART_SUPPORT_XTAL_CLK
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uart_sclk_t newClkSrc = baud_rate <= REF_TICK_BAUDRATE_LIMIT ? UART_SCLK_REF_TICK : UART_SCLK_APB;
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uart_ll_set_sclk(UART_LL_GET_HW(uart->num), newClkSrc);
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#endif
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if (uart_set_baudrate(uart->num, baud_rate) == ESP_OK) {
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uart->_baudrate = baud_rate;
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} else {

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