fix(uart): type missmatch may cause error

SuGlider · web-flow · commit 673eff2c63a5 · 2025-04-02T16:47:57.000-03:00
diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c
@@ -997,7 +997,7 @@ bool uartSetBaudRate(uart_t *uart, uint32_t baud_rate) {
   }
   bool retCode = true;
   soc_module_clk_t newClkSrc = UART_SCLK_DEFAULT;
-  uint8_t previousClkSrc = uart->_uart_clock_source;
+  int8_t previousClkSrc = uart->_uart_clock_source;
 #if SOC_UART_LP_NUM >= 1
   if (uart->num >= SOC_UART_HP_NUM) { // it is a LP UART NUM
 #if !(CONFIG_ARDUINO_SERIAL_FORCE_IDF_DEFAULT_CLOCK_SOURCE)

Original file line number	Diff line number	Diff line change
`@@ -997,7 +997,7 @@ bool uartSetBaudRate(uart_t *uart, uint32_t baud_rate) {`
`997`	`997`	`}`
`998`	`998`	`bool retCode = true;`
`999`	`999`	`soc_module_clk_t newClkSrc = UART_SCLK_DEFAULT;`
`1000`		`- uint8_t previousClkSrc = uart->_uart_clock_source;`
	`1000`	`+ int8_t previousClkSrc = uart->_uart_clock_source;`
`1001`	`1001`	`#if SOC_UART_LP_NUM >= 1`
`1002`	`1002`	`if (uart->num >= SOC_UART_HP_NUM) { // it is a LP UART NUM`
`1003`	`1003`	`#if !(CONFIG_ARDUINO_SERIAL_FORCE_IDF_DEFAULT_CLOCK_SOURCE)`