@@ -281,7 +281,7 @@ void I2SClass::setInvertedPdm(bool clk){
281
281
}
282
282
#endif
283
283
284
- bool I2SClass::initSTD (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch){
284
+ bool I2SClass::initSTD (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask ){
285
285
// Peripheral manager deinit previous peripheral if pin was used
286
286
if (_mclk >= 0 ) if (!perimanClearPinBus (_mclk)){ return false ; }
287
287
if (_bclk >= 0 ) if (!perimanClearPinBus (_bclk)){ return false ; }
@@ -307,6 +307,9 @@ bool I2SClass::initSTD(uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mo
307
307
}
308
308
309
309
i2s_std_config_t i2s_config = I2S_STD_CHAN_CFG (rate, bits_cfg, ch);
310
+ if (slot_mask >= 0 && (i2s_std_slot_mask_t )slot_mask <= I2S_STD_SLOT_BOTH){
311
+ i2s_config.slot_cfg .slot_mask = (i2s_std_slot_mask_t )slot_mask;
312
+ }
310
313
if (tx_chan != NULL ) {
311
314
tx_sample_rate = rate;
312
315
tx_data_bit_width = bits_cfg;
@@ -475,11 +478,7 @@ bool I2SClass::initPDMrx(uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_
475
478
}
476
479
#endif
477
480
478
- bool I2SClass::begin (i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch
479
- #if SOC_I2S_SUPPORTS_TDM
480
- , int8_t slot_mask
481
- #endif
482
- ){
481
+ bool I2SClass::begin (i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask){
483
482
/* Setup I2S peripheral */
484
483
if (mode >= I2S_MODE_MAX){
485
484
log_e (" Invalid I2S mode selected." );
@@ -490,7 +489,7 @@ bool I2SClass::begin(i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_c
490
489
bool init = false ;
491
490
switch (_mode){
492
491
case I2S_MODE_STD:
493
- init = initSTD (rate, bits_cfg, ch);
492
+ init = initSTD (rate, bits_cfg, ch, slot_mask );
494
493
break ;
495
494
#if SOC_I2S_SUPPORTS_TDM
496
495
case I2S_MODE_TDM:
@@ -569,13 +568,16 @@ bool I2SClass::end(){
569
568
return true ;
570
569
}
571
570
572
- bool I2SClass::configureTX (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch){
571
+ bool I2SClass::configureTX (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask ){
573
572
/* Setup I2S channels */
574
573
if (tx_chan != NULL ) {
575
574
if (tx_sample_rate == rate && tx_data_bit_width == bits_cfg && tx_slot_mode == ch){
576
575
return true ;
577
576
}
578
577
i2s_std_config_t i2s_config = I2S_STD_CHAN_CFG (rate, bits_cfg, ch);
578
+ if (slot_mask >= 0 && (i2s_std_slot_mask_t )slot_mask <= I2S_STD_SLOT_BOTH){
579
+ i2s_config.slot_cfg .slot_mask = (i2s_std_slot_mask_t )slot_mask;
580
+ }
579
581
I2S_ERROR_CHECK_RETURN_FALSE (i2s_channel_disable (tx_chan));
580
582
I2S_ERROR_CHECK_RETURN_FALSE (i2s_channel_reconfig_std_clock (tx_chan, &i2s_config.clk_cfg ));
581
583
tx_sample_rate = rate;
0 commit comments