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P-R-O-C-H-YP-R-O-C-H-Y
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Merge branch 'feat/zigbee-occupancy-sensor-config' of github.com:P-R-O-C-H-Y/arduino-esp32 into feat/zigbee-occupancy-sensor-config
2 parents 428b7fa + dbcb674 commit 59ab55e

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15 files changed

+258
-83
lines changed

15 files changed

+258
-83
lines changed

Diff for: ‎cores/esp32/HWCDC.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -603,6 +603,7 @@ void HWCDC::setDebugOutput(bool en) {
603603
} else {
604604
ets_install_putc2(NULL);
605605
}
606+
ets_install_putc1(NULL); // closes UART log output
606607
}
607608

608609
#if ARDUINO_USB_MODE && ARDUINO_USB_CDC_ON_BOOT // Hardware JTAG CDC selected

Diff for: ‎cores/esp32/HardwareSerial.cpp

+18
Original file line numberDiff line numberDiff line change
@@ -607,6 +607,24 @@ bool HardwareSerial::setMode(SerialMode mode) {
607607
return uartSetMode(_uart, mode);
608608
}
609609

610+
// Sets the UART Clock Source based on the compatible SoC options
611+
// This method must be called before starting UART using begin(), otherwise it won't have any effect.
612+
// Clock Source Options are:
613+
// UART_CLK_SRC_DEFAULT :: any SoC - it will set whatever IDF defines as the default UART Clock Source
614+
// UART_CLK_SRC_APB :: ESP32, ESP32-S2, ESP32-C3 and ESP32-S3
615+
// UART_CLK_SRC_PLL :: ESP32-C2, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 and ESP32-P4
616+
// UART_CLK_SRC_XTAL :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
617+
// UART_CLK_SRC_RTC :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
618+
// UART_CLK_SRC_REF_TICK :: ESP32 and ESP32-S2
619+
// Note: CLK_SRC_PLL Freq depends on the SoC - ESP32-C2 has 40MHz, ESP32-H2 has 48MHz and ESP32-C5, C6, C61 and P4 has 80MHz
620+
// Note: ESP32-C6, C61, ESP32-P4 and ESP32-C5 have LP UART that will use only RTC_FAST or XTAL/2 as Clock Source
621+
bool HardwareSerial::setClockSource(SerialClkSrc clkSrc) {
622+
if (_uart) {
623+
log_e("No Clock Source change was done. This function must be called before beginning UART%d.", _uart_nr);
624+
return false;
625+
}
626+
return uartSetClockSource(_uart_nr, (uart_sclk_t)clkSrc);
627+
}
610628
// minimum total RX Buffer size is the UART FIFO space (128 bytes for most SoC) + 1. IDF imposition.
611629
// LP UART has FIFO of 16 bytes
612630
size_t HardwareSerial::setRxBufferSize(size_t new_size) {

Diff for: ‎cores/esp32/HardwareSerial.h

+34
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,29 @@ typedef enum {
9696
UART_PARITY_ERROR
9797
} hardwareSerial_error_t;
9898

99+
typedef enum {
100+
UART_CLK_SRC_DEFAULT = UART_SCLK_DEFAULT,
101+
#if SOC_UART_SUPPORT_APB_CLK
102+
UART_CLK_SRC_APB = UART_SCLK_APB,
103+
#endif
104+
#if SOC_UART_SUPPORT_PLL_F40M_CLK
105+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F40M,
106+
#elif SOC_UART_SUPPORT_PLL_F80M_CLK
107+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F80M,
108+
#elif CONFIG_IDF_TARGET_ESP32H2
109+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F48M,
110+
#endif
111+
#if SOC_UART_SUPPORT_XTAL_CLK
112+
UART_CLK_SRC_XTAL = UART_SCLK_XTAL,
113+
#endif
114+
#if SOC_UART_SUPPORT_RTC_CLK
115+
UART_CLK_SRC_RTC = UART_SCLK_RTC,
116+
#endif
117+
#if SOC_UART_SUPPORT_REF_TICK
118+
UART_CLK_SRC_REF_TICK = UART_SCLK_REF_TICK,
119+
#endif
120+
} SerialClkSrc;
121+
99122
#ifndef ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
100123
#ifndef CONFIG_ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
101124
#define ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE 2048
@@ -344,6 +367,17 @@ class HardwareSerial : public Stream {
344367
// UART_MODE_RS485_COLLISION_DETECT = 0x03 mode: RS485 collision detection UART mode (used for test purposes)
345368
// UART_MODE_RS485_APP_CTRL = 0x04 mode: application control RS485 UART mode (used for test purposes)
346369
bool setMode(SerialMode mode);
370+
// Used to set the UART clock source mode. It must be set before calling begin(), otherwise it won't have any effect.
371+
// Not all clock source are available to every SoC. The compatible option are listed here:
372+
// UART_CLK_SRC_DEFAULT :: any SoC - it will set whatever IDF defines as the default UART Clock Source
373+
// UART_CLK_SRC_APB :: ESP32, ESP32-S2, ESP32-C3 and ESP32-S3
374+
// UART_CLK_SRC_PLL :: ESP32-C2, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 and ESP32-P4
375+
// UART_CLK_SRC_XTAL :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
376+
// UART_CLK_SRC_RTC :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
377+
// UART_CLK_SRC_REF_TICK :: ESP32 and ESP32-S2
378+
// Note: CLK_SRC_PLL Freq depends on the SoC - ESP32-C2 has 40MHz, ESP32-H2 has 48MHz and ESP32-C5, C6, C61 and P4 has 80MHz
379+
// Note: ESP32-C6, C61, ESP32-P4 and ESP32-C5 have LP UART that will use only RTC_FAST or XTAL/2 as Clock Source
380+
bool setClockSource(SerialClkSrc clkSrc);
347381
size_t setRxBufferSize(size_t new_size);
348382
size_t setTxBufferSize(size_t new_size);
349383

Diff for: ‎cores/esp32/USB.cpp

+3
Original file line numberDiff line numberDiff line change
@@ -100,13 +100,15 @@ static bool tinyusb_device_suspended = false;
100100
void tud_mount_cb(void) {
101101
tinyusb_device_mounted = true;
102102
arduino_usb_event_data_t p;
103+
p.suspend.remote_wakeup_en = 0;
103104
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_STARTED_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
104105
}
105106

106107
// Invoked when device is unmounted
107108
void tud_umount_cb(void) {
108109
tinyusb_device_mounted = false;
109110
arduino_usb_event_data_t p;
111+
p.suspend.remote_wakeup_en = 0;
110112
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_STOPPED_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
111113
}
112114

@@ -123,6 +125,7 @@ void tud_suspend_cb(bool remote_wakeup_en) {
123125
void tud_resume_cb(void) {
124126
tinyusb_device_suspended = false;
125127
arduino_usb_event_data_t p;
128+
p.suspend.remote_wakeup_en = 0;
126129
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_RESUME_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
127130
}
128131

Diff for: ‎cores/esp32/USBCDC.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -455,6 +455,7 @@ void USBCDC::setDebugOutput(bool en) {
455455
} else {
456456
ets_install_putc2(NULL);
457457
}
458+
ets_install_putc1(NULL); // closes UART log output
458459
}
459460

460461
USBCDC::operator bool() const {

Diff for: ‎cores/esp32/esp32-hal-bt.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
#include "esp32-hal-bt.h"
1616

1717
#if SOC_BT_SUPPORTED
18-
#ifdef CONFIG_BT_ENABLED
18+
#ifdef CONFIG_BT_BLUEDROID_ENABLED
1919

2020
#if CONFIG_IDF_TARGET_ESP32
2121
bool btInUse() {

Diff for: ‎cores/esp32/esp32-hal-misc.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,9 @@
2525
#include "esp_ota_ops.h"
2626
#endif //CONFIG_APP_ROLLBACK_ENABLE
2727
#include "esp_private/startup_internal.h"
28-
#if defined(CONFIG_BT_ENABLED) && SOC_BT_SUPPORTED
28+
#if defined(CONFIG_BT_BLUEDROID_ENABLED) && SOC_BT_SUPPORTED
2929
#include "esp_bt.h"
30-
#endif //CONFIG_BT_ENABLED
30+
#endif //CONFIG_BT_BLUEDROID_ENABLED
3131
#include <sys/time.h>
3232
#include "soc/rtc.h"
3333
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
@@ -243,7 +243,7 @@ bool verifyRollbackLater() {
243243
}
244244
#endif
245245

246-
#ifdef CONFIG_BT_ENABLED
246+
#ifdef CONFIG_BT_BLUEDROID_ENABLED
247247
#if CONFIG_IDF_TARGET_ESP32
248248
//overwritten in esp32-hal-bt.c
249249
bool btInUse() __attribute__((weak));
@@ -305,7 +305,7 @@ void initArduino() {
305305
if (err) {
306306
log_e("Failed to initialize NVS! Error: %u", err);
307307
}
308-
#if defined(CONFIG_BT_ENABLED) && SOC_BT_SUPPORTED
308+
#if defined(CONFIG_BT_BLUEDROID_ENABLED) && SOC_BT_SUPPORTED
309309
if (!btInUse()) {
310310
esp_bt_controller_mem_release(ESP_BT_MODE_BTDM);
311311
}

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