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me-no-devme-no-dev
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Merge branch 'master' into release/v3.1.x
2 parents a3f2568 + f8e03cf commit 592c994

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Diff for: ‎boards.txt

+199
Original file line numberDiff line numberDiff line change
@@ -40617,6 +40617,205 @@ waveshare_esp32_s3_touch_lcd_169.menu.EraseFlash.all.upload.erase_cmd=-e
4061740617

4061840618
##############################################################
4061940619

40620+
waveshare_esp32_s3_touch_amoled_18.name=Waveshare ESP32-S3-Touch-AMOLED-1.8
40621+
waveshare_esp32_s3_touch_amoled_18.vid.0=0x303a
40622+
waveshare_esp32_s3_touch_amoled_18.pid.0=0x8255
40623+
waveshare_esp32_s3_touch_amoled_18.upload_port.0.vid=0x303a
40624+
waveshare_esp32_s3_touch_amoled_18.upload_port.0.pid=0x8255
40625+
40626+
waveshare_esp32_s3_touch_amoled_18.bootloader.tool=esptool_py
40627+
waveshare_esp32_s3_touch_amoled_18.bootloader.tool.default=esptool_py
40628+
40629+
waveshare_esp32_s3_touch_amoled_18.upload.tool=esptool_py
40630+
waveshare_esp32_s3_touch_amoled_18.upload.tool.default=esptool_py
40631+
waveshare_esp32_s3_touch_amoled_18.upload.tool.network=esp_ota
40632+
40633+
waveshare_esp32_s3_touch_amoled_18.upload.maximum_size=1310720
40634+
40635+
waveshare_esp32_s3_touch_amoled_18.upload.maximum_data_size=327680
40636+
waveshare_esp32_s3_touch_amoled_18.upload.flags=
40637+
waveshare_esp32_s3_touch_amoled_18.upload.extra_flags=
40638+
waveshare_esp32_s3_touch_amoled_18.upload.use_1200bps_touch=false
40639+
waveshare_esp32_s3_touch_amoled_18.upload.wait_for_upload_port=false
40640+
40641+
waveshare_esp32_s3_touch_amoled_18.serial.disableDTR=false
40642+
waveshare_esp32_s3_touch_amoled_18.serial.disableRTS=false
40643+
40644+
waveshare_esp32_s3_touch_amoled_18.build.tarch=xtensa
40645+
waveshare_esp32_s3_touch_amoled_18.build.bootloader_addr=0x0
40646+
waveshare_esp32_s3_touch_amoled_18.build.target=esp32s3
40647+
waveshare_esp32_s3_touch_amoled_18.build.mcu=esp32s3
40648+
waveshare_esp32_s3_touch_amoled_18.build.core=esp32
40649+
waveshare_esp32_s3_touch_amoled_18.build.variant=waveshare_esp32_s3_touch_amoled_18
40650+
waveshare_esp32_s3_touch_amoled_18.build.board=WAVESHARE_ESP32_S3_TOUCH_AMOLED_18
40651+
40652+
waveshare_esp32_s3_touch_amoled_18.build.usb_mode=1
40653+
waveshare_esp32_s3_touch_amoled_18.build.cdc_on_boot=0
40654+
waveshare_esp32_s3_touch_amoled_18.build.msc_on_boot=0
40655+
waveshare_esp32_s3_touch_amoled_18.build.dfu_on_boot=0
40656+
waveshare_esp32_s3_touch_amoled_18.build.f_cpu=240000000L
40657+
waveshare_esp32_s3_touch_amoled_18.build.flash_size=16MB
40658+
waveshare_esp32_s3_touch_amoled_18.build.flash_freq=80m
40659+
waveshare_esp32_s3_touch_amoled_18.build.flash_mode=dio
40660+
waveshare_esp32_s3_touch_amoled_18.build.boot=qio
40661+
waveshare_esp32_s3_touch_amoled_18.build.boot_freq=80m
40662+
waveshare_esp32_s3_touch_amoled_18.build.partitions=default
40663+
waveshare_esp32_s3_touch_amoled_18.build.defines=
40664+
waveshare_esp32_s3_touch_amoled_18.build.loop_core=
40665+
waveshare_esp32_s3_touch_amoled_18.build.event_core=
40666+
waveshare_esp32_s3_touch_amoled_18.build.psram_type=qspi
40667+
waveshare_esp32_s3_touch_amoled_18.build.memory_type={build.boot}_{build.psram_type}
40668+
40669+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.disabled=Disabled
40670+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.disabled.build.defines=
40671+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.disabled.build.psram_type=qspi
40672+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.enabled=Enabled
40673+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
40674+
waveshare_esp32_s3_touch_amoled_18.menu.PSRAM.enabled.build.psram_type=opi
40675+
40676+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio=QIO 80MHz
40677+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio.build.flash_mode=dio
40678+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio.build.boot=qio
40679+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio.build.boot_freq=80m
40680+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio.build.flash_freq=80m
40681+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio120=QIO 120MHz
40682+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio120.build.flash_mode=dio
40683+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio120.build.boot=qio
40684+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio120.build.boot_freq=120m
40685+
waveshare_esp32_s3_touch_amoled_18.menu.FlashMode.qio120.build.flash_freq=80m
40686+
40687+
waveshare_esp32_s3_touch_amoled_18.menu.LoopCore.1=Core 1
40688+
waveshare_esp32_s3_touch_amoled_18.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
40689+
waveshare_esp32_s3_touch_amoled_18.menu.LoopCore.0=Core 0
40690+
waveshare_esp32_s3_touch_amoled_18.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
40691+
40692+
waveshare_esp32_s3_touch_amoled_18.menu.EventsCore.1=Core 1
40693+
waveshare_esp32_s3_touch_amoled_18.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
40694+
waveshare_esp32_s3_touch_amoled_18.menu.EventsCore.0=Core 0
40695+
waveshare_esp32_s3_touch_amoled_18.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
40696+
40697+
waveshare_esp32_s3_touch_amoled_18.menu.USBMode.hwcdc=Hardware CDC and JTAG
40698+
waveshare_esp32_s3_touch_amoled_18.menu.USBMode.hwcdc.build.usb_mode=1
40699+
waveshare_esp32_s3_touch_amoled_18.menu.USBMode.default=USB-OTG (TinyUSB)
40700+
waveshare_esp32_s3_touch_amoled_18.menu.USBMode.default.build.usb_mode=0
40701+
40702+
waveshare_esp32_s3_touch_amoled_18.menu.CDCOnBoot.default=Disabled
40703+
waveshare_esp32_s3_touch_amoled_18.menu.CDCOnBoot.default.build.cdc_on_boot=0
40704+
waveshare_esp32_s3_touch_amoled_18.menu.CDCOnBoot.cdc=Enabled
40705+
waveshare_esp32_s3_touch_amoled_18.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
40706+
40707+
waveshare_esp32_s3_touch_amoled_18.menu.MSCOnBoot.default=Disabled
40708+
waveshare_esp32_s3_touch_amoled_18.menu.MSCOnBoot.default.build.msc_on_boot=0
40709+
waveshare_esp32_s3_touch_amoled_18.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
40710+
waveshare_esp32_s3_touch_amoled_18.menu.MSCOnBoot.msc.build.msc_on_boot=1
40711+
40712+
waveshare_esp32_s3_touch_amoled_18.menu.DFUOnBoot.default=Disabled
40713+
waveshare_esp32_s3_touch_amoled_18.menu.DFUOnBoot.default.build.dfu_on_boot=0
40714+
waveshare_esp32_s3_touch_amoled_18.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
40715+
waveshare_esp32_s3_touch_amoled_18.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
40716+
40717+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.default=UART0 / Hardware CDC
40718+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.default.upload.use_1200bps_touch=false
40719+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.default.upload.wait_for_upload_port=false
40720+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
40721+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.cdc.upload.use_1200bps_touch=true
40722+
waveshare_esp32_s3_touch_amoled_18.menu.UploadMode.cdc.upload.wait_for_upload_port=true
40723+
40724+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS)
40725+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
40726+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.default.build.partitions=default
40727+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
40728+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
40729+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
40730+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.no_ota.build.partitions=no_ota
40731+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
40732+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
40733+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
40734+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
40735+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
40736+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
40737+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
40738+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
40739+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
40740+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
40741+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
40742+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.huge_app.build.partitions=huge_app
40743+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
40744+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
40745+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
40746+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
40747+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker=RainMaker 4MB
40748+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
40749+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080
40750+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB
40751+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB
40752+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4116480
40753+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS)
40754+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.fatflash.build.partitions=ffat
40755+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
40756+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS)
40757+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
40758+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
40759+
40760+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.otanofs=OTA no FS (2MB APP with OTA)
40761+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.otanofs.build.custom_partitions=partitions_otanofs_4MB
40762+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.otanofs.upload.maximum_size=2031616
40763+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.all_app=Max APP (4MB APP no OTA)
40764+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.all_app.build.custom_partitions=partitions_all_app_4MB
40765+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.all_app.upload.maximum_size=4128768
40766+
40767+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.custom=Custom
40768+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.custom.build.partitions=
40769+
waveshare_esp32_s3_touch_amoled_18.menu.PartitionScheme.custom.upload.maximum_size=16777216
40770+
40771+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.240=240MHz (WiFi)
40772+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.240.build.f_cpu=240000000L
40773+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.160=160MHz (WiFi)
40774+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.160.build.f_cpu=160000000L
40775+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.80=80MHz (WiFi)
40776+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.80.build.f_cpu=80000000L
40777+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.40=40MHz
40778+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.40.build.f_cpu=40000000L
40779+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.20=20MHz
40780+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.20.build.f_cpu=20000000L
40781+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.10=10MHz
40782+
waveshare_esp32_s3_touch_amoled_18.menu.CPUFreq.10.build.f_cpu=10000000L
40783+
40784+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.921600=921600
40785+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.921600.upload.speed=921600
40786+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.115200=115200
40787+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.115200.upload.speed=115200
40788+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.256000.windows=256000
40789+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.256000.upload.speed=256000
40790+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.230400.windows.upload.speed=256000
40791+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.230400=230400
40792+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.230400.upload.speed=230400
40793+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.460800.linux=460800
40794+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.460800.macosx=460800
40795+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.460800.upload.speed=460800
40796+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.512000.windows=512000
40797+
waveshare_esp32_s3_touch_amoled_18.menu.UploadSpeed.512000.upload.speed=512000
40798+
40799+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.none=None
40800+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.none.build.code_debug=0
40801+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.error=Error
40802+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.error.build.code_debug=1
40803+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.warn=Warn
40804+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.warn.build.code_debug=2
40805+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.info=Info
40806+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.info.build.code_debug=3
40807+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.debug=Debug
40808+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.debug.build.code_debug=4
40809+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.verbose=Verbose
40810+
waveshare_esp32_s3_touch_amoled_18.menu.DebugLevel.verbose.build.code_debug=5
40811+
40812+
waveshare_esp32_s3_touch_amoled_18.menu.EraseFlash.none=Disabled
40813+
waveshare_esp32_s3_touch_amoled_18.menu.EraseFlash.none.upload.erase_cmd=
40814+
waveshare_esp32_s3_touch_amoled_18.menu.EraseFlash.all=Enabled
40815+
waveshare_esp32_s3_touch_amoled_18.menu.EraseFlash.all.upload.erase_cmd=-e
40816+
40817+
##############################################################
40818+
4062040819
waveshare_esp32_s3_lcd_169.name=Waveshare ESP32-S3-LCD-1.69
4062140820
waveshare_esp32_s3_lcd_169.vid.0=0x303a
4062240821
waveshare_esp32_s3_lcd_169.pid.0=0x8221

Diff for: ‎variants/waveshare_esp32_s3_touch_amoled_18/pins_arduino.h

+87
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,87 @@
1+
2+
#ifndef Pins_Arduino_h
3+
#define Pins_Arduino_h
4+
5+
#include <stdint.h>
6+
#include "soc/soc_caps.h"
7+
8+
// BN: ESP32 Family Device
9+
#define USB_VID 0x303a
10+
#define USB_PID 0x8255
11+
12+
#define USB_MANUFACTURER "Waveshare"
13+
#define USB_PRODUCT "ESP32-S3-Touch-AMOLED-1.8"
14+
#define USB_SERIAL ""
15+
16+
// display for SH8601
17+
#define WS_LCD_CS 12
18+
#define WS_QSPI_SIO0 4
19+
#define WS_QSPI_SI1 5
20+
#define WS_QSPI_SI2 6
21+
#define WS_QSPI_SI3 7
22+
#define WS_QSPI_SCL 11
23+
24+
// Touch for FT3168
25+
#define WS_TP_INT 21
26+
27+
// Onboard Electric buzzer & Custom buttons
28+
// GPIO and PSRAM conflict, need to pay attention when using
29+
30+
// UART0 pins
31+
static const uint8_t TX = 43;
32+
static const uint8_t RX = 44;
33+
34+
// Def for I2C that shares the IMU I2C pins
35+
static const uint8_t SDA = 14;
36+
static const uint8_t SCL = 15;
37+
38+
// Mapping based on the ESP32S3 data sheet - alternate for SPI2
39+
static const uint8_t SS = 34; // FSPICS0
40+
static const uint8_t MOSI = 35; // FSPID
41+
static const uint8_t MISO = 37; // FSPIQ
42+
static const uint8_t SCK = 36; // FSPICLK
43+
44+
// Mapping based on the ESP32S3 data sheet - alternate for OUTPUT
45+
static const uint8_t OUTPUT_IO2 = 2;
46+
static const uint8_t OUTPUT_IO3 = 3;
47+
static const uint8_t OUTPUT_IO17 = 17;
48+
static const uint8_t OUTPUT_IO18 = 18;
49+
50+
// Analog capable pins on the header
51+
static const uint8_t A0 = 1;
52+
static const uint8_t A1 = 2;
53+
static const uint8_t A2 = 3;
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static const uint8_t A3 = 4;
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static const uint8_t A4 = 5;
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static const uint8_t A5 = 6;
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static const uint8_t A6 = 7;
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// GPIO capable pins on the header
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static const uint8_t D0 = 7;
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static const uint8_t D1 = 6;
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static const uint8_t D2 = 5;
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static const uint8_t D3 = 4;
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static const uint8_t D4 = 3;
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static const uint8_t D5 = 2;
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static const uint8_t D6 = 1;
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static const uint8_t D7 = 44;
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static const uint8_t D8 = 43;
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static const uint8_t D9 = 40;
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static const uint8_t D10 = 39;
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static const uint8_t D11 = 38;
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static const uint8_t D12 = 37;
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static const uint8_t D13 = 36;
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static const uint8_t D14 = 35;
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static const uint8_t D15 = 34;
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static const uint8_t D16 = 33;
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// Touch input capable pins on the header
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static const uint8_t T1 = 1;
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static const uint8_t T2 = 2;
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static const uint8_t T3 = 3;
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static const uint8_t T4 = 4;
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static const uint8_t T5 = 5;
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static const uint8_t T6 = 6;
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static const uint8_t T7 = 7;
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#endif /* Pins_Arduino_h */

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