Skip to content

Commit 3f6c34a

Browse files
authored
fix(boards): set XTAL 26MHz for Heltec WiFi & LoRa V1 (#9889)
1 parent a992967 commit 3f6c34a

File tree

3 files changed

+45
-8
lines changed

3 files changed

+45
-8
lines changed

Diff for: boards.txt

+41-8
Original file line numberDiff line numberDiff line change
@@ -21731,12 +21731,25 @@ heltec_wifi_kit_32.build.defines=
2173121731
heltec_wifi_kit_32.build.band=LoRaWAN_NONE
2173221732
heltec_wifi_kit_32.build.LoRaWanDebugLevel=0
2173321733

21734-
heltec_wifi_kit_32.menu.PSRAM.disabled=Disabled
21735-
heltec_wifi_kit_32.menu.PSRAM.disabled.build.defines=
21736-
heltec_wifi_kit_32.menu.PSRAM.disabled.build.extra_libs=
21737-
heltec_wifi_kit_32.menu.PSRAM.enabled=Enabled
21738-
heltec_wifi_kit_32.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw
21739-
heltec_wifi_kit_32.menu.PSRAM.enabled.build.extra_libs=
21734+
heltec_wifi_kit_32.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
21735+
heltec_wifi_kit_32.menu.PartitionScheme.default.build.partitions=default
21736+
heltec_wifi_kit_32.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
21737+
heltec_wifi_kit_32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
21738+
heltec_wifi_kit_32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
21739+
heltec_wifi_kit_32.menu.PartitionScheme.no_ota.build.partitions=no_ota
21740+
heltec_wifi_kit_32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
21741+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
21742+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
21743+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
21744+
heltec_wifi_kit_32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
21745+
heltec_wifi_kit_32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
21746+
heltec_wifi_kit_32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
21747+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
21748+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
21749+
heltec_wifi_kit_32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
21750+
heltec_wifi_kit_32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
21751+
heltec_wifi_kit_32.menu.PartitionScheme.huge_app.build.partitions=huge_app
21752+
heltec_wifi_kit_32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
2174021753

2174121754
heltec_wifi_kit_32.menu.CPUFreq.240=240MHz (WiFi/BT)
2174221755
heltec_wifi_kit_32.menu.CPUFreq.240.build.f_cpu=240000000L
@@ -21907,14 +21920,34 @@ heltec_wifi_lora_32.build.variant=heltec_wifi_lora_32
2190721920
heltec_wifi_lora_32.build.board=HELTEC_WIFI_LORA_32
2190821921

2190921922
heltec_wifi_lora_32.build.f_cpu=240000000L
21910-
heltec_wifi_lora_32.build.flash_size=8MB
21923+
heltec_wifi_lora_32.build.flash_size=4MB
2191121924
heltec_wifi_lora_32.build.flash_freq=80m
2191221925
heltec_wifi_lora_32.build.flash_mode=dio
2191321926
heltec_wifi_lora_32.build.boot=qio
21914-
heltec_wifi_lora_32.build.partitions=default_8MB
21927+
heltec_wifi_lora_32.build.partitions=default
2191521928
heltec_wifi_lora_32.build.psram=
2191621929
heltec_wifi_lora_32.build.defines=-D{build.band} -DMCU_ESP32_D0 -DWIFI_LORA_32 -DHELTEC_BOARD=1 -DRADIO_CHIP_SX127X -DSLOW_CLK_TPYE=0 -DLoRaWAN_DEBUG_LEVEL={build.LoRaWanDebugLevel} -DACTIVE_REGION=LORAMAC_{build.band} -DLORAWAN_PREAMBLE_LENGTH={build.LORAWAN_PREAMBLE_LENGTH} -DLORAWAN_DEVEUI_AUTO={build.LORAWAN_DEVEUI_AUTO} {build.psram}
2191721930

21931+
heltec_wifi_lora_32.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
21932+
heltec_wifi_lora_32.menu.PartitionScheme.default.build.partitions=default
21933+
heltec_wifi_lora_32.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
21934+
heltec_wifi_lora_32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
21935+
heltec_wifi_lora_32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
21936+
heltec_wifi_lora_32.menu.PartitionScheme.no_ota.build.partitions=no_ota
21937+
heltec_wifi_lora_32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
21938+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
21939+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
21940+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
21941+
heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
21942+
heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
21943+
heltec_wifi_lora_32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
21944+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
21945+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
21946+
heltec_wifi_lora_32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
21947+
heltec_wifi_lora_32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
21948+
heltec_wifi_lora_32.menu.PartitionScheme.huge_app.build.partitions=huge_app
21949+
heltec_wifi_lora_32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
21950+
2191821951
heltec_wifi_lora_32.menu.CPUFreq.240=240MHz (WiFi/BT)
2191921952
heltec_wifi_lora_32.menu.CPUFreq.240.build.f_cpu=240000000L
2192021953
heltec_wifi_lora_32.menu.CPUFreq.160=160MHz (WiFi/BT)

Diff for: variants/heltec_wifi_kit_32/pins_arduino.h

+2
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,8 @@
77
#define DISPLAY_HEIGHT 64
88
#define DISPLAY_WIDTH 128
99

10+
#define F_XTAL_MHZ 26
11+
1012
static const uint8_t LED_BUILTIN = 25;
1113
#define BUILTIN_LED LED_BUILTIN // backward compatibility
1214
#define LED_BUILTIN LED_BUILTIN // allow testing #ifdef LED_BUILTIN

Diff for: variants/heltec_wifi_lora_32/pins_arduino.h

+2
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,8 @@
77
#define DISPLAY_HEIGHT 64
88
#define DISPLAY_WIDTH 128
99

10+
#define F_XTAL_MHZ 26
11+
1012
static const uint8_t LED_BUILTIN = 25;
1113
#define BUILTIN_LED LED_BUILTIN // backward compatibility
1214
#define LED_BUILTIN LED_BUILTIN // allow testing #ifdef LED_BUILTIN

0 commit comments

Comments
 (0)