Add support to HAL for APB frequencies different than 80MHz

me-no-dev · me-no-dev · commit 3d54e6d87164 · 2018-12-19T01:13:50.000+01:00
diff --git a/cores/esp32/esp32-hal-i2c.c b/cores/esp32/esp32-hal-i2c.c
@@ -23,6 +23,7 @@
 #include "soc/i2c_reg.h"
 #include "soc/i2c_struct.h"
 #include "soc/dport_reg.h"
+#include "soc/rtc.h"
 #include "esp_attr.h"
 
 //#define I2C_DEV(i)   (volatile i2c_dev_t *)((i)?DR_REG_I2C1_EXT_BASE:DR_REG_I2C_EXT_BASE)
@@ -1611,7 +1612,7 @@ i2c_err_t i2cSetFrequency(i2c_t * i2c, uint32_t clk_speed)
     }
     I2C_FIFO_CONF_t f;
   
-    uint32_t period = (APB_CLK_FREQ/clk_speed) / 2;
+    uint32_t period = (rtc_clk_apb_freq_get()/clk_speed) / 2;
     uint32_t halfPeriod = period/2;
     uint32_t quarterPeriod = period/4;
 
@@ -1657,7 +1658,7 @@ uint32_t i2cGetFrequency(i2c_t * i2c)
     uint32_t result = 0;
     uint32_t old_count = (i2c->dev->scl_low_period.period+i2c->dev->scl_high_period.period);
     if(old_count>0) {
-        result = APB_CLK_FREQ / old_count;
+        result = rtc_clk_apb_freq_get() / old_count;
     } else {
         result = 0;
     }
diff --git a/cores/esp32/esp32-hal-ledc.c b/cores/esp32/esp32-hal-ledc.c
@@ -21,6 +21,7 @@
 #include "soc/dport_reg.h"
 #include "soc/ledc_reg.h"
 #include "soc/ledc_struct.h"
+#include "soc/rtc.h"
 
 #if CONFIG_DISABLE_HAL_LOCKS
 #define LEDC_MUTEX_LOCK()
@@ -84,7 +85,7 @@ static void _ledcSetupTimer(uint8_t chan, uint32_t div_num, uint8_t bit_num, boo
 //max bit_num 0x1F (31)
 static double _ledcSetupTimerFreq(uint8_t chan, double freq, uint8_t bit_num)
 {
-    uint64_t clk_freq = APB_CLK_FREQ;
+    uint64_t clk_freq = rtc_clk_apb_freq_get();
     clk_freq <<= 8;//div_num is 8 bit decimal
     uint32_t div_num = (clk_freq >> bit_num) / freq;
     bool apb_clk = true;
@@ -117,7 +118,7 @@ static double _ledcTimerRead(uint8_t chan)
     LEDC_MUTEX_UNLOCK();
     uint64_t clk_freq = 1000000;
     if(apb_clk) {
-        clk_freq *= 80;
+        clk_freq = rtc_clk_apb_freq_get();
     }
     clk_freq <<= 8;//div_num is 8 bit decimal
     return (clk_freq >> bit_num) / (double)div_num;
diff --git a/cores/esp32/esp32-hal-misc.c b/cores/esp32/esp32-hal-misc.c
@@ -42,28 +42,35 @@ void yield()
     vPortYield();
 }
 
-static uint32_t _cpu_freq_mhz = 240;
+static uint32_t _cpu_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
 
-bool cpuFrequencySet(uint32_t cpu_freq_mhz){
-    if(_cpu_freq_mhz == cpu_freq_mhz){
+bool setCpuFrequency(uint32_t cpu_freq_mhz){
+    rtc_cpu_freq_config_t conf, cconf;
+    rtc_clk_cpu_freq_get_config(&cconf);
+    if(cconf.freq_mhz == cpu_freq_mhz && _cpu_freq_mhz == cpu_freq_mhz){
         return true;
     }
-    rtc_cpu_freq_config_t conf;
     if(!rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &conf)){
         log_e("CPU clock could not be set to %u MHz", cpu_freq_mhz);
         return false;
     }
+    log_i("%s: %u / %u = %u Mhz", (conf.source == RTC_CPU_FREQ_SRC_PLL)?"PLL":((conf.source == RTC_CPU_FREQ_SRC_APLL)?"APLL":((conf.source == RTC_CPU_FREQ_SRC_XTAL)?"XTAL":"8M")), conf.source_freq_mhz, conf.div, conf.freq_mhz);
+    delay(1);
     rtc_clk_cpu_freq_set_config(&conf);
     _cpu_freq_mhz = conf.freq_mhz;
     return true;
 }
 
-uint32_t cpuFrequencyGet(){
+uint32_t getCpuFrequency(){
     rtc_cpu_freq_config_t conf;
     rtc_clk_cpu_freq_get_config(&conf);
     return conf.freq_mhz;
 }
 
+uint32_t getApbFrequency(){
+    return rtc_clk_apb_freq_get();
+}
+
 unsigned long IRAM_ATTR micros()
 {
     return (unsigned long) ((esp_timer_get_time() * 240) / _cpu_freq_mhz);
@@ -109,6 +116,9 @@ bool btInUse(){ return false; }
 
 void initArduino()
 {
+#ifdef ARDUINO_CPU_FREQ
+    setCpuFrequency(ARDUINO_CPU_FREQ);
+#endif
 #if CONFIG_SPIRAM_SUPPORT
     psramInit();
 #endif
diff --git a/cores/esp32/esp32-hal-sigmadelta.c b/cores/esp32/esp32-hal-sigmadelta.c
@@ -20,6 +20,7 @@
 #include "esp32-hal-matrix.h"
 #include "soc/gpio_sd_reg.h"
 #include "soc/gpio_sd_struct.h"
+#include "soc/rtc.h"
 
 
 #if CONFIG_DISABLE_HAL_LOCKS
@@ -43,7 +44,8 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
         _sd_sys_lock = xSemaphoreCreateMutex();
     }
 #endif
-    uint32_t prescale = (10000000/(freq*32)) - 1;
+    uint32_t apb_freq = rtc_clk_apb_freq_get();
+    uint32_t prescale = (apb_freq/(freq*256)) - 1;
     if(prescale > 0xFF) {
         prescale = 0xFF;
     }
@@ -52,7 +54,7 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
     SIGMADELTA.cg.clk_en = 0;
     SIGMADELTA.cg.clk_en = 1;
     SD_MUTEX_UNLOCK();
-    return 10000000/((prescale + 1) * 32);
+    return apb_freq/((prescale + 1) * 256);
 }
 
 void sigmaDeltaWrite(uint8_t channel, uint8_t duty) //chan 0-7 duty 8 bit
diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c
@@ -26,6 +26,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/gpio_sig_map.h"
 #include "soc/dport_reg.h"
+#include "soc/rtc.h"
 
 #define SPI_CLK_IDX(p)  ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))
 #define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))
@@ -750,7 +751,7 @@ void spiEndTransaction(spi_t * spi)
     SPI_MUTEX_UNLOCK();
 }
 
-void spiWriteByteNL(spi_t * spi, uint8_t data)
+void IRAM_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
 {
     if(!spi) {
         return;
@@ -776,7 +777,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
     return data;
 }
 
-void spiWriteShortNL(spi_t * spi, uint16_t data)
+void IRAM_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
 {
     if(!spi) {
         return;
@@ -811,7 +812,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
     return data;
 }
 
-void spiWriteLongNL(spi_t * spi, uint32_t data)
+void IRAM_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
 {
     if(!spi) {
         return;
@@ -959,7 +960,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
     }
 }
 
-void spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){
+void IRAM_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){
     size_t longs = len >> 2;
     if(len & 3){
         longs++;
@@ -1017,18 +1018,20 @@ typedef union {
     };
 } spiClk_t;
 
-#define ClkRegToFreq(reg) (CPU_CLK_FREQ / (((reg)->regPre + 1) * ((reg)->regN + 1)))
+#define ClkRegToFreq(reg) (apb_freq / (((reg)->regPre + 1) * ((reg)->regN + 1)))
 
 uint32_t spiClockDivToFrequency(uint32_t clockDiv)
 {
+    uint32_t apb_freq = rtc_clk_apb_freq_get();
     spiClk_t reg = { clockDiv };
     return ClkRegToFreq(&reg);
 }
 
 uint32_t spiFrequencyToClockDiv(uint32_t freq)
 {
+    uint32_t apb_freq = rtc_clk_apb_freq_get();
 
-    if(freq >= CPU_CLK_FREQ) {
+    if(freq >= apb_freq) {
         return SPI_CLK_EQU_SYSCLK;
     }
 
@@ -1051,7 +1054,7 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)
         reg.regN = calN;
 
         while(calPreVari++ <= 1) {
-            calPre = (((CPU_CLK_FREQ / (reg.regN + 1)) / freq) - 1) + calPreVari;
+            calPre = (((apb_freq / (reg.regN + 1)) / freq) - 1) + calPreVari;
             if(calPre > 0x1FFF) {
                 reg.regPre = 0x1FFF;
             } else if(calPre <= 0) {
diff --git a/cores/esp32/esp32-hal-timer.c b/cores/esp32/esp32-hal-timer.c
@@ -84,7 +84,7 @@ void IRAM_ATTR __timerISR(void * arg){
     i = 4;
     //call callbacks
     while(i--){
-        if(__timerInterruptHandlers[i] && status & (1 << i)){
+        if(__timerInterruptHandlers[i] && (status & (1 << i))){
             __timerInterruptHandlers[i]();
         }
     }
diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c
@@ -27,6 +27,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/gpio_sig_map.h"
 #include "soc/dport_reg.h"
+#include "soc/rtc.h"
 #include "esp_intr_alloc.h"
 
 #define UART_REG_BASE(u)    ((u==0)?DR_REG_UART_BASE:(      (u==1)?DR_REG_UART1_BASE:(    (u==2)?DR_REG_UART2_BASE:0)))
@@ -352,7 +353,7 @@ void uartSetBaudRate(uart_t* uart, uint32_t baud_rate)
         return;
     }
     UART_MUTEX_LOCK();
-    uint32_t clk_div = ((UART_CLK_FREQ<<4)/baud_rate);
+    uint32_t clk_div = ((rtc_clk_apb_freq_get()<<4)/baud_rate);
     uart->dev->clk_div.div_int = clk_div>>4 ;
     uart->dev->clk_div.div_frag = clk_div & 0xf;
     UART_MUTEX_UNLOCK();
diff --git a/cores/esp32/esp32-hal.h b/cores/esp32/esp32-hal.h
@@ -72,8 +72,14 @@ void yield(void);
 //returns chip temperature in Celsius
 float temperatureRead();
 
-bool cpuFrequencySet(uint32_t cpu_freq_mhz);
-uint32_t cpuFrequencyGet();
+//function takes the following frequencies as valid values:
+//  240, 160, 80                     <<< For all XTAL types
+//  40, 20, 13, 10, 8, 5, 4, 3, 2, 1 <<< For 40MHz XTAL
+//  26, 13, 5, 4, 3, 2, 1            <<< For 26MHz XTAL
+//  24, 12, 8, 6, 4, 3, 2, 1         <<< For 24MHz XTAL
+bool setCpuFrequency(uint32_t cpu_freq_mhz);
+uint32_t getCpuFrequency();
+uint32_t getApbFrequency();
 
 unsigned long micros();
 unsigned long millis();

Original file line number	Diff line number	Diff line change
`@@ -26,6 +26,7 @@`
`26`	`26`	`#include "soc/io_mux_reg.h"`
`27`	`27`	`#include "soc/gpio_sig_map.h"`
`28`	`28`	`#include "soc/dport_reg.h"`
	`29`	`+#include "soc/rtc.h"`
`29`	`30`
`30`	`31`	`#define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0))))`
`31`	`32`	`#define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0))))`
`@@ -750,7 +751,7 @@ void spiEndTransaction(spi_t * spi)`
`750`	`751`	`SPI_MUTEX_UNLOCK();`
`751`	`752`	`}`
`752`	`753`
`753`		`-void spiWriteByteNL(spi_t * spi, uint8_t data)`
	`754`	`+void IRAM_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)`
`754`	`755`	`{`
`755`	`756`	`if(!spi) {`
`756`	`757`	`return;`
`@@ -776,7 +777,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)`
`776`	`777`	`return data;`
`777`	`778`	`}`
`778`	`779`
`779`		`-void spiWriteShortNL(spi_t * spi, uint16_t data)`
	`780`	`+void IRAM_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)`
`780`	`781`	`{`
`781`	`782`	`if(!spi) {`
`782`	`783`	`return;`
`@@ -811,7 +812,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)`
`811`	`812`	`return data;`
`812`	`813`	`}`
`813`	`814`
`814`		`-void spiWriteLongNL(spi_t * spi, uint32_t data)`
	`815`	`+void IRAM_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)`
`815`	`816`	`{`
`816`	`817`	`if(!spi) {`
`817`	`818`	`return;`
`@@ -959,7 +960,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)`
`959`	`960`	`}`
`960`	`961`	`}`
`961`	`962`
`962`		`-void spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){`
	`963`	`+void IRAM_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, size_t len){`
`963`	`964`	`size_t longs = len >> 2;`
`964`	`965`	`if(len & 3){`
`965`	`966`	`longs++;`
`@@ -1017,18 +1018,20 @@ typedef union {`
`1017`	`1018`	`};`
`1018`	`1019`	`} spiClk_t;`
`1019`	`1020`
`1020`		`-#define ClkRegToFreq(reg) (CPU_CLK_FREQ / (((reg)->regPre + 1) * ((reg)->regN + 1)))`
	`1021`	`+#define ClkRegToFreq(reg) (apb_freq / (((reg)->regPre + 1) * ((reg)->regN + 1)))`
`1021`	`1022`
`1022`	`1023`	`uint32_t spiClockDivToFrequency(uint32_t clockDiv)`
`1023`	`1024`	`{`
	`1025`	`+ uint32_t apb_freq = rtc_clk_apb_freq_get();`
`1024`	`1026`	`spiClk_t reg = { clockDiv };`
`1025`	`1027`	`return ClkRegToFreq(&reg);`
`1026`	`1028`	`}`
`1027`	`1029`
`1028`	`1030`	`uint32_t spiFrequencyToClockDiv(uint32_t freq)`
`1029`	`1031`	`{`
	`1032`	`+ uint32_t apb_freq = rtc_clk_apb_freq_get();`
`1030`	`1033`
`1031`		`- if(freq >= CPU_CLK_FREQ) {`
	`1034`	`+ if(freq >= apb_freq) {`
`1032`	`1035`	`return SPI_CLK_EQU_SYSCLK;`
`1033`	`1036`	`}`
`1034`	`1037`
`@@ -1051,7 +1054,7 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)`
`1051`	`1054`	`reg.regN = calN;`
`1052`	`1055`
`1053`	`1056`	`while(calPreVari++ <= 1) {`
`1054`		`- calPre = (((CPU_CLK_FREQ / (reg.regN + 1)) / freq) - 1) + calPreVari;`
	`1057`	`+ calPre = (((apb_freq / (reg.regN + 1)) / freq) - 1) + calPreVari;`
`1055`	`1058`	`if(calPre > 0x1FFF) {`
`1056`	`1059`	`reg.regPre = 0x1FFF;`
`1057`	`1060`	`} else if(calPre <= 0) {`
Original file line number	Diff line number	Diff line change
`@@ -84,7 +84,7 @@ void IRAM_ATTR __timerISR(void * arg){`
`84`	`84`	`i = 4;`
`85`	`85`	`//call callbacks`
`86`	`86`	`while(i--){`
`87`		`- if(__timerInterruptHandlers[i] && status & (1 << i)){`
	`87`	`+ if(__timerInterruptHandlers[i] && (status & (1 << i))){`
`88`	`88`	`__timerInterruptHandlers[i]();`
`89`	`89`	`}`
`90`	`90`	`}`