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XylopyrographerXylopyrographer
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feat(board) add Waveshare ESP32-S3-Matrix
Adds support for the Waveshare ESP32-S3-Matrix board. Includes changes to the Rainmaker partitions as per PR #10046 .
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Diff for: ‎boards.txt

100644100755
+195
Original file line numberDiff line numberDiff line change
@@ -37362,6 +37362,201 @@ Geekble_ESP32C3.menu.EraseFlash.none.upload.erase_cmd=
3736237362
Geekble_ESP32C3.menu.EraseFlash.all=Enabled
3736337363
Geekble_ESP32C3.menu.EraseFlash.all.upload.erase_cmd=-e
3736437364

37365+
######################################################
37366+
37367+
ws_esp32_s3_matrix.name=Waveshare ESP32-S3-Matrix
37368+
ws_esp32_s3_matrix.vid.0=0x303a
37369+
ws_esp32_s3_matrix.pid.0=0x81FB
37370+
ws_esp32_s3_matrix.upload_port.0.vid=0x303a
37371+
ws_esp32_s3_matrix.upload_port.0.pid=0x81FB
37372+
37373+
ws_esp32_s3_matrix.bootloader.tool=esptool_py
37374+
ws_esp32_s3_matrix.bootloader.tool.default=esptool_py
37375+
37376+
ws_esp32_s3_matrix.upload.tool=esptool_py
37377+
ws_esp32_s3_matrix.upload.tool.default=esptool_py
37378+
ws_esp32_s3_matrix.upload.tool.network=esp_ota
37379+
37380+
ws_esp32_s3_matrix.upload.maximum_size=1310720
37381+
37382+
ws_esp32_s3_matrix.upload.maximum_data_size=327680
37383+
ws_esp32_s3_matrix.upload.flags=
37384+
ws_esp32_s3_matrix.upload.extra_flags=
37385+
ws_esp32_s3_matrix.upload.use_1200bps_touch=false
37386+
ws_esp32_s3_matrix.upload.wait_for_upload_port=false
37387+
37388+
ws_esp32_s3_matrix.serial.disableDTR=false
37389+
ws_esp32_s3_matrix.serial.disableRTS=false
37390+
37391+
ws_esp32_s3_matrix.build.tarch=xtensa
37392+
ws_esp32_s3_matrix.build.bootloader_addr=0x0
37393+
ws_esp32_s3_matrix.build.target=esp32s3
37394+
ws_esp32_s3_matrix.build.mcu=esp32s3
37395+
ws_esp32_s3_matrix.build.core=esp32
37396+
ws_esp32_s3_matrix.build.variant=ws_esp32_s3_matrix
37397+
ws_esp32_s3_matrix.build.board=WS_ESP32_S3_MATRIX
37398+
37399+
ws_esp32_s3_matrix.build.usb_mode=1
37400+
ws_esp32_s3_matrix.build.cdc_on_boot=0
37401+
ws_esp32_s3_matrix.build.msc_on_boot=0
37402+
ws_esp32_s3_matrix.build.dfu_on_boot=0
37403+
ws_esp32_s3_matrix.build.f_cpu=240000000L
37404+
ws_esp32_s3_matrix.build.flash_size=4MB
37405+
ws_esp32_s3_matrix.build.flash_freq=80m
37406+
ws_esp32_s3_matrix.build.flash_mode=dio
37407+
ws_esp32_s3_matrix.build.boot=qio
37408+
ws_esp32_s3_matrix.build.boot_freq=80m
37409+
ws_esp32_s3_matrix.build.partitions=default
37410+
ws_esp32_s3_matrix.build.defines=
37411+
ws_esp32_s3_matrix.build.loop_core=
37412+
ws_esp32_s3_matrix.build.event_core=
37413+
ws_esp32_s3_matrix.build.psram_type=qspi
37414+
ws_esp32_s3_matrix.build.memory_type={build.boot}_{build.psram_type}
37415+
37416+
ws_esp32_s3_matrix.menu.PSRAM.disabled=Disabled
37417+
ws_esp32_s3_matrix.menu.PSRAM.disabled.build.defines=
37418+
ws_esp32_s3_matrix.menu.PSRAM.disabled.build.psram_type=qspi
37419+
ws_esp32_s3_matrix.menu.PSRAM.enabled=Enabled
37420+
ws_esp32_s3_matrix.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
37421+
ws_esp32_s3_matrix.menu.PSRAM.enabled.build.psram_type=qspi
37422+
37423+
ws_esp32_s3_matrix.menu.FlashMode.qio=QIO 80MHz
37424+
ws_esp32_s3_matrix.menu.FlashMode.qio.build.flash_mode=dio
37425+
ws_esp32_s3_matrix.menu.FlashMode.qio.build.boot=qio
37426+
ws_esp32_s3_matrix.menu.FlashMode.qio.build.boot_freq=80m
37427+
ws_esp32_s3_matrix.menu.FlashMode.qio.build.flash_freq=80m
37428+
ws_esp32_s3_matrix.menu.FlashMode.qio120=QIO 120MHz
37429+
ws_esp32_s3_matrix.menu.FlashMode.qio120.build.flash_mode=dio
37430+
ws_esp32_s3_matrix.menu.FlashMode.qio120.build.boot=qio
37431+
ws_esp32_s3_matrix.menu.FlashMode.qio120.build.boot_freq=120m
37432+
ws_esp32_s3_matrix.menu.FlashMode.qio120.build.flash_freq=80m
37433+
37434+
ws_esp32_s3_matrix.menu.FlashSize.4M=4MB (32Mb)
37435+
ws_esp32_s3_matrix.menu.FlashSize.4M.build.flash_size=4MB
37436+
37437+
ws_esp32_s3_matrix.menu.LoopCore.1=Core 1
37438+
ws_esp32_s3_matrix.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
37439+
ws_esp32_s3_matrix.menu.LoopCore.0=Core 0
37440+
ws_esp32_s3_matrix.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
37441+
37442+
ws_esp32_s3_matrix.menu.EventsCore.1=Core 1
37443+
ws_esp32_s3_matrix.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
37444+
ws_esp32_s3_matrix.menu.EventsCore.0=Core 0
37445+
ws_esp32_s3_matrix.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
37446+
37447+
ws_esp32_s3_matrix.menu.USBMode.hwcdc=Hardware CDC and JTAG
37448+
ws_esp32_s3_matrix.menu.USBMode.hwcdc.build.usb_mode=1
37449+
ws_esp32_s3_matrix.menu.USBMode.default=USB-OTG (TinyUSB)
37450+
ws_esp32_s3_matrix.menu.USBMode.default.build.usb_mode=0
37451+
37452+
ws_esp32_s3_matrix.menu.CDCOnBoot.default=Disabled
37453+
ws_esp32_s3_matrix.menu.CDCOnBoot.default.build.cdc_on_boot=0
37454+
ws_esp32_s3_matrix.menu.CDCOnBoot.cdc=Enabled
37455+
ws_esp32_s3_matrix.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
37456+
37457+
ws_esp32_s3_matrix.menu.MSCOnBoot.default=Disabled
37458+
ws_esp32_s3_matrix.menu.MSCOnBoot.default.build.msc_on_boot=0
37459+
ws_esp32_s3_matrix.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
37460+
ws_esp32_s3_matrix.menu.MSCOnBoot.msc.build.msc_on_boot=1
37461+
37462+
ws_esp32_s3_matrix.menu.DFUOnBoot.default=Disabled
37463+
ws_esp32_s3_matrix.menu.DFUOnBoot.default.build.dfu_on_boot=0
37464+
ws_esp32_s3_matrix.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
37465+
ws_esp32_s3_matrix.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
37466+
37467+
ws_esp32_s3_matrix.menu.UploadMode.default=UART0 / Hardware CDC
37468+
ws_esp32_s3_matrix.menu.UploadMode.default.upload.use_1200bps_touch=false
37469+
ws_esp32_s3_matrix.menu.UploadMode.default.upload.wait_for_upload_port=false
37470+
ws_esp32_s3_matrix.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
37471+
ws_esp32_s3_matrix.menu.UploadMode.cdc.upload.use_1200bps_touch=true
37472+
ws_esp32_s3_matrix.menu.UploadMode.cdc.upload.wait_for_upload_port=true
37473+
37474+
ws_esp32_s3_matrix.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
37475+
ws_esp32_s3_matrix.menu.PartitionScheme.default.build.partitions=default
37476+
ws_esp32_s3_matrix.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
37477+
ws_esp32_s3_matrix.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
37478+
ws_esp32_s3_matrix.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
37479+
ws_esp32_s3_matrix.menu.PartitionScheme.no_ota.build.partitions=no_ota
37480+
ws_esp32_s3_matrix.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
37481+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
37482+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
37483+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
37484+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
37485+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
37486+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
37487+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
37488+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
37489+
ws_esp32_s3_matrix.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
37490+
ws_esp32_s3_matrix.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
37491+
ws_esp32_s3_matrix.menu.PartitionScheme.huge_app.build.partitions=huge_app
37492+
ws_esp32_s3_matrix.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
37493+
ws_esp32_s3_matrix.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
37494+
ws_esp32_s3_matrix.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
37495+
ws_esp32_s3_matrix.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
37496+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker=RainMaker 4MB
37497+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker.build.partitions=rainmaker
37498+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080
37499+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA
37500+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota
37501+
ws_esp32_s3_matrix.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656
37502+
37503+
ws_esp32_s3_matrix.menu.PartitionScheme.otanofs=OTA no FS (2MB APP with OTA)
37504+
ws_esp32_s3_matrix.menu.PartitionScheme.otanofs.build.custom_partitions=partitions_otanofs_4MB
37505+
ws_esp32_s3_matrix.menu.PartitionScheme.otanofs.upload.maximum_size=2031616
37506+
ws_esp32_s3_matrix.menu.PartitionScheme.all_app=Max APP (4MB APP no OTA)
37507+
ws_esp32_s3_matrix.menu.PartitionScheme.all_app.build.custom_partitions=partitions_all_app_4MB
37508+
ws_esp32_s3_matrix.menu.PartitionScheme.all_app.upload.maximum_size=4128768
37509+
37510+
ws_esp32_s3_matrix.menu.PartitionScheme.custom=Custom
37511+
ws_esp32_s3_matrix.menu.PartitionScheme.custom.build.partitions=
37512+
ws_esp32_s3_matrix.menu.PartitionScheme.custom.upload.maximum_size=16777216
37513+
37514+
ws_esp32_s3_matrix.menu.CPUFreq.240=240MHz (WiFi)
37515+
ws_esp32_s3_matrix.menu.CPUFreq.240.build.f_cpu=240000000L
37516+
ws_esp32_s3_matrix.menu.CPUFreq.160=160MHz (WiFi)
37517+
ws_esp32_s3_matrix.menu.CPUFreq.160.build.f_cpu=160000000L
37518+
ws_esp32_s3_matrix.menu.CPUFreq.80=80MHz (WiFi)
37519+
ws_esp32_s3_matrix.menu.CPUFreq.80.build.f_cpu=80000000L
37520+
ws_esp32_s3_matrix.menu.CPUFreq.40=40MHz
37521+
ws_esp32_s3_matrix.menu.CPUFreq.40.build.f_cpu=40000000L
37522+
ws_esp32_s3_matrix.menu.CPUFreq.20=20MHz
37523+
ws_esp32_s3_matrix.menu.CPUFreq.20.build.f_cpu=20000000L
37524+
ws_esp32_s3_matrix.menu.CPUFreq.10=10MHz
37525+
ws_esp32_s3_matrix.menu.CPUFreq.10.build.f_cpu=10000000L
37526+
37527+
ws_esp32_s3_matrix.menu.UploadSpeed.921600=921600
37528+
ws_esp32_s3_matrix.menu.UploadSpeed.921600.upload.speed=921600
37529+
ws_esp32_s3_matrix.menu.UploadSpeed.115200=115200
37530+
ws_esp32_s3_matrix.menu.UploadSpeed.115200.upload.speed=115200
37531+
ws_esp32_s3_matrix.menu.UploadSpeed.256000.windows=256000
37532+
ws_esp32_s3_matrix.menu.UploadSpeed.256000.upload.speed=256000
37533+
ws_esp32_s3_matrix.menu.UploadSpeed.230400.windows.upload.speed=256000
37534+
ws_esp32_s3_matrix.menu.UploadSpeed.230400=230400
37535+
ws_esp32_s3_matrix.menu.UploadSpeed.230400.upload.speed=230400
37536+
ws_esp32_s3_matrix.menu.UploadSpeed.460800.linux=460800
37537+
ws_esp32_s3_matrix.menu.UploadSpeed.460800.macosx=460800
37538+
ws_esp32_s3_matrix.menu.UploadSpeed.460800.upload.speed=460800
37539+
ws_esp32_s3_matrix.menu.UploadSpeed.512000.windows=512000
37540+
ws_esp32_s3_matrix.menu.UploadSpeed.512000.upload.speed=512000
37541+
37542+
ws_esp32_s3_matrix.menu.DebugLevel.none=None
37543+
ws_esp32_s3_matrix.menu.DebugLevel.none.build.code_debug=0
37544+
ws_esp32_s3_matrix.menu.DebugLevel.error=Error
37545+
ws_esp32_s3_matrix.menu.DebugLevel.error.build.code_debug=1
37546+
ws_esp32_s3_matrix.menu.DebugLevel.warn=Warn
37547+
ws_esp32_s3_matrix.menu.DebugLevel.warn.build.code_debug=2
37548+
ws_esp32_s3_matrix.menu.DebugLevel.info=Info
37549+
ws_esp32_s3_matrix.menu.DebugLevel.info.build.code_debug=3
37550+
ws_esp32_s3_matrix.menu.DebugLevel.debug=Debug
37551+
ws_esp32_s3_matrix.menu.DebugLevel.debug.build.code_debug=4
37552+
ws_esp32_s3_matrix.menu.DebugLevel.verbose=Verbose
37553+
ws_esp32_s3_matrix.menu.DebugLevel.verbose.build.code_debug=5
37554+
37555+
ws_esp32_s3_matrix.menu.EraseFlash.none=Disabled
37556+
ws_esp32_s3_matrix.menu.EraseFlash.none.upload.erase_cmd=
37557+
ws_esp32_s3_matrix.menu.EraseFlash.all=Enabled
37558+
ws_esp32_s3_matrix.menu.EraseFlash.all.upload.erase_cmd=-e
37559+
3736537560
##############################################################
3736637561

3736737562
waveshare_esp32s3_touch_lcd_128.name=Waveshare ESP32S3 Touch LCD 128

Diff for: ‎variants/ws_esp32_s3_matrix/partitions_all_app_4MB.csv

+4
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@@ -0,0 +1,4 @@
1+
# Name, Type, SubType, Offset, Size, Flags
2+
nvs, data, nvs, 0x9000, 0x5000,
3+
factory, app, factory, 0x10000, 0x3F0000,
4+

Diff for: ‎variants/ws_esp32_s3_matrix/partitions_otanofs_4MB.csv

+6
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@@ -0,0 +1,6 @@
1+
# Name, Type, SubType, Offset, Size, Flags
2+
nvs, data, nvs, 0x9000, 0x5000,
3+
otadata, data, ota, 0xE000, 0x2000,
4+
app0, app, ota_0, 0x10000, 0x1F0000,
5+
app1, app, ota_1, 0x200000, 0x1F0000,
6+
coredump, data, coredump, 0x3F0000, 0x10000,

Diff for: ‎variants/ws_esp32_s3_matrix/pins_arduino.h

+77
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@@ -0,0 +1,77 @@
1+
2+
#ifndef Pins_Arduino_h
3+
#define Pins_Arduino_h
4+
5+
#include <stdint.h>
6+
#include "soc/soc_caps.h"
7+
8+
// BN: ESP32 Family Device
9+
#define USB_VID 0x303a
10+
#define USB_PID 0x1001
11+
12+
#define USB_MANUFACTURER "Waveshare"
13+
#define USB_PRODUCT "ESP32-S3-Matrix"
14+
#define USB_SERIAL ""
15+
16+
// Onboard 8 x 8 Matrix panel
17+
#define WS_MATRIX_DIN 14
18+
19+
// Onboard QMI8658 IMU
20+
#define WS_IMU_SDA 11
21+
#define WS_IMU_SCL 12
22+
#define WS_IMU_ADDRESS 0x6B
23+
#define WS_IMU_INT1 10
24+
#define WS_IMU_INT2 13
25+
26+
// UART0 pins
27+
static const uint8_t TX = 43;
28+
static const uint8_t RX = 44;
29+
30+
// Def for I2C that shares the IMU I2C pins
31+
static const uint8_t SDA = 11;
32+
static const uint8_t SCL = 12;
33+
34+
// Mapping based on the ESP32S3 data sheet - alternate for SPI2
35+
static const uint8_t SS = 34; // FSPICS0
36+
static const uint8_t MOSI = 35; // FSPID
37+
static const uint8_t MISO = 37; // FSPIQ
38+
static const uint8_t SCK = 36; // FSPICLK
39+
40+
// Analog capable pins on the header
41+
static const uint8_t A0 = 1;
42+
static const uint8_t A1 = 2;
43+
static const uint8_t A2 = 3;
44+
static const uint8_t A3 = 4;
45+
static const uint8_t A4 = 5;
46+
static const uint8_t A5 = 6;
47+
static const uint8_t A6 = 7;
48+
49+
// GPIO capable pins on the header
50+
static const uint8_t D0 = 7;
51+
static const uint8_t D1 = 6;
52+
static const uint8_t D2 = 5;
53+
static const uint8_t D3 = 4;
54+
static const uint8_t D4 = 3;
55+
static const uint8_t D5 = 2;
56+
static const uint8_t D6 = 1;
57+
static const uint8_t D7 = 44;
58+
static const uint8_t D8 = 43;
59+
static const uint8_t D9 = 40;
60+
static const uint8_t D10 = 39;
61+
static const uint8_t D11 = 38;
62+
static const uint8_t D12 = 37;
63+
static const uint8_t D13 = 36;
64+
static const uint8_t D14 = 35;
65+
static const uint8_t D15 = 34;
66+
static const uint8_t D16 = 33;
67+
68+
// Touch input capable pins on the header
69+
static const uint8_t T1 = 1;
70+
static const uint8_t T2 = 2;
71+
static const uint8_t T3 = 3;
72+
static const uint8_t T4 = 4;
73+
static const uint8_t T5 = 5;
74+
static const uint8_t T6 = 6;
75+
static const uint8_t T7 = 7;
76+
77+
#endif /* Pins_Arduino_h */

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