Initial ESP32C3 hal support

Author: me-no-dev

Diff for: CMakeLists.txt

@@ -124,7 +124,7 @@ set(BLE_SRCS
 
 
 set(includedirs
-  variants/esp32/
+  variants/${IDF_TARGET}/
   cores/esp32/
   libraries/ArduinoOTA/src
   libraries/AsyncUDP/src

Diff for: cores/esp32/Esp.cpp

@@ -37,6 +37,8 @@ extern "C" {
 #include "soc/efuse_reg.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/spi_flash.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
@@ -265,6 +267,10 @@ const char * EspClass::getChipModel(void)
     }
 #elif CONFIG_IDF_TARGET_ESP32S2
     return "ESP32-S2";
+#elif CONFIG_IDF_TARGET_ESP32S3
+    return "ESP32-S3";
+#elif CONFIG_IDF_TARGET_ESP32C3
+    return "ESP32-C3";
 #endif
 }
 

Diff for: cores/esp32/HardwareSerial.cpp

@@ -66,6 +66,9 @@ void HardwareSerial::begin(unsigned long baud, uint32_t config, int8_t rxPin, in
 #elif CONFIG_IDF_TARGET_ESP32S2
         rxPin = 44;
         txPin = 43;
+#elif CONFIG_IDF_TARGET_ESP32C3
+        rxPin = 20;
+        txPin = 21;
 #endif
     }
     if(_uart_nr == 1 && rxPin < 0 && txPin < 0) {

Diff for: cores/esp32/MD5Builder.h

@@ -28,6 +28,8 @@
 #include "esp32/rom/md5_hash.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/md5_hash.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/md5_hash.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif

Diff for: cores/esp32/esp32-hal-adc.c

@@ -16,16 +16,15 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "esp_attr.h"
-#include "soc/rtc_io_reg.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/sens_reg.h"
-
 #include "driver/adc.h"
 
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
 #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
 #include "esp_adc_cal.h"
+#include "soc/sens_reg.h"
+#include "soc/rtc_io_reg.h"
 #include "esp32/rom/ets_sys.h"
 #include "esp_intr_alloc.h"
 #define DEFAULT_VREF    1100
@@ -34,6 +33,10 @@ static uint16_t __analogVRef = 0;
 static uint8_t __analogVRefPin = 0;
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
+#include "soc/sens_reg.h"
+#include "soc/rtc_io_reg.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/ets_sys.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
@@ -51,7 +54,9 @@ void __analogSetClockDiv(uint8_t clockDiv){
         clockDiv = 1;
     }
     __analogClockDiv = clockDiv;
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
     adc_set_clk_div(__analogClockDiv);
+#endif
 }
 
 void __analogSetAttenuation(adc_attenuation_t attenuation)
@@ -114,11 +119,14 @@ bool __adcAttachPin(uint8_t pin){
             WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, touch);
         }
 #endif
-    } else if(pin == 25){
+    }
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+    else if(pin == 25){
         CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_XPD_DAC | RTC_IO_PDAC1_DAC_XPD_FORCE);//stop dac1
     } else if(pin == 26){
         CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_XPD_DAC | RTC_IO_PDAC2_DAC_XPD_FORCE);//stop dac2
     }
+#endif
 
     pinMode(pin, ANALOG);
     __analogSetPinAttenuation(pin, __analogAttenuation);

Diff for: cores/esp32/esp32-hal-cpu.c

@@ -16,7 +16,6 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"
 #include "freertos/task.h"
-#include "freertos/xtensa_timer.h"
 #include "esp_attr.h"
 #include "esp_log.h"
 #include "soc/rtc.h"
@@ -29,9 +28,13 @@
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
 #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
+#include "freertos/xtensa_timer.h"
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
+#include "freertos/xtensa_timer.h"
 #include "esp32s2/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32C3
+#include "esp32c3/rom/rtc.h"
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
@@ -141,10 +144,14 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
 }
 
 static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
+#if CONFIG_IDF_TARGET_ESP32C3
+	return APB_CLK_FREQ;
+#else
     if(conf->freq_mhz >= 80){
         return 80 * MHZ;
     }
     return (conf->source_freq_mhz * MHZ) / conf->div;
+#endif
 }
 
 void esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us); //private in IDF
@@ -219,8 +226,12 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
         esp_timer_impl_update_apb_freq(apb / MHZ);
     }
     //Update FreeRTOS Tick Divisor
+#if CONFIG_IDF_TARGET_ESP32C3
+
+#else
     uint32_t fcpu = (conf.freq_mhz >= 80)?(conf.freq_mhz * MHZ):(apb);
     _xt_tick_divisor = fcpu / XT_TICK_PER_SEC;
+#endif
     //Call peripheral functions after the APB change
     if(apb_change_callbacks){
         triggerApbChangeCallback(APB_AFTER_CHANGE, capb, apb);

Diff for: cores/esp32/esp32-hal-dac.c

@@ -13,24 +13,29 @@
 // limitations under the License.
 
 #include "esp32-hal.h"
-#include "esp_attr.h"
-#include "soc/rtc_io_reg.h"
-#include "soc/rtc_cntl_reg.h"
-#include "soc/rtc_io_periph.h"
-#include "soc/sens_reg.h"
-#include "soc/sens_struct.h"
-#include "driver/dac.h"
 
 #if CONFIG_IDF_TARGET_ESP32
+#include "soc/rtc_io_reg.h"
 #define DAC1 25
 #define DAC2 26
 #elif CONFIG_IDF_TARGET_ESP32S2
+#include "soc/rtc_io_reg.h"
 #define DAC1 17
 #define DAC2 18
+#elif CONFIG_IDF_TARGET_ESP32C3
+#define NODAC
 #else
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
 
+#ifndef NODAC
+#include "esp_attr.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_io_periph.h"
+#include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#include "driver/dac.h"
+
 void ARDUINO_ISR_ATTR __dacWrite(uint8_t pin, uint8_t value)
 {
     if(pin < DAC1 || pin > DAC2){
@@ -54,3 +59,5 @@ void ARDUINO_ISR_ATTR __dacWrite(uint8_t pin, uint8_t value)
 }
 
 extern void dacWrite(uint8_t pin, uint8_t value) __attribute__ ((weak, alias("__dacWrite")));
+
+#endif