Skip to content

Commit 03db4b5

Browse files
me-no-devme-no-dev
committed
Initial support for ESP32H2
1 parent 5364216 commit 03db4b5

File tree

13 files changed

+158
-107
lines changed

13 files changed

+158
-107
lines changed

‎cores/esp32/Esp.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,9 @@ extern "C" {
5454
#elif CONFIG_IDF_TARGET_ESP32C6
5555
#include "esp32c6/rom/spi_flash.h"
5656
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c6 is located at 0x0000
57+
#elif CONFIG_IDF_TARGET_ESP32H2
58+
#include "esp32h2/rom/spi_flash.h"
59+
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
5760
#else
5861
#error Target CONFIG_IDF_TARGET is not supported
5962
#endif
@@ -363,8 +366,12 @@ FlashMode_t EspClass::getFlashChipMode(void)
363366
#if CONFIG_IDF_TARGET_ESP32S2
364367
uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
365368
#else
369+
#if CONFIG_IDF_TARGET_ESP32H2
370+
uint32_t spi_ctrl = REG_READ(DR_REG_SPI0_BASE + 0x8);
371+
#else
366372
uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
367373
#endif
374+
#endif
368375
/* Not all of the following constants are already defined in older versions of spi_reg.h, so do it manually for now*/
369376
if (spi_ctrl & BIT(24)) { //SPI_FREAD_QIO
370377
return (FM_QIO);

‎cores/esp32/HardwareSerial.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
#define SOC_RX0 44
2929
#elif CONFIG_IDF_TARGET_ESP32C3
3030
#define SOC_RX0 20
31-
#elif CONFIG_IDF_TARGET_ESP32C6
31+
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
3232
#define SOC_RX0 17
3333
#endif
3434
#endif
@@ -40,7 +40,7 @@
4040
#define SOC_TX0 43
4141
#elif CONFIG_IDF_TARGET_ESP32C3
4242
#define SOC_TX0 21
43-
#elif CONFIG_IDF_TARGET_ESP32C6
43+
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
4444
#define SOC_TX0 16
4545
#endif
4646
#endif
@@ -59,7 +59,7 @@ void serialEvent(void) {}
5959
#define RX1 18
6060
#elif CONFIG_IDF_TARGET_ESP32S3
6161
#define RX1 15
62-
#elif CONFIG_IDF_TARGET_ESP32C6
62+
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
6363
#define RX1 5
6464
#endif
6565
#endif
@@ -73,7 +73,7 @@ void serialEvent(void) {}
7373
#define TX1 19
7474
#elif CONFIG_IDF_TARGET_ESP32S3
7575
#define TX1 16
76-
#elif CONFIG_IDF_TARGET_ESP32C6
76+
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
7777
#define TX1 4
7878
#endif
7979
#endif

‎cores/esp32/esp32-hal-adc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ esp_err_t __analogChannelConfig(adc_bitwidth_t width, adc_attenuation_t atten, i
9191
log_e("adc_cali_create_scheme_curve_fitting failed with error: %d", err);
9292
return err;
9393
}
94-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
94+
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
9595
log_d("Deleting ADC_UNIT_%d line cali handle",adc_unit);
9696
err = adc_cali_delete_scheme_line_fitting(adc_cali_handle[adc_unit]);
9797
if(err != ESP_OK){
@@ -278,7 +278,7 @@ uint32_t __analogReadMilliVolts(uint8_t pin){
278278
.bitwidth = __analogWidth,
279279
};
280280
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_cali_handle[adc_unit]);
281-
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
281+
#elif !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
282282
adc_cali_line_fitting_config_t cali_config = {
283283
.unit_id = adc_unit,
284284
.bitwidth = __analogWidth,

‎cores/esp32/esp32-hal-cpu.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "esp_attr.h"
2020
#include "esp_log.h"
2121
#include "soc/rtc.h"
22-
#ifndef CONFIG_IDF_TARGET_ESP32C6
22+
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
2323
#include "soc/rtc_cntl_reg.h"
2424
#include "soc/apb_ctrl_reg.h"
2525
#endif
@@ -42,6 +42,8 @@
4242
#include "esp32c3/rom/rtc.h"
4343
#elif CONFIG_IDF_TARGET_ESP32C6
4444
#include "esp32c6/rom/rtc.h"
45+
#elif CONFIG_IDF_TARGET_ESP32H2
46+
#include "esp32h2/rom/rtc.h"
4547
#else
4648
#error Target CONFIG_IDF_TARGET is not supported
4749
#endif
@@ -151,7 +153,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
151153
}
152154

153155
static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
154-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
156+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
155157
return APB_CLK_FREQ;
156158
#else
157159
if(conf->freq_mhz >= 80){
@@ -167,7 +169,9 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
167169
rtc_cpu_freq_config_t conf, cconf;
168170
uint32_t capb, apb;
169171
//Get XTAL Frequency and calculate min CPU MHz
172+
#ifndef CONFIG_IDF_TARGET_ESP32H2
170173
rtc_xtal_freq_t xtal = rtc_clk_xtal_freq_get();
174+
#endif
171175
#if CONFIG_IDF_TARGET_ESP32
172176
if(xtal > RTC_XTAL_FREQ_AUTO){
173177
if(xtal < RTC_XTAL_FREQ_40M) {
@@ -181,6 +185,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
181185
}
182186
}
183187
#endif
188+
#ifndef CONFIG_IDF_TARGET_ESP32H2
184189
if(cpu_freq_mhz > xtal && cpu_freq_mhz != 240 && cpu_freq_mhz != 160 && cpu_freq_mhz != 80){
185190
if(xtal >= RTC_XTAL_FREQ_40M){
186191
log_e("Bad frequency: %u MHz! Options are: 240, 160, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal/2, xtal/4);
@@ -189,6 +194,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
189194
}
190195
return false;
191196
}
197+
#endif
192198
#if CONFIG_IDF_TARGET_ESP32
193199
//check if cpu supports the frequency
194200
if(cpu_freq_mhz == 240){
@@ -222,7 +228,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
222228
}
223229
//Make the frequency change
224230
rtc_clk_cpu_freq_set_config_fast(&conf);
225-
#ifndef CONFIG_IDF_TARGET_ESP32C6
231+
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
226232
if(capb != apb){
227233
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
228234
//if(conf.freq_mhz < 80){
@@ -235,7 +241,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
235241
}
236242
#endif
237243
//Update FreeRTOS Tick Divisor
238-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
244+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
239245

240246
#elif CONFIG_IDF_TARGET_ESP32S3
241247

‎cores/esp32/esp32-hal-i2c-slave.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)
168168

169169
static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
170170
{
171-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
171+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
172172
return hw->sr.slave_addressed;
173173
#else
174174
return hw->status_reg.slave_addressed;
@@ -177,7 +177,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
177177

178178
static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
179179
{
180-
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
180+
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
181181
return hw->sr.slave_rw;
182182
#else
183183
return hw->status_reg.slave_rw;

‎cores/esp32/esp32-hal-matrix.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,8 @@
2727
#include "esp32c3/rom/gpio.h"
2828
#elif CONFIG_IDF_TARGET_ESP32C6
2929
#include "esp32c6/rom/gpio.h"
30+
#elif CONFIG_IDF_TARGET_ESP32H2
31+
#include "esp32h2/rom/gpio.h"
3032
#else
3133
#error Target CONFIG_IDF_TARGET is not supported
3234
#endif

‎cores/esp32/esp32-hal-misc.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
#endif //CONFIG_BT_ENABLED
3030
#include <sys/time.h>
3131
#include "soc/rtc.h"
32-
#ifndef CONFIG_IDF_TARGET_ESP32C6
32+
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
3333
#include "soc/rtc_cntl_reg.h"
3434
#include "soc/apb_ctrl_reg.h"
3535
#endif
@@ -49,6 +49,8 @@
4949
#include "esp32c3/rom/rtc.h"
5050
#elif CONFIG_IDF_TARGET_ESP32C6
5151
#include "esp32c6/rom/rtc.h"
52+
#elif CONFIG_IDF_TARGET_ESP32H2
53+
#include "esp32h2/rom/rtc.h"
5254

5355
#else
5456
#error Target CONFIG_IDF_TARGET is not supported

0 commit comments

Comments
 (0)