From 82c7d332ec89d434bd85eaf64bfcc91a9a1d6056 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 10 Jan 2020 19:48:44 -0800
Subject: [PATCH 01/35] Hardware WDT Stack Dump

This Sketch demonstrates the use of a tool to print a stack dump
at reboot after a Hardware WDT event.

The module hwdt_app_entry.cpp writes a stack dump to the serial interface
after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
The sketch must properly initialized the Serial port before the crash.

hwdt_app_entry.cpp is the core file that does the work.
---
 .../esp8266/examples/HwdtStackDump/AddOn.h    |   2 +
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |  37 ++
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  45 ++
 .../examples/HwdtStackDump/ProcessKey.ino     |  81 +++
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 594 ++++++++++++++++++
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  19 +
 6 files changed, 778 insertions(+)
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/AddOn.h
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/AddOn.ino
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
 create mode 100644 libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.h b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
new file mode 100644
index 0000000000..30bb7dbb8e
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
@@ -0,0 +1,2 @@
+void printHelpAddOn(Print& out)__attribute__((weak));
+int hotKeyHandlerAddOn(Print& oStream, int hotKey)__attribute__((weak));
diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
new file mode 100644
index 0000000000..2d43629516
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -0,0 +1,37 @@
+extern struct rst_info resetInfo;
+
+
+void printHwdtDebugInfo(Print& out) {
+  extern struct rst_info resetInfo;
+  out.println(String(F("RTC_SYS[0] = ")) +  (hwdt_info.rtc_sys_reason) + F(", resetInfo.reason = ") + (resetInfo.reason) + F(", ") + ESP.getResetReason());
+  out.println();
+  if (hwdt_info.sys) {
+  out.println(String(F("Stack Usages:")));
+    out.printf_P(PSTR("  ctx: sys  %6u\r\n"), hwdt_info.sys);
+    uint32 cont_flags = hwdt_info.cont_integrity;
+    out.printf_P(PSTR("  ctx: cont %6u, Integrity Flags: %04X - %s\r\n"), hwdt_info.cont, cont_flags, (cont_flags) ? "fail" : "pass");
+    if (hwdt_info.rom) {
+      out.printf_P(PSTR("  ctx: ROM  %6u\r\n"), hwdt_info.rom);
+    }
+  } else {
+    out.println(F("No stack usage information available at this time. Try restart."));
+  }
+  out.println();
+}
+
+
+void printHelpAddOn(Print& out) {
+  out.println(F("  d    - Print some HWDT Debug info.);"));
+}
+
+
+int hotKeyHandlerAddOn(Print& out, int hotKey) {
+  switch (hotKey) {
+    case 'd':
+      printHwdtDebugInfo(out);
+      break;
+    default:
+      return 0;
+  }
+  return 1;
+}
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
new file mode 100644
index 0000000000..14c0648aa5
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -0,0 +1,45 @@
+/*
+ * A Hardware WDT Stack Dump by Michael Hightower
+ *
+ * This Sketch demonstrates the use of a tool to print a stack dump
+ * at reboot after a Hardware WDT event.
+ *
+ * The module hwdt_app_entry.cpp writes a stack dump to the serial interface
+ * after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
+ * Be sure your sketch has properly initialized the Serial port before the crash.
+ * See hwdt_app_entry.cpp for more details.
+ *
+ */
+
+#include <Arduino.h>
+#include <ESP8266WiFi.h>
+#include <Esp.h>
+#include <user_interface.h>
+// #include <coredecls.h> // for disable_extra4k_at_link_time();
+void enable_debug_hwdt_at_link_time(void);
+
+#include "AddOn.h"
+#include "hwdt_app_entry.h"
+
+
+void setup(void)
+{
+  enable_debug_hwdt_at_link_time();
+  WiFi.persistent(false); // w/o this a flash write occurs at every boot
+  WiFi.mode(WIFI_OFF);
+  Serial.begin(115200);
+  delay(20);
+  Serial.println();
+  Serial.println();
+  Serial.println(F("The Hardware Watchdog Timer Demo is now available for crashing ..."));
+  Serial.println();
+  processKey(Serial, '?');
+}
+
+
+void loop(void) {
+  if (Serial.available() > 0) {
+    int hotKey = Serial.read();
+    processKey(Serial, hotKey);
+  }
+}
diff --git a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
new file mode 100644
index 0000000000..4a00b180b9
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
@@ -0,0 +1,81 @@
+#include <esp8266_undocumented.h>
+
+int* nullPointer = NULL;
+
+void processKey(Print& out, int hotKey) {
+  switch (hotKey) {
+    case 'r':
+      out.printf_P(PSTR("Reset, ESP.reset(); ...\r\n"));
+      ESP.reset();
+      break;
+    case 't':
+      out.printf_P(PSTR("Restart, ESP.restart(); (%ld ms) ...\r\n"));
+      ESP.restart();
+      break;
+    case 's':
+      {
+        uint32_t startTime = millis();
+        out.printf_P(PSTR("Now crashing with Software WDT. This will take about 3 seconds\r\n"));
+        ets_install_putc1(ets_putc);
+        while (true) {
+          ets_printf("%9lu\r", (millis() - startTime));
+          ets_delay_us(250000);
+          // stay in an loop blocking other system activity.
+        }
+      }
+      break;
+    case 'h':
+      out.printf_P(PSTR("Now crashing with Hardware WDT. This will take about 6 seconds\r\n"));
+      // ESP.wdtDisable();
+      asm volatile("" ::: "memory");
+      asm volatile ("mov.n a2, %0\n"
+                    "mov.n a3, %1\n"
+                    "mov.n a4, %1\n"
+                    "mov.n a5, %1\n"
+                    "mov.n a6, %1\n"
+                    : : "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa) );
+      // Could not find these in the stack dump, unless interrupts were enabled.
+      {
+        uint32_t startTime = millis();
+        // Avoid all the Core functions that play nice, so we can hog
+        // the system and crash.
+        ets_install_putc1(ets_putc);
+        xt_rsil(15);
+        while (true) {
+          ets_printf("%9lu\r", (millis() - startTime));
+          ets_delay_us(250000);
+          // stay in an loop blocking other system activity.
+          //
+          // Note:
+          // Hardware WDT kicks in if Software WDT is unable to perform.
+          // With the Hardware WDT, nothing is saved on the stack, that I have seen.
+        }
+      }
+      break;
+    case '\r':
+      out.println();
+    case '\n':
+      break;
+    case '?':
+      out.println();
+      out.println(F("Press a key + <enter>"));
+      out.println(F("  r    - Reset, ESP.reset();"));
+      out.println(F("  t    - Restart, ESP.restart();"));
+      printHelpAddOn(out);
+      out.println(F("  ?    - Print Help"));
+      out.println();
+      out.println(F("Crash with:"));
+      out.println(F("  s    - Software WDT"));
+      out.println(F("  h    - Hardware WDT"));
+      out.println();
+      break;
+    default:
+      if (hotKeyHandlerAddOn(out, hotKey)) {
+        return;
+      }
+      out.printf_P(PSTR("\"%c\" - Not an option?  / ? - help"), hotKey);
+      out.println();
+      processKey(out, '?');
+      break;
+  }
+}
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
new file mode 100644
index 0000000000..7e2c1906e9
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -0,0 +1,594 @@
+/*
+ *   Copyright 2020 Michael Hightower
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ */
+
+/*
+ * As far as I know, there is no way to get called for a Hardware WDT. I assume
+ * it generates a form of reset that occurs at a low level that cannot be
+ * trapped. Debugging an HWDT can be quite challenging.
+ *
+ * This module writes a stack dump to the serial port after a Hardware Watchdog
+ * Timer has struck and a new boot cycle has begun. Since we have a late start,
+ * some information may be lost due to DRAM usage by the Boot ROM and the
+ * bootloader.
+ *
+ * We are using the method defined for `core_esp8266_app_entry_noextra4k.cpp` to
+ * load an alternate `app_entry_redefinable()`. For details on this method, see
+ * comments in `core_esp8266_main.cpp's app_entry()`.
+ *
+ * Using this alternate we can gain control before the SDK is started.
+ * And dump what is left of the "sys" and "cont" stacks.
+ *
+ * By making some adjustments to start of the stack pointer, at the entry to
+ * `app_entry_redefinable()`, and also to the stack pointer passed to the SDK,
+ * we can preserve the stack during an HWDT event. At least thats the idea.
+ *
+ * To use, just place this file in the sketch directory and rebuild and upload
+ * your sketch. That should be enough to get it included in your sketch. If
+ * that does not work, then add a call to:
+ *    `void enable_debug_hwdt_at_link_time (void);`
+ * in `setup()`. Also, be sure to initialize the Serial interface for printing.
+ * This tool relies on the Serial interface already being setup from the
+ * previous boot cycle.
+ *
+ * When you get a stack dump, copy-paste it into the "ESP Exception Decoder".
+ * Since we don't have a SP, we see a lot more stuff in the report. Start at the
+ * bottom and work your way up. At this time I have not had a lot of practice
+ * using this tool.  TODO: Update description with more details when available.
+ */
+
+#define DEBUG_HWDT
+
+#ifdef DEBUG_HWDT
+
+#include <c_types.h>
+#include "cont.h"
+#include "coredecls.h"
+#include <core_esp8266_features.h>
+#include <esp8266_undocumented.h>
+#include <esp8266_peri.h>
+#include <uart.h>
+
+extern "C" {
+#include <user_interface.h>
+#include <uart_register.h>
+extern void call_user_start();
+}
+
+/*
+ * DEBUG_HWDT_NO4KEXTRA
+ *
+ * This option will leave more of the system stack available for the stack dump.
+ * The problem with the "4K extra" option is that it pushes the system stack up
+ * into the ROM's BSS area which gets zeroed at reboot by the Boot ROM.
+ *
+ * Using this option has the effect of taking 4K of DRAM away from the heap
+ * which gets used for the "cont" stack. Leaving an extra 4K on the "sys" stack,
+ * that is clear of the ROM's BSS area. This allows for a more complete "sys"
+ * stack dump.
+ *
+ */
+#define DEBUG_HWDT_NO4KEXTRA
+
+/*
+ * ROM_STACK_SIZE
+ *
+ * Normally there are 4 sections of code that share/overlap the same stack space
+ * starting at near 0x40000000.
+ *   1) The Boot ROM (uses around 640 bytes)
+ *   2) The Bootloader, eboot.elf (last seen using 720 bytes.)
+ *   3) `app_entry_redefinable()` just before it starts the SDK.
+ *   4) The NONOS SDK, optionally the Core when extra 4K option is selected.
+ *
+ * To preserve the sketch stack data for a stack dump, I define a stack for used
+ * by the ROM and bootloader that is separate from that used by the sketch. By
+ * sketch, I refer to ESP8266 Core, NONOS SDK, and sketch as one. By not
+ * overlapping, we lose some stack space by leaving idle space behind; however,
+ * we improve the likelihood that we can generate a stack dump after an HWDT
+ * crash. I leave this value at 1024; however, with current measurements, it
+ * looks like it could go down. Leaving it for now in case eboot gets bigger.
+ */
+#ifndef ROM_STACK_SIZE
+#define ROM_STACK_SIZE (1024)
+#endif
+
+/*
+ * HWDT_INFO
+ *
+ * Gather some useful information on ROM and bootloader combined, sys, and cont
+ * stack usage as well as other stuff that comes up.
+ *
+ */
+ #define HWDT_INFO
+
+
+/*
+ * HWDT_OPTION_THE_OPTIMIST
+ *
+ * The optimist's choice. It can be used to reduce the IRAM footprint. It
+ * assumes the strings in memory before the crash are still valid and can be
+ * used for printing the report.
+ *
+ */
+ #define HWDT_OPTION_THE_OPTIMIST
+
+
+/*
+ * ROM_STACK_DUMP
+ *
+ * Dump the stack contents of the ROM Stack area. Good for getting a visual
+ * on stack usage. Probably not of value beyond developing this tool.
+ *
+ #define ROM_STACK_DUMP
+ */
+
+
+
+
+/*
+ * If you do not need to access the internal HWDT info, you do not need this
+ * include. If you do, uncomment the include line and copy-paste the include
+ * block below into its respective filename.
+ */
+// #include "hwdt_app_entry.h"
+
+
+#ifdef HWDT_STACK_DUMP_H
+/*
+ * This is only used to verify the internal and external structure definitions
+ * match.
+ */
+#define HWDT_INFO_t LOCAL_HWDT_INFO_t
+#define hwdt_info LOCAL_hwdt_info
+#endif
+
+
+/******** Start of copy-paste block to create "hwdt_app_entry.h" **************/
+#if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_INFO_t)
+#define HWDT_STACK_DUMP_H
+
+typedef struct HWDT_INFO {
+    uint32_t rom;
+    uint32_t sys;
+    uint32_t cont;
+    uint32_t rtc_sys_reason;
+    uint32_t cont_integrity;
+} HWDT_INFO_t;
+
+extern uint32_t *g_rom_stack;
+extern HWDT_INFO_t hwdt_info;
+
+#endif
+/******** End of copy-paste this block for creating "hwdt_app_entry.h" ********/
+
+
+#ifdef HWDT_INFO_t
+#undef HWDT_INFO_t
+#undef hwdt_info
+static_assert(sizeof(HWDT_INFO_t) == sizeof(LOCAL_HWDT_INFO_t), "Local and include verison of HWDT_INFO_t do not match.");
+#endif
+
+#define MK_ALIGN16_SZ(a) (((a) + 0x0F) & ~0x0F)
+#define ALIGN_UP(a, s) ((decltype(a))((((uintptr_t)(a)) + (s-1)) & ~(s-1)))
+#define ALIGN_DOWN(a, s) ((decltype(a))(((uintptr_t)(a)) & ~(s-1)))
+
+#ifndef CONT_STACKGUARD
+#define CONT_STACKGUARD 0xfeefeffe
+#endif
+constexpr volatile uint32_t *RTC_SYS = (volatile uint32_t*)0x60001100;
+
+
+constexpr uint32_t *dram_start      = (uint32_t *)0x3FFE8000;
+constexpr uint32_t *dram_end        = (uint32_t *)0x40000000;
+
+constexpr uint32_t *rom_stack_first = (uint32_t *)0x40000000;
+constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
+/*
+ * The space between 0x3fffe000 up to 0x3fffeb30 is a ROM BSS area that is later
+ * claimed by the SDK for stack space. This is a problem area because the ROM
+ * BSS gets zeroed as part of ROM init on reboot. Any part of the "sys" stack
+ * residing there is lost. On the other hand, it becomes a prime candidate for
+ * DRAM address space to handle the needs of this stack dump utility.
+ */
+constexpr uint32_t *sys_stack_e000  = (uint32_t *)0x3fffe000;
+
+// Map out who will live where.
+constexpr size_t rom_stack_A16_sz = MK_ALIGN16_SZ(ROM_STACK_SIZE);
+constexpr size_t cont_stack_A16_sz = MK_ALIGN16_SZ(sizeof(cont_t));
+constexpr uint32_t *rom_stack = (uint32_t *)((uintptr_t)rom_stack_first - rom_stack_A16_sz);
+
+
+#ifdef DEBUG_HWDT_NO4KEXTRA
+/* This is the default NONOS-SDK user's heap location for NO4KEXTRA */
+static cont_t g_cont __attribute__ ((aligned (16)));
+constexpr uint32_t *sys_stack_first = (uint32_t *)((uintptr_t)rom_stack);
+
+#else
+constexpr uint32_t *cont_stack_first = (uint32_t *)((uintptr_t)rom_stack); // only for computation
+constexpr cont_t *cont_stack = (cont_t *)((uintptr_t)cont_stack_first - cont_stack_A16_sz);
+constexpr uint32_t *sys_stack_first = (uint32_t *)((uintptr_t)cont_stack);
+#endif
+
+uint32_t *g_rom_stack  __attribute__((section(".noinit")));
+size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
+HWDT_INFO_t hwdt_info __attribute__((section(".noinit")));
+
+void enable_debug_hwdt_at_link_time (void)
+{
+    /*
+     * This function does nothing; however, including a call to it in setup,
+     * allows this module to override, at link time, the core_esp8266_main.cpp's
+     * `app_entry()` with the one below. This will create a stack dump on
+     * Hardware WDT resets.
+     *
+     * It appears just including this module in the sketch directory will also
+     * accomplish the same. Or maybe it is the referencing of a global that is
+     * in here.
+     */
+}
+
+
+/* the following code is linked only if a call to the above function is made somewhere */
+
+extern "C" {
+#if 0 // Handy debug print during development
+static void ICACHE_RAM_ATTR print_size(uintptr_t val) {
+    uint32_t fmt_sz[4];
+    fmt_sz[0]  = ('0' ) | ('x' <<8) | ('%' <<16) | ('0' <<24);
+    fmt_sz[1]  = ('8' ) | ('X' <<8) | (',' <<16) | (' ' <<24);
+    fmt_sz[2]  = (' ' ) | ('%' <<8) | ('5' <<16) | ('u' <<24);
+    fmt_sz[3]  = ('\n') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
+    ets_printf((const char *)fmt_sz, val, val);
+}
+#endif
+
+
+enum PRINT_STACK {
+    CONT = 1,
+    SYS = 2,
+    ROM = 4
+};
+
+static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
+
+#if defined(HWDT_OPTION_THE_OPTIMIST)
+    const char fmt_stk[]  = "\n>>>stack>>>\n\nctx: %s\n";
+    const char fmt_sp[]   = "sp: %08x end: %08x offset: %04x\n";
+    const char fmt_rom[]  = "ROM";
+    const char fmt_sys[]  = "sys";
+    const char fmt_cont[] = "cont";
+
+#else
+    uint32_t fmt_stk[6];
+    fmt_stk[0] = ('\n') | ('>' <<8) | ('>' <<16) | ('>' <<24);
+    fmt_stk[1] = ('s' ) | ('t' <<8) | ('a' <<16) | ('c' <<24);
+    fmt_stk[2] = ('k' ) | ('>' <<8) | ('>' <<16) | ('>' <<24);
+    fmt_stk[3] = ('\n') | ('\n'<<8) | ('c' <<16) | ('t' <<24);
+    fmt_stk[4] = ('x' ) | (':' <<8) | (' ' <<16) | ('%' <<24);
+    fmt_stk[5] = ('s' ) | ('\n'<<8) | ('\0'<<16) | ('\0'<<24);
+
+    uint32_t fmt_sp[9];
+    fmt_sp[0]  = ('s' ) | ('p' <<8) | (':' <<16) | (' ' <<24);
+    fmt_sp[1]  = ('%' ) | ('0' <<8) | ('8' <<16) | ('x' <<24);
+    fmt_sp[2]  = (' ' ) | ('e' <<8) | ('n' <<16) | ('d' <<24);
+    fmt_sp[3]  = (':' ) | (' ' <<8) | ('%' <<16) | ('0' <<24);
+    fmt_sp[4]  = ('8' ) | ('x' <<8) | (' ' <<16) | ('o' <<24);
+    fmt_sp[5]  = ('f' ) | ('f' <<8) | ('s' <<16) | ('e' <<24);
+    fmt_sp[6]  = ('t' ) | (':' <<8) | (' ' <<16) | ('%' <<24);
+    fmt_sp[7]  = ('0' ) | ('4' <<8) | ('x' <<16) | ('\n'<<24);
+    fmt_sp[8]  = ('\0') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
+
+    uint32_t fmt_rom[1];
+    fmt_rom[0]  = ('R' ) | ('O' <<8) | ('M' <<16) | ('\0'<<24);
+
+    uint32_t fmt_sys[1];
+    fmt_sys[0]  = ('s' ) | ('y' <<8) | ('s' <<16) | ('\0'<<24);
+
+    uint32_t fmt_cont[2];
+    fmt_cont[0] = ('c' ) | ('o' <<8) | ('n' <<16) | ('t' <<24);
+    fmt_cont[1] = ('\0') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
+#endif
+
+    if (chunk & PRINT_STACK::CONT) {
+        ets_printf((const char *)fmt_stk, (const char *)fmt_cont);
+    } else
+    if (chunk & PRINT_STACK::SYS) {
+        ets_printf((const char *)fmt_stk, (const char *)fmt_sys);
+    } else
+    if (chunk & PRINT_STACK::ROM) {
+        ets_printf((const char *)fmt_stk, (const char *)fmt_rom);
+    }
+
+    ets_printf((const char *)fmt_sp, start, end, 0);
+
+    {
+#if defined(HWDT_OPTION_THE_OPTIMIST)
+        const char fmt_stk_dmp[] = "%08x:  %08x %08x %08x %08x %c\n";
+#else
+        uint32_t fmt_stk_dmp[8];
+        fmt_stk_dmp[0] = ('%') | ('0' <<8) | ('8' <<16) | ('x' <<24);
+        fmt_stk_dmp[1] = (':') | (' ' <<8) | (' ' <<16) | ('%' <<24);
+        fmt_stk_dmp[2] = ('0') | ('8' <<8) | ('x' <<16) | (' ' <<24);
+        fmt_stk_dmp[3] = ('%') | ('0' <<8) | ('8' <<16) | ('x' <<24);
+        fmt_stk_dmp[4] = (' ') | ('%' <<8) | ('0' <<16) | ('8' <<24);
+        fmt_stk_dmp[5] = ('x') | (' ' <<8) | ('%' <<16) | ('0' <<24);
+        fmt_stk_dmp[6] = ('8') | ('x' <<8) | (' ' <<16) | ('%' <<24);
+        fmt_stk_dmp[7] = ('c') | ('\n'<<8) | ('\0'<<16) | ('\0'<<24);
+#endif
+        size_t this_mutch = end - start;
+        if (this_mutch >= 0x10) {
+            for (size_t pos = 0; pos < this_mutch; pos += 0x10) {
+                uint32_t *value = (uint32_t *)(start + pos);
+
+                // rough indicator: stack frames usually have SP saved as the second word
+                bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
+
+                ets_printf((const char*)fmt_stk_dmp, (uint32_t)&value[0],
+                           value[0], value[1], value[2], value[3],
+                           (looksLikeStackFrame)?'<':' ');
+            }
+        }
+    }
+
+    {
+#if defined(HWDT_OPTION_THE_OPTIMIST)
+        const char fmt_stk_end[] = "<<<stack<<<\n";
+#else
+        uint32_t fmt_stk_end[4];
+        fmt_stk_end[0] = ('<' ) | ('<' <<8) | ('<' <<16) | ('s' <<24);
+        fmt_stk_end[1] = ('t' ) | ('a' <<8) | ('c' <<16) | ('k' <<24);
+        fmt_stk_end[2] = ('<' ) | ('<' <<8) | ('<' <<16) | ('\n'<<24);
+        fmt_stk_end[3] = ('\n') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
+#endif
+        ets_printf((const char *)fmt_stk_end);
+    }
+}
+
+static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, const uint32_t *end, const uint32_t pattern) {
+    // Find the end of SYS stack activity
+    const uint32_t *uptr = start;
+
+    size_t this_mutch = (uintptr_t)end - (uintptr_t)start;
+    this_mutch /= sizeof(uint32_t);
+    size_t i = 0;
+    for (; i < this_mutch; i++) {
+        if (pattern != uptr[i]) {
+            i &= ~3U;
+            uptr = &uptr[i];
+            break;
+        }
+    }
+    if (i == this_mutch) {
+        uptr = &uptr[i];
+    }
+
+    return uptr;
+}
+
+static void ICACHE_RAM_ATTR handle_hwdt(void) {
+    /*
+    *  Detecting a Hardware WDT (HWDT) reset is a little complicated at boot
+    *  before the SDK is started.
+    *
+    *  While the ROM API will report an HWDT, it does not change the status after
+    *  a software restart. And the SDK has not been started so its API is not
+    *  available.
+    *
+    *  There is a value in System RTC memory that appears to store, at boot, the
+    *  reset reason for the SDK. It appears to be set before the SDK performs
+    *  its restart. Of course, this value is invalid at power on before the SDK
+    *  runs.
+    *
+    *  Case 1: At power-on boot the ROM API result is valid; however, the SDK
+    *  value in RTC Memory has not been set at this time.
+    *
+    *  Case 2: A HWDT reset has occurred, which is later followed with a
+    *  restart by the SDK. At boot, the ROM API result still reports the HWDT
+    *  reason.
+    *
+    *
+    *
+    *  I need to know if this is the 1st boot at power on. Combining the
+    *  indicators above proved to be very convoluted and unreliable for power-on
+    *  detection.
+    *
+    *  The following indirect method of testing of vital pointers for validity
+    *  has been worked best so far.
+    */
+    bool power_on = false;
+    if (g_rom_stack != rom_stack ||
+        g_rom_stack_A16_sz != rom_stack_A16_sz ||
+#ifdef DEBUG_HWDT_NO4KEXTRA
+        g_pcont != &g_cont
+#else
+        g_pcont != cont_stack
+#endif
+        ) {
+        power_on = true;
+        g_rom_stack = rom_stack;
+        g_rom_stack_A16_sz = rom_stack_A16_sz;
+    }
+
+    ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
+    uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason = RTC_SYS[0];
+    bool hwdt_reset = false;
+
+    if (!power_on && REASON_WDT_RST == rtc_sys_reason) {
+        hwdt_reset = true;
+    }
+
+    if (!power_on) {
+        uint32_t cont_integrity = 0;
+        if (g_pcont->stack_guard1 != CONT_STACKGUARD) {
+          cont_integrity |= 0x0001;
+        }
+        if (g_pcont->stack_guard2 != CONT_STACKGUARD) {
+          cont_integrity |= 0x0020;
+        }
+        if (g_pcont->stack_end != (g_pcont->stack + (sizeof(g_pcont->stack) / 4))) {
+          cont_integrity |= 0x0300;
+          // Fix ending so we don't crash
+          g_pcont->stack_end = (g_pcont->stack + (sizeof(g_pcont->stack) / 4));
+        }
+        if (g_pcont->struct_start != (unsigned*) g_pcont) {
+          cont_integrity |= 0x4000;
+        }
+        hwdt_info.cont_integrity = cont_integrity;
+
+#if defined(DEBUG_HWDT_NO4KEXTRA) || defined(HWDT_INFO)
+        const uint32_t *ctx_cont_ptr = skip_stackguard(g_pcont->stack, g_pcont->stack_end, CONT_STACKGUARD);
+        hwdt_info.cont = (uintptr_t)g_pcont->stack_end - (uintptr_t)ctx_cont_ptr;
+#endif
+
+        const uint32_t *ctx_sys_ptr = skip_stackguard(sys_stack, rom_stack, CONT_STACKGUARD);
+        hwdt_info.sys = (uintptr_t)rom_stack - (uintptr_t)ctx_sys_ptr;
+
+        /* Print context SYS */
+        if (hwdt_reset) {
+            {
+#if defined(HWDT_OPTION_THE_OPTIMIST)
+              const char fmt_hwdt[] = "\nHardware WDT reset\n";
+#else
+              uint32_t fmt_hwdt[6];
+              fmt_hwdt[0] = ('\n') | ('H' <<8) | ('a' <<16) | ('r' <<24);
+              fmt_hwdt[1] = ('d' ) | ('w' <<8) | ('a' <<16) | ('r' <<24);
+              fmt_hwdt[2] = ('e' ) | (' ' <<8) | ('W' <<16) | ('D' <<24);
+              fmt_hwdt[3] = ('T' ) | (' ' <<8) | ('r' <<16) | ('e' <<24);
+              fmt_hwdt[4] = ('s' ) | ('e' <<8) | ('t' <<16) | ('\n'<<24);
+              fmt_hwdt[5] = 0;
+#endif
+              ets_printf((const char*)fmt_hwdt);
+            }
+            print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
+
+#ifdef DEBUG_HWDT_NO4KEXTRA
+            /* Print separate ctx: cont stack */
+            print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
+#endif
+        }
+    }
+
+    /*
+     *  Fill the SDK stack area with CONT_STACKGUARD so we can detect and
+     *  skip the unused section of the stack when printing a Stack Dump.
+     */
+    {
+        size_t this_mutch = (uintptr_t)rom_stack - (uintptr_t)sys_stack;
+        this_mutch /= sizeof(uint32_t);
+        for (size_t i = 0; i < this_mutch; i++) {
+            sys_stack[i] = CONT_STACKGUARD;
+        }
+    }
+
+#if defined(HWDT_INFO) || defined(ROM_STACK_DUMP)
+    /*
+     *  Reports on rom_stack usage by ROM and eboot.
+     *  Used to confirm ROM_STACK_SIZE is large enough.
+     */
+    {
+        const uint32_t *ctx_rom_ptr = skip_stackguard(rom_stack, rom_stack_first, CONT_STACKGUARD);
+        hwdt_info.rom = (uintptr_t)rom_stack_first - (uintptr_t)ctx_rom_ptr;
+#if defined(ROM_STACK_DUMP)
+        print_stack((uintptr_t)ctx_rom_ptr, (uintptr_t)rom_stack_first, PRINT_STACK::ROM);
+#endif
+    }
+#endif
+    ets_delay_us(12000); /* Let UART FiFo clear. */
+}
+
+void ICACHE_RAM_ATTR app_entry_start(void) {
+#ifdef DEBUG_HWDT_NO4KEXTRA
+    /*
+     *  Continuation context is in BSS.
+     */
+    g_pcont = &g_cont;
+#else
+    /*
+     *  The continuation context is on the stack just after the reserved space
+     *  for the ROM/eboot stack and before the SYS stack begins.
+     *  All computations were done at top, save pointer to it now.
+     */
+    g_pcont = cont_stack;
+#endif
+    /*
+     *  Use new calculated SYS stack from top.
+     *  Call the entry point of the SDK code.
+     */
+    asm volatile("" ::: "memory");
+    asm volatile("mov.n a1, %0\n"
+                 "mov.n a3, %1\n"
+                 "mov.n a0, %2\n"     // Should never return; however, set return to Boot ROM Breakpoint
+                 "jx a3\n" : : "r" (sys_stack_first), "r" (call_user_start), "r" (0x4000044c) );
+
+    __builtin_unreachable();
+}
+
+
+void ICACHE_RAM_ATTR app_entry_redefinable2(void) {
+    handle_hwdt();
+    app_entry_start();
+
+    __builtin_unreachable();
+}
+
+void ICACHE_RAM_ATTR app_entry_redefinable(void) {
+    /*
+     * There are 4 sections of code that share the stack starting near
+     * 0x40000000.
+     *   1) The Boot ROM (uses around 640 bytes)
+     *   2) The Bootloader, eboot.elf (last seen using 720 bytes.)
+     *   3) `app_entry_redefinable()` just before it starts the SDK.
+     *   4) The NONOS SDK, optionally the Core when the extra 4K option is
+     *      selected.
+     *
+     * Make the ROM BSS zeroed out memory the home for our temporary stack. That
+     * way no additional information will be lost. That will remove this tool
+     * from the list of possible concerns for stack overwrite. For now, At this
+     * time it is set to 1024.
+     *
+     */
+    asm volatile ("mov.n a1, %0\n"
+                  "mov.n a3, %1\n"
+                  "mov.n a0, %2\n"
+                  "jx a3\n" : : "r" (0x3fffeb30), "r" (app_entry_redefinable2), "r" (0x4000044c) );
+    /*
+     * TODO: Look at the assembly, I had to split app_entry_redefinable like
+     * this to stop some back indexing on the stack. Looks like some temporary
+     * storage was set up and was being referenced and I moved it away by
+     * changing the stack pointer. Splitting the `app_entry_redefinable()`
+     * function into two parts seems to have taken care of that issue.
+     */
+
+    __builtin_unreachable();
+}
+
+
+void initVariant(void) {
+#if defined(HWDT_INFO)
+    /*
+     * Fill the rom_stack while it is not actively being used.
+     *
+     * I am thinking that during the time the sketch is running this block of
+     * memory could be used for a scratch buffer.
+     */
+    for (size_t i = 0; i < g_rom_stack_A16_sz/sizeof(uint32_t); i++) {
+        g_rom_stack[i] = CONT_STACKGUARD;
+    }
+#endif
+}
+
+};
+
+#endif // end of #ifdef DEBUG_HWDT
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
new file mode 100644
index 0000000000..4bd0056de2
--- /dev/null
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -0,0 +1,19 @@
+#ifndef HWDT_STACK_DUMP_H
+#define HWDT_STACK_DUMP_H
+
+#ifndef DEBUG_HWDT
+#define DEBUG_HWDT
+#endif
+
+typedef struct HWDT_INFO {
+    uint32_t rom;
+    uint32_t sys;
+    uint32_t cont;
+    uint32_t rtc_sys_reason;
+    uint32_t cont_integrity;
+} HWDT_INFO_t;
+
+extern uint32_t *g_rom_stack;
+extern HWDT_INFO_t hwdt_info;
+
+#endif

From 8fbaa7e9eeb7683cc0882995373ca55d2161c53c Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 10 Jan 2020 21:37:00 -0800
Subject: [PATCH 02/35] Corrected Style. Improved HWDT reset detectionat boot.

---
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |  6 ++---
 .../examples/HwdtStackDump/HwdtStackDump.ino  | 25 +++++++++----------
 .../examples/HwdtStackDump/ProcessKey.ino     | 21 ++++++++--------
 .../examples/HwdtStackDump/hwdt_app_entry.cpp |  7 ++++--
 4 files changed, 30 insertions(+), 29 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
index 2d43629516..eed4690f12 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -3,10 +3,10 @@ extern struct rst_info resetInfo;
 
 void printHwdtDebugInfo(Print& out) {
   extern struct rst_info resetInfo;
-  out.println(String(F("RTC_SYS[0] = ")) +  (hwdt_info.rtc_sys_reason) + F(", resetInfo.reason = ") + (resetInfo.reason) + F(", ") + ESP.getResetReason());
+  out.println(String(F("RTC_SYS[0] = ")) + (hwdt_info.rtc_sys_reason) + F(", resetInfo.reason = ") + (resetInfo.reason) + F(", ") + ESP.getResetReason());
   out.println();
   if (hwdt_info.sys) {
-  out.println(String(F("Stack Usages:")));
+    out.println(String(F("Stack Usages:")));
     out.printf_P(PSTR("  ctx: sys  %6u\r\n"), hwdt_info.sys);
     uint32 cont_flags = hwdt_info.cont_integrity;
     out.printf_P(PSTR("  ctx: cont %6u, Integrity Flags: %04X - %s\r\n"), hwdt_info.cont, cont_flags, (cont_flags) ? "fail" : "pass");
@@ -21,7 +21,7 @@ void printHwdtDebugInfo(Print& out) {
 
 
 void printHelpAddOn(Print& out) {
-  out.println(F("  d    - Print some HWDT Debug info.);"));
+  out.println(F("  d    - Print some HWDT Debug info.;"));
 }
 
 
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 14c0648aa5..d7337081b9 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -1,15 +1,15 @@
 /*
- * A Hardware WDT Stack Dump by Michael Hightower
- *
- * This Sketch demonstrates the use of a tool to print a stack dump
- * at reboot after a Hardware WDT event.
- *
- * The module hwdt_app_entry.cpp writes a stack dump to the serial interface
- * after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
- * Be sure your sketch has properly initialized the Serial port before the crash.
- * See hwdt_app_entry.cpp for more details.
- *
- */
+   A Hardware WDT Stack Dump by Michael Hightower
+
+   This Sketch demonstrates the use of a tool to print a stack dump
+   at reboot after a Hardware WDT event.
+
+   The module hwdt_app_entry.cpp writes a stack dump to the serial interface
+   after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
+   Be sure your sketch has properly initialized the Serial port before the crash.
+   See hwdt_app_entry.cpp for more details.
+
+*/
 
 #include <Arduino.h>
 #include <ESP8266WiFi.h>
@@ -22,8 +22,7 @@ void enable_debug_hwdt_at_link_time(void);
 #include "hwdt_app_entry.h"
 
 
-void setup(void)
-{
+void setup(void) {
   enable_debug_hwdt_at_link_time();
   WiFi.persistent(false); // w/o this a flash write occurs at every boot
   WiFi.mode(WIFI_OFF);
diff --git a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
index 4a00b180b9..04b8874f3d 100644
--- a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
@@ -9,13 +9,12 @@ void processKey(Print& out, int hotKey) {
       ESP.reset();
       break;
     case 't':
-      out.printf_P(PSTR("Restart, ESP.restart(); (%ld ms) ...\r\n"));
+      out.printf_P(PSTR("Restart, ESP.restart(); ...\r\n"));
       ESP.restart();
       break;
-    case 's':
-      {
+    case 's': {
         uint32_t startTime = millis();
-        out.printf_P(PSTR("Now crashing with Software WDT. This will take about 3 seconds\r\n"));
+        out.printf_P(PSTR("Now crashing with Software WDT. This will take about 3 seconds.\r\n"));
         ets_install_putc1(ets_putc);
         while (true) {
           ets_printf("%9lu\r", (millis() - startTime));
@@ -25,15 +24,15 @@ void processKey(Print& out, int hotKey) {
       }
       break;
     case 'h':
-      out.printf_P(PSTR("Now crashing with Hardware WDT. This will take about 6 seconds\r\n"));
+      out.printf_P(PSTR("Now crashing with Hardware WDT. This will take about 6 seconds.\r\n"));
       // ESP.wdtDisable();
       asm volatile("" ::: "memory");
-      asm volatile ("mov.n a2, %0\n"
-                    "mov.n a3, %1\n"
-                    "mov.n a4, %1\n"
-                    "mov.n a5, %1\n"
-                    "mov.n a6, %1\n"
-                    : : "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa) );
+      asm volatile("mov.n a2, %0\n"
+                   "mov.n a3, %1\n"
+                   "mov.n a4, %1\n"
+                   "mov.n a5, %1\n"
+                   "mov.n a6, %1\n"
+                   : : "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa) );
       // Could not find these in the stack dump, unless interrupts were enabled.
       {
         uint32_t startTime = millis();
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 7e2c1906e9..9f9c406030 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -65,6 +65,7 @@ extern "C" {
 #include <user_interface.h>
 #include <uart_register.h>
 extern void call_user_start();
+extern uint32_t rtc_get_reset_reason(void);
 }
 
 /*
@@ -405,7 +406,8 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
     *  detection.
     *
     *  The following indirect method of testing of vital pointers for validity
-    *  has been worked best so far.
+    *  works for determining power on. Then need to reference both ROM API
+    *  and SDK RTC value to detect a real HWDT.
     */
     bool power_on = false;
     if (g_rom_stack != rom_stack ||
@@ -423,9 +425,10 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
     uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason = RTC_SYS[0];
+    uint32_t rom_api_reason = rtc_get_reset_reason();
     bool hwdt_reset = false;
 
-    if (!power_on && REASON_WDT_RST == rtc_sys_reason) {
+    if (!power_on && REASON_WDT_RST == rtc_sys_reason && 4 == rom_api_reason) {
         hwdt_reset = true;
     }
 

From e2721111ba3a8b427ebdb257e48214d867fac818 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 10 Jan 2020 22:14:03 -0800
Subject: [PATCH 03/35] Style and typos

---
 libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
index 04b8874f3d..ae87cabaa3 100644
--- a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
@@ -29,10 +29,10 @@ void processKey(Print& out, int hotKey) {
       asm volatile("" ::: "memory");
       asm volatile("mov.n a2, %0\n"
                    "mov.n a3, %1\n"
-                   "mov.n a4, %1\n"
-                   "mov.n a5, %1\n"
-                   "mov.n a6, %1\n"
-                   : : "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa), "r" (0xaaaaaaaa) );
+                   "mov.n a4, %2\n"
+                   "mov.n a5, %3\n"
+                   "mov.n a6, %4\n"
+                   : : "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa));
       // Could not find these in the stack dump, unless interrupts were enabled.
       {
         uint32_t startTime = millis();

From 254c50fa3a26290ba29f4483c3b162c0c5c48026 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sat, 11 Jan 2020 09:09:09 -0800
Subject: [PATCH 04/35] Update comments.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 20 ++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 9f9c406030..eccee1f8b9 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -89,17 +89,19 @@ extern uint32_t rtc_get_reset_reason(void);
  * Normally there are 4 sections of code that share/overlap the same stack space
  * starting at near 0x40000000.
  *   1) The Boot ROM (uses around 640 bytes)
- *   2) The Bootloader, eboot.elf (last seen using 720 bytes.)
+ *   2) The Bootloader, eboot.elf (using around 720 bytes.)
  *   3) `app_entry_redefinable()` just before it starts the SDK.
- *   4) The NONOS SDK, optionally the Core when extra 4K option is selected.
+ *   4) The NONOS SDK, optionally the Core when the extra 4K option is selected.
  *
- * To preserve the sketch stack data for a stack dump, I define a stack for used
- * by the ROM and bootloader that is separate from that used by the sketch. By
- * sketch, I refer to ESP8266 Core, NONOS SDK, and sketch as one. By not
- * overlapping, we lose some stack space by leaving idle space behind; however,
- * we improve the likelihood that we can generate a stack dump after an HWDT
- * crash. I leave this value at 1024; however, with current measurements, it
- * looks like it could go down. Leaving it for now in case eboot gets bigger.
+ * To preserve the sketch stack data for a stack dump, I define three separate
+ * stacks:
+ *   1) Boot ROM and eboot
+ *   2) this stack dump code
+ *   3) SDK, Core, and Sketch
+ *
+ * With this, we can recover a complete stack trace of our sketch. I am leaving
+ * this for now at 1024; however, I think there is room to lower it without loss
+ * of information.
  */
 #ifndef ROM_STACK_SIZE
 #define ROM_STACK_SIZE (1024)

From 093ac0242e3c068f348d00f5121c3da0e3946a6b Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Mon, 13 Jan 2020 16:44:31 -0800
Subject: [PATCH 05/35] Improvements to reset reason determination. Improved
 comments. Added option to match the UART speed used by the sketch. Added
 option to print greeting at the start to indicate the HWDT stack dump code is
 active. Isolated logic for handling strings: one assuming they are not inited
 at the time the code is running and one that does. The later appears to be
 the case.

---
 .../esp8266/examples/HwdtStackDump/AddOn.h    |   2 +-
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |  44 +-
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  12 +-
 .../examples/HwdtStackDump/ProcessKey.ino     |   2 +-
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 459 ++++++++++++++----
 .../examples/HwdtStackDump/hwdt_app_entry.h   |   5 +
 6 files changed, 432 insertions(+), 92 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.h b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
index 30bb7dbb8e..2d42ee3ab2 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.h
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
@@ -1,2 +1,2 @@
 void printHelpAddOn(Print& out)__attribute__((weak));
-int hotKeyHandlerAddOn(Print& oStream, int hotKey)__attribute__((weak));
+int hotKeyHandlerAddOn(Print& out, int hotKey)__attribute__((weak));
diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
index eed4690f12..781d6e7c48 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -1,9 +1,16 @@
-extern struct rst_info resetInfo;
+#ifdef DEBUG_HWDT
 
+extern struct rst_info resetInfo;
 
 void printHwdtDebugInfo(Print& out) {
   extern struct rst_info resetInfo;
   out.println(String(F("RTC_SYS[0] = ")) + (hwdt_info.rtc_sys_reason) + F(", resetInfo.reason = ") + (resetInfo.reason) + F(", ") + ESP.getResetReason());
+  out.println(String(F("ROM API reset reason = ")) + (hwdt_info.rom_api_reason));
+  out.println(String(F("HWDT reset reason = ")) + (hwdt_info.reset_reason));
+  if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
+      out.println(String(F("Reset reason confirmation failed!\n")));
+  }
+
   out.println();
   if (hwdt_info.sys) {
     out.println(String(F("Stack Usages:")));
@@ -21,17 +28,50 @@ void printHwdtDebugInfo(Print& out) {
 
 
 void printHelpAddOn(Print& out) {
-  out.println(F("  d    - Print some HWDT Debug info.;"));
+  out.println(F("  0    - Divide by zero, exception(0);"));
+  out.println(F("  p    - panic();"));
+  out.println();
+  out.println(F("Additional options:"));
+  out.println(F("  d    - Print some HWDT Debug info."));
 }
 
 
+
 int hotKeyHandlerAddOn(Print& out, int hotKey) {
   switch (hotKey) {
     case 'd':
       printHwdtDebugInfo(out);
       break;
+    case 'p':
+      out.println(F("Time to panic()!"));
+      panic();
+      break;
+    case '0':
+      out.println(F("Crashing by dividing by zero."));
+      out.printf_P(PSTR("This should not print %d\n"), divideA_B(1, 0));
+      break;
     default:
       return 0;
   }
   return 1;
 }
+
+int divideA_B(int a, int b) {
+  return (a / b);
+}
+
+#else
+void printHwdtDebugInfo(Print& out) {
+  (void)out;
+}
+
+int hotKeyHandlerAddOn(Print& out, int hotKey) {
+  (void)out;
+  (void)hotKey;
+  return 0;
+}
+
+void printHelpAddOn(Print& out) {
+  (void)out;
+}
+#endif
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index d7337081b9..d51b783759 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -6,7 +6,8 @@
 
    The module hwdt_app_entry.cpp writes a stack dump to the serial interface
    after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
-   Be sure your sketch has properly initialized the Serial port before the crash.
+   Note, at restart the UART speed is set by the ROM to 115200 bps. This is the
+   speed your serial device needs to be set to for displaying the dump.
    See hwdt_app_entry.cpp for more details.
 
 */
@@ -15,15 +16,20 @@
 #include <ESP8266WiFi.h>
 #include <Esp.h>
 #include <user_interface.h>
-// #include <coredecls.h> // for disable_extra4k_at_link_time();
-void enable_debug_hwdt_at_link_time(void);
+// extern "C" void enable_debug_hwdt_at_link_time(void);
 
 #include "AddOn.h"
+/*
+  To see the difference with and without this tool. Comment out the #include
+  below. And comment out the "#define DEBUG_HWDT" line in hwdt_app_entry.cpp.
+*/
 #include "hwdt_app_entry.h"
 
 
 void setup(void) {
+#ifdef DEBUG_HWDT
   enable_debug_hwdt_at_link_time();
+#endif
   WiFi.persistent(false); // w/o this a flash write occurs at every boot
   WiFi.mode(WIFI_OFF);
   Serial.begin(115200);
diff --git a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
index ae87cabaa3..98f255d22a 100644
--- a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
@@ -60,12 +60,12 @@ void processKey(Print& out, int hotKey) {
       out.println(F("Press a key + <enter>"));
       out.println(F("  r    - Reset, ESP.reset();"));
       out.println(F("  t    - Restart, ESP.restart();"));
-      printHelpAddOn(out);
       out.println(F("  ?    - Print Help"));
       out.println();
       out.println(F("Crash with:"));
       out.println(F("  s    - Software WDT"));
       out.println(F("  h    - Hardware WDT"));
+      printHelpAddOn(out);
       out.println();
       break;
     default:
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index eccee1f8b9..43b20f4f70 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -47,6 +47,17 @@
  * Since we don't have a SP, we see a lot more stuff in the report. Start at the
  * bottom and work your way up. At this time I have not had a lot of practice
  * using this tool.  TODO: Update description with more details when available.
+ *
+ *
+ *
+ * Possible Issues/Thoughts/Improvements:
+ *
+ * I wonder if the eboot could be changed to use at stack pointer beginning at
+ * 0x3fffeb30. This would allow for a value near 640 for ROM_STACK_SIZE.
+ *
+ * If a problem should arise with some data elements being corrupted during
+ * reboot, would it be possible to move their DRAM location higher in memory.
+ *
  */
 
 #define DEBUG_HWDT
@@ -67,6 +78,7 @@ extern "C" {
 extern void call_user_start();
 extern uint32_t rtc_get_reset_reason(void);
 }
+// #define DEBUG_HWDT_DEBUG
 
 /*
  * DEBUG_HWDT_NO4KEXTRA
@@ -86,10 +98,10 @@ extern uint32_t rtc_get_reset_reason(void);
 /*
  * ROM_STACK_SIZE
  *
- * Normally there are 4 sections of code that share/overlap the same stack space
- * starting at near 0x40000000.
+ * There are 4 sections of code that share the same stack space that starts at
+ * around 0x40000000.
  *   1) The Boot ROM (uses around 640 bytes)
- *   2) The Bootloader, eboot.elf (using around 720 bytes.)
+ *   2) The Bootloader, eboot.elf (uses around 720 bytes.)
  *   3) `app_entry_redefinable()` just before it starts the SDK.
  *   4) The NONOS SDK, optionally the Core when the extra 4K option is selected.
  *
@@ -99,9 +111,9 @@ extern uint32_t rtc_get_reset_reason(void);
  *   2) this stack dump code
  *   3) SDK, Core, and Sketch
  *
- * With this, we can recover a complete stack trace of our sketch. I am leaving
- * this for now at 1024; however, I think there is room to lower it without loss
- * of information.
+ * With this, we can recover a complete stack trace of our failed sketch. To be
+ * safe, I am leaving this at 1024; however, I think there is room to lower it
+ * without loss of information.
  */
 #ifndef ROM_STACK_SIZE
 #define ROM_STACK_SIZE (1024)
@@ -124,6 +136,10 @@ extern uint32_t rtc_get_reset_reason(void);
  * assumes the strings in memory before the crash are still valid and can be
  * used for printing the report.
  *
+ * EDIT: It appears I am mistaken. String constants appear to be loaded
+ * at boot time and are available from the start before crt0 runs. I'll wait
+ * for a reviewer confirmation before making this option a permanent selection.
+ *
  */
  #define HWDT_OPTION_THE_OPTIMIST
 
@@ -137,22 +153,59 @@ extern uint32_t rtc_get_reset_reason(void);
  #define ROM_STACK_DUMP
  */
 
+/*
+ * HWDT_IF_METHOD_RESET_REASON
+ *
+ * If statement vs switch method to implement the logic. Both can be made
+ * smaller by removing confirmation checks.
+ *
+ * Checks are being performed when DEBUG_HWDT_DEBUG_RESET_REASON has been
+ * defined.
+ *
+ #define DEBUG_HWDT_DEBUG_RESET_REASON
+ */
+ #define HWDT_IF_METHOD_RESET_REASON
 
+/*
+ * HWDT_PRINT_GREETING
+ *
+ * Prints a simple introduction to let you know this tool is active and in the
+ * build. At power-on this may not be viewable on some devices. The crystal
+ * has to be 40Mhz for this to work w/o using the HWDT_UART_SPEED option below.
+ * May not be worth the cost in IRAM.
+ *
+ * EDIT: There is something different in the UART setup after a EXT_RST after
+ * flash upload. I am unable to print using the same code that works for
+ * Power-on and an EXT_RST at any other time. After the SDK has run a 2nd
+ * EXT_RST will show the greeting message.
+ *
+ */
+ #define HWDT_PRINT_GREETING
 
+/*
+ * HWDT_UART_SPEED
+ *
+ * UART serial speed to be used for stack dump. At boot/reboot the ESP8266 ROM
+ * sets a speed of 115200 BPS. If you are using this default speed you can skip
+ * this option and save the IRAM space.
+ *
+ */
+ #define HWDT_UART_SPEED (115200)
 
 /*
- * If you do not need to access the internal HWDT info, you do not need this
- * include. If you do, uncomment the include line and copy-paste the include
- * block below into its respective filename.
+ * If you do not need the information in provided by HWDT info, you do not need
+ * this include. If you do, uncomment the include line and copy-paste the
+ * include block below into its respective filename.
+ *
  */
-// #include "hwdt_app_entry.h"
+#include "hwdt_app_entry.h"
 
 
-#ifdef HWDT_STACK_DUMP_H
 /*
- * This is only used to verify the internal and external structure definitions
- * match.
+ * This is only used to verify that the internal and external structure
+ * definitions match.
  */
+#ifdef HWDT_STACK_DUMP_H
 #define HWDT_INFO_t LOCAL_HWDT_INFO_t
 #define hwdt_info LOCAL_hwdt_info
 #endif
@@ -167,9 +220,14 @@ typedef struct HWDT_INFO {
     uint32_t sys;
     uint32_t cont;
     uint32_t rtc_sys_reason;
+    uint32_t rom_api_reason;
     uint32_t cont_integrity;
+    uint32_t reset_reason;
+    bool g_pcont_valid;
 } HWDT_INFO_t;
 
+void enable_debug_hwdt_at_link_time (void);
+
 extern uint32_t *g_rom_stack;
 extern HWDT_INFO_t hwdt_info;
 
@@ -183,6 +241,7 @@ extern HWDT_INFO_t hwdt_info;
 static_assert(sizeof(HWDT_INFO_t) == sizeof(LOCAL_HWDT_INFO_t), "Local and include verison of HWDT_INFO_t do not match.");
 #endif
 
+
 #define MK_ALIGN16_SZ(a) (((a) + 0x0F) & ~0x0F)
 #define ALIGN_UP(a, s) ((decltype(a))((((uintptr_t)(a)) + (s-1)) & ~(s-1)))
 #define ALIGN_DOWN(a, s) ((decltype(a))(((uintptr_t)(a)) & ~(s-1)))
@@ -200,10 +259,11 @@ constexpr uint32_t *rom_stack_first = (uint32_t *)0x40000000;
 constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
 /*
  * The space between 0x3fffe000 up to 0x3fffeb30 is a ROM BSS area that is later
- * claimed by the SDK for stack space. This is a problem area because the ROM
- * BSS gets zeroed as part of ROM init on reboot. Any part of the "sys" stack
- * residing there is lost. On the other hand, it becomes a prime candidate for
- * DRAM address space to handle the needs of this stack dump utility.
+ * claimed by the SDK for stack space. This is a problem area for stack dump,
+ * because the ROM BSS gets zeroed as part of ROM init on reboot. Any part of
+ * the "sys" stack residing there is lost. On the other hand, it becomes a prime
+ * candidate for DRAM address space to handle the needs of this stack dump
+ * utility.
  */
 constexpr uint32_t *sys_stack_e000  = (uint32_t *)0x3fffe000;
 
@@ -228,7 +288,7 @@ uint32_t *g_rom_stack  __attribute__((section(".noinit")));
 size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
 HWDT_INFO_t hwdt_info __attribute__((section(".noinit")));
 
-void enable_debug_hwdt_at_link_time (void)
+void enable_debug_hwdt_at_link_time(void)
 {
     /*
      * This function does nothing; however, including a call to it in setup,
@@ -236,9 +296,8 @@ void enable_debug_hwdt_at_link_time (void)
      * `app_entry()` with the one below. This will create a stack dump on
      * Hardware WDT resets.
      *
-     * It appears just including this module in the sketch directory will also
-     * accomplish the same. Or maybe it is the referencing of a global that is
-     * in here.
+     * It appears just including this module in the sketch directory is enough.
+     * However, just play it safe, call this function from setup.
      */
 }
 
@@ -264,16 +323,41 @@ enum PRINT_STACK {
     ROM = 4
 };
 
+#if defined(HWDT_OPTION_THE_OPTIMIST)
 static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
+    ets_printf("\n>>>stack>>>\n\nctx: ");
 
-#if defined(HWDT_OPTION_THE_OPTIMIST)
-    const char fmt_stk[]  = "\n>>>stack>>>\n\nctx: %s\n";
-    const char fmt_sp[]   = "sp: %08x end: %08x offset: %04x\n";
-    const char fmt_rom[]  = "ROM";
-    const char fmt_sys[]  = "sys";
-    const char fmt_cont[] = "cont";
+    if (chunk & PRINT_STACK::CONT) {
+        ets_printf("cont");
+    } else
+    if (chunk & PRINT_STACK::SYS) {
+        ets_printf("sys");
+    } else
+    if (chunk & PRINT_STACK::ROM) {
+        ets_printf("ROM");
+    }
+
+    ets_printf("\nsp: %08x end: %08x offset: %04x\n", start, end, 0);
+
+    size_t this_mutch = end - start;
+    if (this_mutch >= 0x10) {
+        for (size_t pos = 0; pos < this_mutch; pos += 0x10) {
+            uint32_t *value = (uint32_t *)(start + pos);
+
+            // rough indicator: stack frames usually have SP saved as the second word
+            bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
+            ets_printf("%08x:  %08x %08x %08x %08x %c\n", (uint32_t)&value[0],
+                       value[0], value[1], value[2], value[3],
+                       (looksLikeStackFrame)?'<':' ');
+        }
+    }
+
+    ets_printf("<<<stack<<<\n");
+}
 
 #else
+static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
+
     uint32_t fmt_stk[6];
     fmt_stk[0] = ('\n') | ('>' <<8) | ('>' <<16) | ('>' <<24);
     fmt_stk[1] = ('s' ) | ('t' <<8) | ('a' <<16) | ('c' <<24);
@@ -302,7 +386,6 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
     uint32_t fmt_cont[2];
     fmt_cont[0] = ('c' ) | ('o' <<8) | ('n' <<16) | ('t' <<24);
     fmt_cont[1] = ('\0') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-#endif
 
     if (chunk & PRINT_STACK::CONT) {
         ets_printf((const char *)fmt_stk, (const char *)fmt_cont);
@@ -317,9 +400,6 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
     ets_printf((const char *)fmt_sp, start, end, 0);
 
     {
-#if defined(HWDT_OPTION_THE_OPTIMIST)
-        const char fmt_stk_dmp[] = "%08x:  %08x %08x %08x %08x %c\n";
-#else
         uint32_t fmt_stk_dmp[8];
         fmt_stk_dmp[0] = ('%') | ('0' <<8) | ('8' <<16) | ('x' <<24);
         fmt_stk_dmp[1] = (':') | (' ' <<8) | (' ' <<16) | ('%' <<24);
@@ -329,7 +409,7 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
         fmt_stk_dmp[5] = ('x') | (' ' <<8) | ('%' <<16) | ('0' <<24);
         fmt_stk_dmp[6] = ('8') | ('x' <<8) | (' ' <<16) | ('%' <<24);
         fmt_stk_dmp[7] = ('c') | ('\n'<<8) | ('\0'<<16) | ('\0'<<24);
-#endif
+
         size_t this_mutch = end - start;
         if (this_mutch >= 0x10) {
             for (size_t pos = 0; pos < this_mutch; pos += 0x10) {
@@ -337,27 +417,22 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
 
                 // rough indicator: stack frames usually have SP saved as the second word
                 bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
-
                 ets_printf((const char*)fmt_stk_dmp, (uint32_t)&value[0],
                            value[0], value[1], value[2], value[3],
                            (looksLikeStackFrame)?'<':' ');
             }
         }
     }
-
     {
-#if defined(HWDT_OPTION_THE_OPTIMIST)
-        const char fmt_stk_end[] = "<<<stack<<<\n";
-#else
         uint32_t fmt_stk_end[4];
         fmt_stk_end[0] = ('<' ) | ('<' <<8) | ('<' <<16) | ('s' <<24);
         fmt_stk_end[1] = ('t' ) | ('a' <<8) | ('c' <<16) | ('k' <<24);
         fmt_stk_end[2] = ('<' ) | ('<' <<8) | ('<' <<16) | ('\n'<<24);
         fmt_stk_end[3] = ('\n') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-#endif
         ets_printf((const char *)fmt_stk_end);
     }
 }
+#endif
 
 static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, const uint32_t *end, const uint32_t pattern) {
     // Find the end of SYS stack activity
@@ -380,61 +455,262 @@ static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, c
     return uptr;
 }
 
-static void ICACHE_RAM_ATTR handle_hwdt(void) {
+static void ICACHE_RAM_ATTR check_g_pcont_validity(void) {
     /*
-    *  Detecting a Hardware WDT (HWDT) reset is a little complicated at boot
-    *  before the SDK is started.
-    *
-    *  While the ROM API will report an HWDT, it does not change the status after
-    *  a software restart. And the SDK has not been started so its API is not
-    *  available.
-    *
-    *  There is a value in System RTC memory that appears to store, at boot, the
-    *  reset reason for the SDK. It appears to be set before the SDK performs
-    *  its restart. Of course, this value is invalid at power on before the SDK
-    *  runs.
-    *
-    *  Case 1: At power-on boot the ROM API result is valid; however, the SDK
-    *  value in RTC Memory has not been set at this time.
-    *
-    *  Case 2: A HWDT reset has occurred, which is later followed with a
-    *  restart by the SDK. At boot, the ROM API result still reports the HWDT
-    *  reason.
-    *
-    *
-    *
-    *  I need to know if this is the 1st boot at power on. Combining the
-    *  indicators above proved to be very convoluted and unreliable for power-on
-    *  detection.
-    *
-    *  The following indirect method of testing of vital pointers for validity
-    *  works for determining power on. Then need to reference both ROM API
-    *  and SDK RTC value to detect a real HWDT.
-    */
-    bool power_on = false;
-    if (g_rom_stack != rom_stack ||
-        g_rom_stack_A16_sz != rom_stack_A16_sz ||
+     * Testing of vital pointers for validity could also aid as a partial
+     * indicator of power-on. Not needed for that purpose at this time.
+     */
+    if (g_rom_stack == rom_stack &&
+        g_rom_stack_A16_sz == rom_stack_A16_sz &&
 #ifdef DEBUG_HWDT_NO4KEXTRA
-        g_pcont != &g_cont
+        g_pcont == &g_cont
 #else
-        g_pcont != cont_stack
+        g_pcont == cont_stack
 #endif
         ) {
-        power_on = true;
+            hwdt_info.g_pcont_valid = true;
+    } else {
+        hwdt_info.g_pcont_valid = false;
         g_rom_stack = rom_stack;
         g_rom_stack_A16_sz = rom_stack_A16_sz;
     }
+}
+
+#if defined(DEBUG_HWDT_DEBUG) || defined(DEBUG_HWDT_DEBUG_RESET_REASON)
+#ifndef DEBUG_HWDT_DEBUG_RESET_REASON
+#define DEBUG_HWDT_DEBUG_RESET_REASON
+#endif
+#define debug__confirm_rom_reason(a) ((a) == rom_api_reason)
+#else
+#define debug__confirm_rom_reason(a) (true)
+#endif
+
+static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_reset) {
+    /*
+     * Detecting a Hardware WDT (HWDT) reset is a little complicated at boot
+     * before the SDK is started.
+     *
+     * While the ROM API will report an HWDT, it does not change the status
+     * after a software restart. And the SDK has not been started so its API is
+     * not available.
+     *
+     * There is a value in System RTC memory that appears to store, at boot,
+     * the reset reason for the SDK. It appears to be set before the SDK
+     * performs its restart. Of course, this value is invalid at power on
+     * before the SDK runs.
+     *
+     * Case 1: At power-on boot the ROM API result is valid; however, the SDK
+     * value in RTC Memory has not been set at this time.
+     *
+     * Case 2: A HWDT reset has occurred, which is later followed with a
+     * restart by the SDK. At boot, the ROM API result still reports the HWDT
+     * reason.
+     *
+     *
+     *
+     * I need to know if this is the 1st boot at power on. Combining these
+     * indicators has been tricky, I think I now have it.
+     *
+     */
 
-    ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
     uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason = RTC_SYS[0];
-    uint32_t rom_api_reason = rtc_get_reset_reason();
-    bool hwdt_reset = false;
+    uint32_t rom_api_reason = hwdt_info.rom_api_reason = rtc_get_reset_reason();
+
+#ifdef HWDT_IF_METHOD_RESET_REASON
+    *hwdt_reset = false;
+    *power_on = false;
+    /*
+     * This logic takes the reason left in memory by the SDK as an initial
+     * estimate and expands on it.
+     */
+    hwdt_info.reset_reason = rtc_sys_reason;
+    if (REASON_WDT_RST == rtc_sys_reason) {
+        if (4 == rom_api_reason) {
+            *hwdt_reset = true;
+        } else {
+            hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+            if (!debug__confirm_rom_reason(2)) {  // EXT_RST
+                hwdt_info.reset_reason = ~0;
+            }
+        }
+
+    } else if (0 == rtc_sys_reason) {
+        /*
+         * The 0 values shows up with multiple EXT_RSTs quickly.
+         * The 1 value, previous if, shows up if you wait a while before
+         * the EXT_RST.
+         */
+        hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+        if (!debug__confirm_rom_reason(2)) {  // EXT_RST
+            hwdt_info.reset_reason = ~0;
+        }
+
+    } else if (REASON_EXT_SYS_RST < rtc_sys_reason) {
+        /*
+         * We only want to indicate power-on, if the ROM API reason confirms it.
+         * A reliable power-on indicator is need for set_uart_speed() to work
+         * properly.
+         */
+        *power_on = true;
+        hwdt_info.reset_reason = REASON_DEFAULT_RST;
+        if (!debug__confirm_rom_reason(1)) {  // Power-on
+            hwdt_info.reset_reason = ~0;
+            *power_on = false;
+        }
+    }
+#else
+    // New reset reason logic test
+    *hwdt_reset = false;
+    *power_on = false;
+    switch(rtc_sys_reason) {
+        case REASON_DEFAULT_RST:
+          /*
+           * This can be present for REASON_EXT_SYS_RST or REASON_WDT_RST
+           * The rtc_sys_reason starts off at 0 and is set to 1 later,
+           * if crash occurs before set, then it is still 0.
+           */
+        case REASON_WDT_RST:
+          /*
+           * This may be present for REASON_EXT_SYS_RST or REASON_WDT_RST,
+           * use rom_api_reason to confirm.
+           */
+          if (4 == rom_api_reason) {  // HWDT
+              hwdt_info.reset_reason = REASON_WDT_RST;
+              *hwdt_reset = true;
+          } else if (!debug__confirm_rom_reason(2)) {
+              hwdt_info.reset_reason = ~0;
+          } else {
+              hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+          }
+          break;
+        /* These should be correct as is */
+        case REASON_EXCEPTION_RST:
+        case REASON_SOFT_WDT_RST:
+        case REASON_SOFT_RESTART:
+        case REASON_DEEP_SLEEP_AWAKE:    // TODO: Untested.
+            hwdt_info.reset_reason = rtc_sys_reason;
+            break;
+        /*
+         * REASON_EXT_SYS_RST is not expected at reboot, let it fall though to
+         * default for confirmation.
+         */
+        case REASON_EXT_SYS_RST:
+        default:
+            /*
+             * Out of range value, this could be a REASON_DEFAULT_RST,
+             * use rom_api_reason to confirm.
+             */
+            if (1 == rom_api_reason) {  // Power-on
+                hwdt_info.reset_reason = REASON_DEFAULT_RST;
+                *power_on = true;
+            } else if (!debug__confirm_rom_reason(2)) {
+                hwdt_info.reset_reason = ~0;
+            } else {
+                hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+            }
+            break;
+    }
+#endif
+    return hwdt_info.reset_reason;
+}
 
-    if (!power_on && REASON_WDT_RST == rtc_sys_reason && 4 == rom_api_reason) {
-        hwdt_reset = true;
+#ifdef HWDT_UART_SPEED
+/*
+ * We need this because the SDK has an override on this already. If we call it
+ * at this time we will crash in the unintialized SDK.
+ */
+#ifndef ROM_uart_div_modify
+#define ROM_uart_div_modify         0x400039d8
+#endif
+typedef int (*fp_uart_div_modify_t)(uint32_t uart_no, uint32 DivLatchValue);
+constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_uart_div_modify;
+
+
+static uint32_t ICACHE_RAM_ATTR set_uart_speed(uint32_t uart_no, uint32_t new_speed) {
+    (void)uart_no;
+
+    // #if F_CRYSTAL == 40000000
+#ifdef F_CRYSTAL
+    constexpr uint32_t crystal_freq = F_CRYSTAL;
+#else
+    constexpr uint32_t crystal_freq = 26000000;
+#endif
+    constexpr uint32_t UART_CLK_DIVISOR_M = (0x000FFFFF);
+    constexpr uint32_t rom_uart_speed = 115200;
+    uint32_t uart_divisor = ESP8266_REG(0x14) & UART_CLK_DIVISOR_M;
+    uint32_t master_freq = crystal_freq * 2;
+
+    if (REASON_DEFAULT_RST       == hwdt_info.reset_reason ||
+        REASON_EXT_SYS_RST       == hwdt_info.reset_reason ||
+        REASON_DEEP_SLEEP_AWAKE  == hwdt_info.reset_reason) {
+        /*
+         * At this time, with a power on boot or EXT_RSTs the CPU Frequency
+         * calibration has not happended. Thus for a 26MHz Xtal, the CPU clock
+         * is running at 52MHz. Tweak uart speed here, so printing works.
+         * To avoid confusion at exit, put the divisor back as we found it.
+         */
+        master_freq = crystal_freq * 2;
+    } else {
+        /*
+         * No adjustments needed on reboots, etc.
+         * Avoid accumulating divide errors.
+         */
+        master_freq = ((uart_divisor * rom_uart_speed) < 100000000) ? 80000000 : 160000000;
     }
+    uint32_t new_uart_divisor = master_freq / new_speed;
 
-    if (!power_on) {
+#if defined(DEBUG_HWDT_DEBUG)
+    int rc = 1;
+    if (new_uart_divisor != uart_divisor) {
+        rc = real_uart_div_modify(0, new_uart_divisor);
+        ets_delay_us(50); // Allow one 20K BPS character time to pass
+    }
+    ets_printf("\n\n%d = real_uart_div_modify(0, %u / %u);\n", rc, master_freq, new_speed);
+    ets_printf("F_CRYSTAL = %u\n", crystal_freq);
+    ets_printf("old uart_divisor = %u\n", uart_divisor);
+    ets_printf("master_freq = %u\n", master_freq);
+    return (rc) ? 0 : uart_divisor;
+#else
+    if (new_uart_divisor != uart_divisor) {
+        return (real_uart_div_modify(0, new_uart_divisor)) ? 0 : uart_divisor;
+    }
+    return 0;
+#endif
+}
+#endif
+/*
+ *
+ *
+ *
+ *
+ */
+static void ICACHE_RAM_ATTR handle_hwdt(void) {
+
+    ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
+    check_g_pcont_validity();
+
+    bool power_on = false;
+    bool hwdt_reset = false;
+    get_reset_reason(&power_on, &hwdt_reset);
+
+#ifdef HWDT_UART_SPEED
+    uint32_t uart_divisor = set_uart_speed(0, HWDT_UART_SPEED);
+#endif
+#if defined(DEBUG_HWDT_DEBUG)
+    ets_printf("Basic boot reason: %s\n", (power_on) ? "Power-on" : "Reboot");
+    ets_printf("RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
+    ets_printf("ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
+    ets_printf("HWDT Reset Reason = %u\n\n", hwdt_info.reset_reason);
+#endif
+#if defined(DEBUG_HWDT_DEBUG_RESET_REASON)
+    if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
+        ets_printf("Reset reason confirmation failed!\n");
+        ets_printf("  RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
+        ets_printf("  ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
+    }
+#endif
+    // After a flash upload memory cannot be trusted.
+    if (!power_on && hwdt_info.g_pcont_valid) {
         uint32_t cont_integrity = 0;
         if (g_pcont->stack_guard1 != CONT_STACKGUARD) {
           cont_integrity |= 0x0001;
@@ -464,7 +740,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
         if (hwdt_reset) {
             {
 #if defined(HWDT_OPTION_THE_OPTIMIST)
-              const char fmt_hwdt[] = "\nHardware WDT reset\n";
+              ets_printf("\nHardware WDT reset\n");
 #else
               uint32_t fmt_hwdt[6];
               fmt_hwdt[0] = ('\n') | ('H' <<8) | ('a' <<16) | ('r' <<24);
@@ -473,8 +749,8 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
               fmt_hwdt[3] = ('T' ) | (' ' <<8) | ('r' <<16) | ('e' <<24);
               fmt_hwdt[4] = ('s' ) | ('e' <<8) | ('t' <<16) | ('\n'<<24);
               fmt_hwdt[5] = 0;
-#endif
               ets_printf((const char*)fmt_hwdt);
+#endif
             }
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
 
@@ -510,7 +786,17 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 #endif
     }
 #endif
-    ets_delay_us(12000); /* Let UART FiFo clear. */
+
+#if defined(HWDT_PRINT_GREETING)
+    ets_printf("\n\nHardware WDT Stack Dump - enabled\n\n");
+#endif
+
+ets_delay_us(12000); /* Let UART FIFO clear. */
+#ifdef HWDT_UART_SPEED
+    if (uart_divisor) {
+        real_uart_div_modify(0, uart_divisor); // Put it back the way we found it!
+    }
+#endif
 }
 
 void ICACHE_RAM_ATTR app_entry_start(void) {
@@ -580,8 +866,8 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
 }
 
 
-void initVariant(void) {
 #if defined(HWDT_INFO)
+void preinit(void) {
     /*
      * Fill the rom_stack while it is not actively being used.
      *
@@ -591,9 +877,12 @@ void initVariant(void) {
     for (size_t i = 0; i < g_rom_stack_A16_sz/sizeof(uint32_t); i++) {
         g_rom_stack[i] = CONT_STACKGUARD;
     }
-#endif
 }
+#endif
 
 };
 
+#else
+extern "C" void enable_debug_hwdt_at_link_time (void){
+}
 #endif // end of #ifdef DEBUG_HWDT
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index 4bd0056de2..79743b1328 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -10,9 +10,14 @@ typedef struct HWDT_INFO {
     uint32_t sys;
     uint32_t cont;
     uint32_t rtc_sys_reason;
+    uint32_t rom_api_reason;
     uint32_t cont_integrity;
+    uint32_t reset_reason;
+    bool g_pcont_valid;
 } HWDT_INFO_t;
 
+extern "C" void enable_debug_hwdt_at_link_time (void);
+
 extern uint32_t *g_rom_stack;
 extern HWDT_INFO_t hwdt_info;
 

From 25f0140b450e230cc91e506884c210512ca70e41 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Mon, 13 Jan 2020 21:48:19 -0800
Subject: [PATCH 06/35] Style plus Fix issue with HWDT reason detection when
 sketch crashes too fast. Added sample sketch menu option for crashing with a
 function defined with a weak attribute via prototype, but never actually
 defined in full function form. eg. `void trouble(void){return;}`

---
 .../esp8266/examples/HwdtStackDump/AddOn.h    |  1 +
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |  8 ++-
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  2 +-
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 53 +++++++++++++------
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  2 +-
 5 files changed, 46 insertions(+), 20 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.h b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
index 2d42ee3ab2..320f9f83b4 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.h
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
@@ -1,2 +1,3 @@
 void printHelpAddOn(Print& out)__attribute__((weak));
 int hotKeyHandlerAddOn(Print& out, int hotKey)__attribute__((weak));
+void crashMeIfYouCan(void)__attribute__((weak));
diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
index 781d6e7c48..3d3d636844 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -8,7 +8,7 @@ void printHwdtDebugInfo(Print& out) {
   out.println(String(F("ROM API reset reason = ")) + (hwdt_info.rom_api_reason));
   out.println(String(F("HWDT reset reason = ")) + (hwdt_info.reset_reason));
   if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
-      out.println(String(F("Reset reason confirmation failed!\n")));
+    out.println(String(F("Reset reason confirmation failed!\n")));
   }
 
   out.println();
@@ -30,6 +30,7 @@ void printHwdtDebugInfo(Print& out) {
 void printHelpAddOn(Print& out) {
   out.println(F("  0    - Divide by zero, exception(0);"));
   out.println(F("  p    - panic();"));
+  out.println(F("  c    - Hardware WDT reset by calling a missing function."));
   out.println();
   out.println(F("Additional options:"));
   out.println(F("  d    - Print some HWDT Debug info."));
@@ -50,6 +51,11 @@ int hotKeyHandlerAddOn(Print& out, int hotKey) {
       out.println(F("Crashing by dividing by zero."));
       out.printf_P(PSTR("This should not print %d\n"), divideA_B(1, 0));
       break;
+    case 'c':
+      out.println(F("Now calling: void crashMeIfYouCan(void)__attribute__((weak));"));
+      out.println(F("This function was missing when the sketch was linked. ..."));
+      crashMeIfYouCan();
+      break;
     default:
       return 0;
   }
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index d51b783759..ed32fcd61b 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -16,7 +16,7 @@
 #include <ESP8266WiFi.h>
 #include <Esp.h>
 #include <user_interface.h>
-// extern "C" void enable_debug_hwdt_at_link_time(void);
+// void enable_debug_hwdt_at_link_time(void);
 
 #include "AddOn.h"
 /*
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 43b20f4f70..89df1cd170 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -198,7 +198,7 @@ extern uint32_t rtc_get_reset_reason(void);
  * include block below into its respective filename.
  *
  */
-#include "hwdt_app_entry.h"
+// #include "hwdt_app_entry.h"
 
 
 /*
@@ -226,7 +226,7 @@ typedef struct HWDT_INFO {
     bool g_pcont_valid;
 } HWDT_INFO_t;
 
-void enable_debug_hwdt_at_link_time (void);
+void enable_debug_hwdt_at_link_time(void);
 
 extern uint32_t *g_rom_stack;
 extern HWDT_INFO_t hwdt_info;
@@ -485,6 +485,17 @@ static void ICACHE_RAM_ATTR check_g_pcont_validity(void) {
 #define debug__confirm_rom_reason(a) (true)
 #endif
 
+typedef enum ROM_RST_REASON { /* Comments on the right are from RTOS SDK */
+  NO_MEAN                =  0,    /* Undefined */
+  POWERON_RESET          =  1,    /* Power on boot      *//**<1, Vbat power on reset */
+  EXT_RESET              =  2,    /* External reset or wake-up from Deep-sleep */
+                                                          /**<2, external system reset */
+  SW_RESET               =  3,    /*                    *//**<3, Software reset digital core */
+  OWDT_RESET             =  4,    /* Hardware WDT reset *//**<4, Legacy watch dog reset digital core */
+  DEEPSLEEP_RESET        =  5,    /*                    *//**<5, Deep Sleep reset digital core */
+  SDIO_RESET             =  6,    /*                    *//**<6, Reset by SLC module, reset digital core*/
+} ROM_RST_REASON_t;
+
 static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_reset) {
     /*
      * Detecting a Hardware WDT (HWDT) reset is a little complicated at boot
@@ -514,7 +525,8 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      */
 
     uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason = RTC_SYS[0];
-    uint32_t rom_api_reason = hwdt_info.rom_api_reason = rtc_get_reset_reason();
+    hwdt_info.rom_api_reason = rtc_get_reset_reason();
+    ROM_RST_REASON_t rom_api_reason = (ROM_RST_REASON_t)hwdt_info.rom_api_reason;
 
 #ifdef HWDT_IF_METHOD_RESET_REASON
     *hwdt_reset = false;
@@ -525,24 +537,31 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      */
     hwdt_info.reset_reason = rtc_sys_reason;
     if (REASON_WDT_RST == rtc_sys_reason) {
-        if (4 == rom_api_reason) {
+        if (OWDT_RESET == rom_api_reason) {
             *hwdt_reset = true;
         } else {
             hwdt_info.reset_reason = REASON_EXT_SYS_RST;
-            if (!debug__confirm_rom_reason(2)) {  // EXT_RST
+            if (!debug__confirm_rom_reason(EXT_RESET)) {
                 hwdt_info.reset_reason = ~0;
             }
         }
 
     } else if (0 == rtc_sys_reason) {
         /*
-         * The 0 values shows up with multiple EXT_RSTs quickly.
-         * The 1 value, previous if, shows up if you wait a while before
-         * the EXT_RST.
+         * 1) The 0 values shows up with multiple EXT_RSTs quickly.
+         *    The 1 value, previous if, shows up if you wait a while before
+         *    the EXT_RST.
+         * 2) The 0 value also shows up if a HWDT reset occurs too quickly after
+         *    the system starts. Note even the SDK gets this one right.
          */
-        hwdt_info.reset_reason = REASON_EXT_SYS_RST;
-        if (!debug__confirm_rom_reason(2)) {  // EXT_RST
-            hwdt_info.reset_reason = ~0;
+        if (OWDT_RESET == rom_api_reason) {
+             *hwdt_reset = true;
+             hwdt_info.reset_reason = REASON_WDT_RST;
+        } else {
+             hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+             if (!debug__confirm_rom_reason(EXT_RESET)) {
+               hwdt_info.reset_reason = ~0;
+             }
         }
 
     } else if (REASON_EXT_SYS_RST < rtc_sys_reason) {
@@ -553,7 +572,7 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
          */
         *power_on = true;
         hwdt_info.reset_reason = REASON_DEFAULT_RST;
-        if (!debug__confirm_rom_reason(1)) {  // Power-on
+        if (!debug__confirm_rom_reason(POWERON_RESET)) {
             hwdt_info.reset_reason = ~0;
             *power_on = false;
         }
@@ -574,10 +593,10 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
            * This may be present for REASON_EXT_SYS_RST or REASON_WDT_RST,
            * use rom_api_reason to confirm.
            */
-          if (4 == rom_api_reason) {  // HWDT
+          if (OWDT_RESET == rom_api_reason) {
               hwdt_info.reset_reason = REASON_WDT_RST;
               *hwdt_reset = true;
-          } else if (!debug__confirm_rom_reason(2)) {
+          } else if (!debug__confirm_rom_reason(EXT_RESET)) {
               hwdt_info.reset_reason = ~0;
           } else {
               hwdt_info.reset_reason = REASON_EXT_SYS_RST;
@@ -600,10 +619,10 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
              * Out of range value, this could be a REASON_DEFAULT_RST,
              * use rom_api_reason to confirm.
              */
-            if (1 == rom_api_reason) {  // Power-on
+            if (POWERON_RESET == rom_api_reason) {
                 hwdt_info.reset_reason = REASON_DEFAULT_RST;
                 *power_on = true;
-            } else if (!debug__confirm_rom_reason(2)) {
+            } else if (!debug__confirm_rom_reason(EXT_RESET)) {
                 hwdt_info.reset_reason = ~0;
             } else {
                 hwdt_info.reset_reason = REASON_EXT_SYS_RST;
@@ -883,6 +902,6 @@ void preinit(void) {
 };
 
 #else
-extern "C" void enable_debug_hwdt_at_link_time (void){
+void enable_debug_hwdt_at_link_time (void){
 }
 #endif // end of #ifdef DEBUG_HWDT
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index 79743b1328..3b22f4b26b 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -16,7 +16,7 @@ typedef struct HWDT_INFO {
     bool g_pcont_valid;
 } HWDT_INFO_t;
 
-extern "C" void enable_debug_hwdt_at_link_time (void);
+void enable_debug_hwdt_at_link_time(void);
 
 extern uint32_t *g_rom_stack;
 extern HWDT_INFO_t hwdt_info;

From b8abe5babc7aad1d23e7b1f8f6005976db61b57d Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 14 Jan 2020 09:17:54 -0800
Subject: [PATCH 07/35] Moved all configuration options to the top. Adjusted
 configuration option order for most likely to be used to the top. Tried to
 improve comments. Replace numbers with enum values.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 197 +++++++++++-------
 1 file changed, 123 insertions(+), 74 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 89df1cd170..092b56d60a 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -20,9 +20,9 @@
  * trapped. Debugging an HWDT can be quite challenging.
  *
  * This module writes a stack dump to the serial port after a Hardware Watchdog
- * Timer has struck and a new boot cycle has begun. Since we have a late start,
- * some information may be lost due to DRAM usage by the Boot ROM and the
- * bootloader.
+ * Timer has struck and a new boot cycle has begun. By making adjustments to the
+ * stack, we can avoid crash stack data being overwritten by this tool,
+ * the Boot ROM and the bootloader.
  *
  * We are using the method defined for `core_esp8266_app_entry_noextra4k.cpp` to
  * load an alternate `app_entry_redefinable()`. For details on this method, see
@@ -33,15 +33,15 @@
  *
  * By making some adjustments to start of the stack pointer, at the entry to
  * `app_entry_redefinable()`, and also to the stack pointer passed to the SDK,
- * we can preserve the stack during an HWDT event. At least thats the idea.
+ * we can preserve the stack during an HWDT event.
  *
- * To use, just place this file in the sketch directory and rebuild and upload
- * your sketch. That should be enough to get it included in your sketch. If
- * that does not work, then add a call to:
+ * To use, just place this file in the sketch directory before opening the
+ * project and build and upload your sketch. That should be enough to get it
+ * included in your sketch. If that does not work, then add a call to:
  *    `void enable_debug_hwdt_at_link_time (void);`
- * in `setup()`. Also, be sure to initialize the Serial interface for printing.
- * This tool relies on the Serial interface already being setup from the
- * previous boot cycle.
+ * in `setup()`. This tool prints to the serial port at the default serial port
+ * speed set by the boot ROM. On a Hardware WDT reset that port speed is
+ * 115200 bps. If your needs differ, see the HWDT_UART_SPEED option below.
  *
  * When you get a stack dump, copy-paste it into the "ESP Exception Decoder".
  * Since we don't have a SP, we see a lot more stuff in the report. Start at the
@@ -60,25 +60,20 @@
  *
  */
 
-#define DEBUG_HWDT
+/*____________________________________________________________________________*/
+/*                                                                            */
+/*                          Configuration Options                             */
+/*____________________________________________________________________________*/
 
-#ifdef DEBUG_HWDT
 
-#include <c_types.h>
-#include "cont.h"
-#include "coredecls.h"
-#include <core_esp8266_features.h>
-#include <esp8266_undocumented.h>
-#include <esp8266_peri.h>
-#include <uart.h>
+/*
+ * DEBUG_HWDT
+ *
+ * Enables this debug tool for printing a Hardware WDT stack dump on reboot.
+ *
+ */
+ #define DEBUG_HWDT
 
-extern "C" {
-#include <user_interface.h>
-#include <uart_register.h>
-extern void call_user_start();
-extern uint32_t rtc_get_reset_reason(void);
-}
-// #define DEBUG_HWDT_DEBUG
 
 /*
  * DEBUG_HWDT_NO4KEXTRA
@@ -90,16 +85,48 @@ extern uint32_t rtc_get_reset_reason(void);
  * Using this option has the effect of taking 4K of DRAM away from the heap
  * which gets used for the "cont" stack. Leaving an extra 4K on the "sys" stack,
  * that is clear of the ROM's BSS area. This allows for a more complete "sys"
- * stack dump.
+ * stack dump. The choice here can depend on where you are crashing.
+ *
+ * Because we don't know where the crash occurs, this option prints two stack
+ * dumps. One for "cont" (user stack) and one for "sys" (NONOS SDK).
  *
  */
 #define DEBUG_HWDT_NO4KEXTRA
 
+
+/*
+ * HWDT_UART_SPEED
+ *
+ * UART serial speed to be used for stack dump. On reboot the ESP8266 ROM
+ * sets a speed of 115200 BPS. If you are using this default speed you can skip
+ * this option and save the IRAM space.
+ *
+ */
+ // #define HWDT_UART_SPEED (115200)
+
+
+/*
+ * HWDT_PRINT_GREETING
+ *
+ * Prints a simple introduction to let you know this tool is active and in the
+ * build. At power-on this may not be viewable on some devices. The crystal
+ * has to be 40Mhz for this to work w/o using the HWDT_UART_SPEED option above.
+ * May not be worth the cost in IRAM.
+ *
+ * EDIT: There is something different in the UART setup after a flash upload. I
+ * am unable to print using the same code that works for Power-on and an EXT_RST
+ * at any other time. After the SDK has run a 2nd EXT_RST will show the greeting
+ * message.
+ *
+ */
+ // #define HWDT_PRINT_GREETING
+
+
 /*
  * ROM_STACK_SIZE
  *
- * There are 4 sections of code that share the same stack space that starts at
- * around 0x40000000.
+ * There are four sections of code that would normally share the same stack
+ * space starting just before 0x40000000.
  *   1) The Boot ROM (uses around 640 bytes)
  *   2) The Bootloader, eboot.elf (uses around 720 bytes.)
  *   3) `app_entry_redefinable()` just before it starts the SDK.
@@ -119,11 +146,13 @@ extern uint32_t rtc_get_reset_reason(void);
 #define ROM_STACK_SIZE (1024)
 #endif
 
+
 /*
  * HWDT_INFO
  *
  * Gather some useful information on ROM and bootloader combined, sys, and cont
- * stack usage as well as other stuff that comes up.
+ * stack usage. If you are missing the include file for this structure, you can
+ * copy-paste from an embeded version of the .h below.
  *
  */
  #define HWDT_INFO
@@ -166,52 +195,62 @@ extern uint32_t rtc_get_reset_reason(void);
  */
  #define HWDT_IF_METHOD_RESET_REASON
 
-/*
- * HWDT_PRINT_GREETING
- *
- * Prints a simple introduction to let you know this tool is active and in the
- * build. At power-on this may not be viewable on some devices. The crystal
- * has to be 40Mhz for this to work w/o using the HWDT_UART_SPEED option below.
- * May not be worth the cost in IRAM.
- *
- * EDIT: There is something different in the UART setup after a EXT_RST after
- * flash upload. I am unable to print using the same code that works for
- * Power-on and an EXT_RST at any other time. After the SDK has run a 2nd
- * EXT_RST will show the greeting message.
- *
- */
- #define HWDT_PRINT_GREETING
+/*____________________________________________________________________________*/
+/*                                                                            */
+/*                     End of Configuration Options                           */
+/*____________________________________________________________________________*/
 
-/*
- * HWDT_UART_SPEED
- *
- * UART serial speed to be used for stack dump. At boot/reboot the ESP8266 ROM
- * sets a speed of 115200 BPS. If you are using this default speed you can skip
- * this option and save the IRAM space.
- *
- */
- #define HWDT_UART_SPEED (115200)
 
+#ifdef DEBUG_HWDT
+
+#include <c_types.h>
+#include "cont.h"
+#include "coredecls.h"
+#include <core_esp8266_features.h>
+#include <esp8266_undocumented.h>
+#include <esp8266_peri.h>
+#include <uart.h>
+
+extern "C" {
+#include <user_interface.h>
+#include <uart_register.h>
+extern void call_user_start();
+extern uint32_t rtc_get_reset_reason(void);
+}
+
+// #define DEBUG_HWDT_DEBUG
+
+#ifdef DEBUG_HWDT_DEBUG
 /*
- * If you do not need the information in provided by HWDT info, you do not need
- * this include. If you do, uncomment the include line and copy-paste the
- * include block below into its respective filename.
+ * We have two copies of HWDT_INFO_t. Verify internal and external structures match.
  *
+ * This duplication is done so that in most cases, a simple/quick add one file
+ * to a sketch folder is enough to debug.
+ *
+ * Only if additional internal information is needed, would this include be
+ * added. Since we have two copies, a static_assert is used to verify that at
+ * least the the size of the two structures are the same.
  */
-// #include "hwdt_app_entry.h"
-
+#include "hwdt_app_entry.h"
+#endif
 
 /*
- * This is only used to verify that the internal and external structure
- * definitions match.
+ * Verify that the internal and external structure definitions match.
  */
 #ifdef HWDT_STACK_DUMP_H
 #define HWDT_INFO_t LOCAL_HWDT_INFO_t
 #define hwdt_info LOCAL_hwdt_info
 #endif
 
+/*
+ * If you are using the HWDT_INFO_t structure, and are missing the include file.
+ * Copy-paste the include block below into its respective filename.
+ */
 
-/******** Start of copy-paste block to create "hwdt_app_entry.h" **************/
+/*____________________________________________________________________________*/
+/*                                                                            */
+/*        Start of copy-paste block to create "hwdt_app_entry.h"              */
+/*____________________________________________________________________________*/
 #if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_INFO_t)
 #define HWDT_STACK_DUMP_H
 
@@ -232,7 +271,10 @@ extern uint32_t *g_rom_stack;
 extern HWDT_INFO_t hwdt_info;
 
 #endif
-/******** End of copy-paste this block for creating "hwdt_app_entry.h" ********/
+/*____________________________________________________________________________*/
+/*                                                                            */
+/*        End of copy-paste block for creating "hwdt_app_entry.h"             */
+/*____________________________________________________________________________*/
 
 
 #ifdef HWDT_INFO_t
@@ -296,8 +338,9 @@ void enable_debug_hwdt_at_link_time(void)
      * `app_entry()` with the one below. This will create a stack dump on
      * Hardware WDT resets.
      *
-     * It appears just including this module in the sketch directory is enough.
-     * However, just play it safe, call this function from setup.
+     * It appears just including this module in the sketch directory before
+     * opening the project is enough. However, just play it safe, call this
+     * function from setup.
      */
 }
 
@@ -505,10 +548,14 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      * after a software restart. And the SDK has not been started so its API is
      * not available.
      *
-     * There is a value in System RTC memory that appears to store, at boot,
-     * the reset reason for the SDK. It appears to be set before the SDK
-     * performs its restart. Of course, this value is invalid at power on
-     * before the SDK runs.
+     * There is a value in System RTC memory that appears to store, at restart,
+     * the reset reason for the SDK. I assume it is set by SDK before the
+     * restart. Of course, this value is invalid at power on before the SDK
+     * runs. It is set to 0 by the SDK after init and later is changed to a 1
+     * and remains 1 during the operation of the sketch. So during normal
+     * execution the reason is preset to indicate a Hardware WDT reset.
+     *
+     * This case list for example and not comprehensive.
      *
      * Case 1: At power-on boot the ROM API result is valid; however, the SDK
      * value in RTC Memory has not been set at this time.
@@ -517,7 +564,9 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      * restart by the SDK. At boot, the ROM API result still reports the HWDT
      * reason.
      *
-     *
+     * Case 3: It is pssible to see a value of 0 or 1 (power-on or HWDT) for the
+     * SDK reset reason for both EXT_RST and Hardware WDT resets. For either of
+     * these values, the ROM API does hold the valid reset reason.
      *
      * I need to know if this is the 1st boot at power on. Combining these
      * indicators has been tricky, I think I now have it.
@@ -546,11 +595,11 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
             }
         }
 
-    } else if (0 == rtc_sys_reason) {
+    } else if (REASON_DEFAULT_RST == rtc_sys_reason) {
         /*
-         * 1) The 0 values shows up with multiple EXT_RSTs quickly.
-         *    The 1 value, previous if, shows up if you wait a while before
-         *    the EXT_RST.
+         * 1) The 0 value (REASON_DEFAULT_RST) shows up with multiple EXT_RSTs
+         *    quickly. The 1 value (REASON_WDT_RST), previous if, shows up if
+         *    you wait a while before the EXT_RST.
          * 2) The 0 value also shows up if a HWDT reset occurs too quickly after
          *    the system starts. Note even the SDK gets this one right.
          */

From c2cbb87dfe5d44fdf667224cf4b3b3f6d055a34f Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 14 Jan 2020 12:19:45 -0800
Subject: [PATCH 08/35] Removed clutter of having an alternate printing method.
 Regular global strings have worked reliably. Tweaked reset reason detection.
 Reordered elements in global structure. Improve #if test for debug option
 Always improving comments.

---
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |   2 +-
 .../examples/HwdtStackDump/HwdtStackDump.ino  |   2 +-
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 179 ++++--------------
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  10 +-
 4 files changed, 41 insertions(+), 152 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
index 3d3d636844..52ea07f9f0 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -1,4 +1,4 @@
-#ifdef DEBUG_HWDT
+#ifdef HWDT_STACK_DUMP_H
 
 extern struct rst_info resetInfo;
 
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index ed32fcd61b..12a4aad693 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -7,7 +7,7 @@
    The module hwdt_app_entry.cpp writes a stack dump to the serial interface
    after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
    Note, at restart the UART speed is set by the ROM to 115200 bps. This is the
-   speed your serial device needs to be set to for displaying the dump.
+   speed your serial device needs set for displaying the dump.
    See hwdt_app_entry.cpp for more details.
 
 */
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 092b56d60a..cf7957bd70 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -150,29 +150,14 @@
 /*
  * HWDT_INFO
  *
- * Gather some useful information on ROM and bootloader combined, sys, and cont
- * stack usage. If you are missing the include file for this structure, you can
- * copy-paste from an embeded version of the .h below.
+ * Gather some interesting information on ROM and bootloader combined, sys, and
+ * cont stack usage. If you are missing the include file for this structure, you
+ * can copy-paste from an embeded version of the .h below.
  *
  */
  #define HWDT_INFO
 
 
-/*
- * HWDT_OPTION_THE_OPTIMIST
- *
- * The optimist's choice. It can be used to reduce the IRAM footprint. It
- * assumes the strings in memory before the crash are still valid and can be
- * used for printing the report.
- *
- * EDIT: It appears I am mistaken. String constants appear to be loaded
- * at boot time and are available from the start before crt0 runs. I'll wait
- * for a reviewer confirmation before making this option a permanent selection.
- *
- */
- #define HWDT_OPTION_THE_OPTIMIST
-
-
 /*
  * ROM_STACK_DUMP
  *
@@ -182,6 +167,7 @@
  #define ROM_STACK_DUMP
  */
 
+
 /*
  * HWDT_IF_METHOD_RESET_REASON
  *
@@ -191,6 +177,10 @@
  * Checks are being performed when DEBUG_HWDT_DEBUG_RESET_REASON has been
  * defined.
  *
+ * EDIT: I should settle on one or the other; however, new issues continue to
+ * popup on determining reset reason. I'll wait till later and pick the
+ * smaller. At this time the "if" approach is 4 bytes smaller.
+ *
  #define DEBUG_HWDT_DEBUG_RESET_REASON
  */
  #define HWDT_IF_METHOD_RESET_REASON
@@ -240,6 +230,7 @@ extern uint32_t rtc_get_reset_reason(void);
 #ifdef HWDT_STACK_DUMP_H
 #define HWDT_INFO_t LOCAL_HWDT_INFO_t
 #define hwdt_info LOCAL_hwdt_info
+#define HWDT_VERIFY_HWDT_INFO
 #endif
 
 /*
@@ -251,17 +242,17 @@ extern uint32_t rtc_get_reset_reason(void);
 /*                                                                            */
 /*        Start of copy-paste block to create "hwdt_app_entry.h"              */
 /*____________________________________________________________________________*/
-#if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_INFO_t)
+#if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
 typedef struct HWDT_INFO {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
-    uint32_t rtc_sys_reason;
     uint32_t rom_api_reason;
-    uint32_t cont_integrity;
+    uint32_t rtc_sys_reason;
     uint32_t reset_reason;
+    uint32_t cont_integrity;
     bool g_pcont_valid;
 } HWDT_INFO_t;
 
@@ -277,9 +268,10 @@ extern HWDT_INFO_t hwdt_info;
 /*____________________________________________________________________________*/
 
 
-#ifdef HWDT_INFO_t
+#ifdef HWDT_VERIFY_HWDT_INFO
 #undef HWDT_INFO_t
 #undef hwdt_info
+#undef HWDT_VERIFY_HWDT_INFO
 static_assert(sizeof(HWDT_INFO_t) == sizeof(LOCAL_HWDT_INFO_t), "Local and include verison of HWDT_INFO_t do not match.");
 #endif
 
@@ -348,17 +340,6 @@ void enable_debug_hwdt_at_link_time(void)
 /* the following code is linked only if a call to the above function is made somewhere */
 
 extern "C" {
-#if 0 // Handy debug print during development
-static void ICACHE_RAM_ATTR print_size(uintptr_t val) {
-    uint32_t fmt_sz[4];
-    fmt_sz[0]  = ('0' ) | ('x' <<8) | ('%' <<16) | ('0' <<24);
-    fmt_sz[1]  = ('8' ) | ('X' <<8) | (',' <<16) | (' ' <<24);
-    fmt_sz[2]  = (' ' ) | ('%' <<8) | ('5' <<16) | ('u' <<24);
-    fmt_sz[3]  = ('\n') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-    ets_printf((const char *)fmt_sz, val, val);
-}
-#endif
-
 
 enum PRINT_STACK {
     CONT = 1,
@@ -366,7 +347,7 @@ enum PRINT_STACK {
     ROM = 4
 };
 
-#if defined(HWDT_OPTION_THE_OPTIMIST)
+
 static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
     ets_printf("\n>>>stack>>>\n\nctx: ");
 
@@ -398,84 +379,6 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
     ets_printf("<<<stack<<<\n");
 }
 
-#else
-static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
-
-    uint32_t fmt_stk[6];
-    fmt_stk[0] = ('\n') | ('>' <<8) | ('>' <<16) | ('>' <<24);
-    fmt_stk[1] = ('s' ) | ('t' <<8) | ('a' <<16) | ('c' <<24);
-    fmt_stk[2] = ('k' ) | ('>' <<8) | ('>' <<16) | ('>' <<24);
-    fmt_stk[3] = ('\n') | ('\n'<<8) | ('c' <<16) | ('t' <<24);
-    fmt_stk[4] = ('x' ) | (':' <<8) | (' ' <<16) | ('%' <<24);
-    fmt_stk[5] = ('s' ) | ('\n'<<8) | ('\0'<<16) | ('\0'<<24);
-
-    uint32_t fmt_sp[9];
-    fmt_sp[0]  = ('s' ) | ('p' <<8) | (':' <<16) | (' ' <<24);
-    fmt_sp[1]  = ('%' ) | ('0' <<8) | ('8' <<16) | ('x' <<24);
-    fmt_sp[2]  = (' ' ) | ('e' <<8) | ('n' <<16) | ('d' <<24);
-    fmt_sp[3]  = (':' ) | (' ' <<8) | ('%' <<16) | ('0' <<24);
-    fmt_sp[4]  = ('8' ) | ('x' <<8) | (' ' <<16) | ('o' <<24);
-    fmt_sp[5]  = ('f' ) | ('f' <<8) | ('s' <<16) | ('e' <<24);
-    fmt_sp[6]  = ('t' ) | (':' <<8) | (' ' <<16) | ('%' <<24);
-    fmt_sp[7]  = ('0' ) | ('4' <<8) | ('x' <<16) | ('\n'<<24);
-    fmt_sp[8]  = ('\0') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-
-    uint32_t fmt_rom[1];
-    fmt_rom[0]  = ('R' ) | ('O' <<8) | ('M' <<16) | ('\0'<<24);
-
-    uint32_t fmt_sys[1];
-    fmt_sys[0]  = ('s' ) | ('y' <<8) | ('s' <<16) | ('\0'<<24);
-
-    uint32_t fmt_cont[2];
-    fmt_cont[0] = ('c' ) | ('o' <<8) | ('n' <<16) | ('t' <<24);
-    fmt_cont[1] = ('\0') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-
-    if (chunk & PRINT_STACK::CONT) {
-        ets_printf((const char *)fmt_stk, (const char *)fmt_cont);
-    } else
-    if (chunk & PRINT_STACK::SYS) {
-        ets_printf((const char *)fmt_stk, (const char *)fmt_sys);
-    } else
-    if (chunk & PRINT_STACK::ROM) {
-        ets_printf((const char *)fmt_stk, (const char *)fmt_rom);
-    }
-
-    ets_printf((const char *)fmt_sp, start, end, 0);
-
-    {
-        uint32_t fmt_stk_dmp[8];
-        fmt_stk_dmp[0] = ('%') | ('0' <<8) | ('8' <<16) | ('x' <<24);
-        fmt_stk_dmp[1] = (':') | (' ' <<8) | (' ' <<16) | ('%' <<24);
-        fmt_stk_dmp[2] = ('0') | ('8' <<8) | ('x' <<16) | (' ' <<24);
-        fmt_stk_dmp[3] = ('%') | ('0' <<8) | ('8' <<16) | ('x' <<24);
-        fmt_stk_dmp[4] = (' ') | ('%' <<8) | ('0' <<16) | ('8' <<24);
-        fmt_stk_dmp[5] = ('x') | (' ' <<8) | ('%' <<16) | ('0' <<24);
-        fmt_stk_dmp[6] = ('8') | ('x' <<8) | (' ' <<16) | ('%' <<24);
-        fmt_stk_dmp[7] = ('c') | ('\n'<<8) | ('\0'<<16) | ('\0'<<24);
-
-        size_t this_mutch = end - start;
-        if (this_mutch >= 0x10) {
-            for (size_t pos = 0; pos < this_mutch; pos += 0x10) {
-                uint32_t *value = (uint32_t *)(start + pos);
-
-                // rough indicator: stack frames usually have SP saved as the second word
-                bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
-                ets_printf((const char*)fmt_stk_dmp, (uint32_t)&value[0],
-                           value[0], value[1], value[2], value[3],
-                           (looksLikeStackFrame)?'<':' ');
-            }
-        }
-    }
-    {
-        uint32_t fmt_stk_end[4];
-        fmt_stk_end[0] = ('<' ) | ('<' <<8) | ('<' <<16) | ('s' <<24);
-        fmt_stk_end[1] = ('t' ) | ('a' <<8) | ('c' <<16) | ('k' <<24);
-        fmt_stk_end[2] = ('<' ) | ('<' <<8) | ('<' <<16) | ('\n'<<24);
-        fmt_stk_end[3] = ('\n') | ('\0'<<8) | ('\0'<<16) | ('\0'<<24);
-        ets_printf((const char *)fmt_stk_end);
-    }
-}
-#endif
 
 static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, const uint32_t *end, const uint32_t pattern) {
     // Find the end of SYS stack activity
@@ -585,17 +488,8 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      * estimate and expands on it.
      */
     hwdt_info.reset_reason = rtc_sys_reason;
-    if (REASON_WDT_RST == rtc_sys_reason) {
-        if (OWDT_RESET == rom_api_reason) {
-            *hwdt_reset = true;
-        } else {
-            hwdt_info.reset_reason = REASON_EXT_SYS_RST;
-            if (!debug__confirm_rom_reason(EXT_RESET)) {
-                hwdt_info.reset_reason = ~0;
-            }
-        }
-
-    } else if (REASON_DEFAULT_RST == rtc_sys_reason) {
+    if (REASON_DEFAULT_RST == rtc_sys_reason ||
+        REASON_WDT_RST     == rtc_sys_reason) {
         /*
          * 1) The 0 value (REASON_DEFAULT_RST) shows up with multiple EXT_RSTs
          *    quickly. The 1 value (REASON_WDT_RST), previous if, shows up if
@@ -609,7 +503,7 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
         } else {
              hwdt_info.reset_reason = REASON_EXT_SYS_RST;
              if (!debug__confirm_rom_reason(EXT_RESET)) {
-               hwdt_info.reset_reason = ~0;
+                hwdt_info.reset_reason = ~0;
              }
         }
 
@@ -625,6 +519,16 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
             hwdt_info.reset_reason = ~0;
             *power_on = false;
         }
+    } else {
+        /*
+         * REASON_EXT_SYS_RST is not expected at reboot, let it fall through to
+         * for confirmation in debug option.
+         */
+        if (REASON_EXT_SYS_RST == rtc_sys_reason) {
+            if (!debug__confirm_rom_reason(EXT_RESET)) {
+                hwdt_info.reset_reason = ~0;
+            }
+        }
     }
 #else
     // New reset reason logic test
@@ -645,10 +549,11 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
           if (OWDT_RESET == rom_api_reason) {
               hwdt_info.reset_reason = REASON_WDT_RST;
               *hwdt_reset = true;
-          } else if (!debug__confirm_rom_reason(EXT_RESET)) {
-              hwdt_info.reset_reason = ~0;
           } else {
               hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+              if (!debug__confirm_rom_reason(EXT_RESET)) {
+                  hwdt_info.reset_reason = ~0;
+              }
           }
           break;
         /* These should be correct as is */
@@ -659,7 +564,7 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
             hwdt_info.reset_reason = rtc_sys_reason;
             break;
         /*
-         * REASON_EXT_SYS_RST is not expected at reboot, let it fall though to
+         * REASON_EXT_SYS_RST is not expected at reboot, let it fall through to
          * default for confirmation.
          */
         case REASON_EXT_SYS_RST:
@@ -671,10 +576,11 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
             if (POWERON_RESET == rom_api_reason) {
                 hwdt_info.reset_reason = REASON_DEFAULT_RST;
                 *power_on = true;
-            } else if (!debug__confirm_rom_reason(EXT_RESET)) {
-                hwdt_info.reset_reason = ~0;
             } else {
                 hwdt_info.reset_reason = REASON_EXT_SYS_RST;
+                if (!debug__confirm_rom_reason(EXT_RESET)) {
+                    hwdt_info.reset_reason = ~0;
+                }
             }
             break;
     }
@@ -806,20 +712,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 
         /* Print context SYS */
         if (hwdt_reset) {
-            {
-#if defined(HWDT_OPTION_THE_OPTIMIST)
-              ets_printf("\nHardware WDT reset\n");
-#else
-              uint32_t fmt_hwdt[6];
-              fmt_hwdt[0] = ('\n') | ('H' <<8) | ('a' <<16) | ('r' <<24);
-              fmt_hwdt[1] = ('d' ) | ('w' <<8) | ('a' <<16) | ('r' <<24);
-              fmt_hwdt[2] = ('e' ) | (' ' <<8) | ('W' <<16) | ('D' <<24);
-              fmt_hwdt[3] = ('T' ) | (' ' <<8) | ('r' <<16) | ('e' <<24);
-              fmt_hwdt[4] = ('s' ) | ('e' <<8) | ('t' <<16) | ('\n'<<24);
-              fmt_hwdt[5] = 0;
-              ets_printf((const char*)fmt_hwdt);
-#endif
-            }
+            ets_printf("\nHardware WDT reset\n");
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index 3b22f4b26b..bf5cdd380e 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -1,18 +1,14 @@
-#ifndef HWDT_STACK_DUMP_H
+#if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
-#ifndef DEBUG_HWDT
-#define DEBUG_HWDT
-#endif
-
 typedef struct HWDT_INFO {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
-    uint32_t rtc_sys_reason;
     uint32_t rom_api_reason;
-    uint32_t cont_integrity;
+    uint32_t rtc_sys_reason;
     uint32_t reset_reason;
+    uint32_t cont_integrity;
     bool g_pcont_valid;
 } HWDT_INFO_t;
 

From 1df82c06f88a29140c329b2600e26f6953b4e0a1 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 14 Jan 2020 15:37:36 -0800
Subject: [PATCH 09/35] Added delays around uart_div_modify. This appeara to
 resolve the lost data problem that occurs when printing after a flash upload
 using esptool. Curiously, esptool stub also uses similar delays. Word choices
 and description improvements.

---
 .../examples/HwdtStackDump/HwdtStackDump.ino  | 18 +++++-----
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 33 ++++++++++++-------
 2 files changed, 30 insertions(+), 21 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 12a4aad693..9692c40d8b 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -1,22 +1,22 @@
 /*
-   A Hardware WDT Stack Dump by Michael Hightower
+   A Hardware WDT Reset stack dump tool by Michael Hightower
 
-   This Sketch demonstrates the use of a tool to print a stack dump
-   at reboot after a Hardware WDT event.
+   This Sketch demonstrates the use of a tool that prints a stack dump after
+   a Hardware WDT reset. After a Hardware Watchdog Timer reset, the module
+   hwdt_app_entry.cpp writes a stack dump to the serial interface.
 
-   The module hwdt_app_entry.cpp writes a stack dump to the serial interface
-   after a Hardware Watchdog Timer has struck and a new boot cycle has begun.
-   Note, at restart the UART speed is set by the ROM to 115200 bps. This is the
-   speed your serial device needs set for displaying the dump.
-   See hwdt_app_entry.cpp for more details.
+   The goal was to have a file (hwdt_app_entry.cpp) that could be dropped into
+   a sketch directory, then open the sketch project, build, upload, and debug.
 
+   Note, at the restart, the UART speed is set by the ROM to 115200 bps. This
+   is the speed your serial device needs to be for displaying the dump.
+   See hwdt_app_entry.cpp for more options and details.
 */
 
 #include <Arduino.h>
 #include <ESP8266WiFi.h>
 #include <Esp.h>
 #include <user_interface.h>
-// void enable_debug_hwdt_at_link_time(void);
 
 #include "AddOn.h"
 /*
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index cf7957bd70..52827515b7 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -69,7 +69,7 @@
 /*
  * DEBUG_HWDT
  *
- * Enables this debug tool for printing a Hardware WDT stack dump on reboot.
+ * Enables this debug tool for printing a Hardware WDT stack dump at restart.
  *
  */
  #define DEBUG_HWDT
@@ -118,6 +118,10 @@
  * at any other time. After the SDK has run a 2nd EXT_RST will show the greeting
  * message.
  *
+ * EDIT2: Seems to work better now. Placed delays around calls to
+ * uart_div_modify(). Leave these comments until I have more experience with
+ * this change.
+ *
  */
  // #define HWDT_PRINT_GREETING
 
@@ -164,8 +168,9 @@
  * Dump the stack contents of the ROM Stack area. Good for getting a visual
  * on stack usage. Probably not of value beyond developing this tool.
  *
- #define ROM_STACK_DUMP
+ * To see printing you may need to use this with option: HWDT_UART_SPEED.
  */
+ // #define ROM_STACK_DUMP
 
 
 /*
@@ -297,7 +302,7 @@ constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
  * because the ROM BSS gets zeroed as part of ROM init on reboot. Any part of
  * the "sys" stack residing there is lost. On the other hand, it becomes a prime
  * candidate for DRAM address space to handle the needs of this stack dump
- * utility.
+ * tool.
  */
 constexpr uint32_t *sys_stack_e000  = (uint32_t *)0x3fffe000;
 
@@ -633,25 +638,26 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(uint32_t uart_no, uint32_t new_sp
     }
     uint32_t new_uart_divisor = master_freq / new_speed;
 
-#if defined(DEBUG_HWDT_DEBUG)
     int rc = 1;
     if (new_uart_divisor != uart_divisor) {
+        /*
+         * These delays appear to resolve the lost data problem that occurs when
+         * printing after a flash upload using esptool.
+         */
+        ets_delay_us(18000);
         rc = real_uart_div_modify(0, new_uart_divisor);
-        ets_delay_us(50); // Allow one 20K BPS character time to pass
+        ets_delay_us(1000);
     }
+#if defined(DEBUG_HWDT_DEBUG)
     ets_printf("\n\n%d = real_uart_div_modify(0, %u / %u);\n", rc, master_freq, new_speed);
     ets_printf("F_CRYSTAL = %u\n", crystal_freq);
     ets_printf("old uart_divisor = %u\n", uart_divisor);
     ets_printf("master_freq = %u\n", master_freq);
-    return (rc) ? 0 : uart_divisor;
-#else
-    if (new_uart_divisor != uart_divisor) {
-        return (real_uart_div_modify(0, new_uart_divisor)) ? 0 : uart_divisor;
-    }
-    return 0;
 #endif
+    return (rc) ? 0 : uart_divisor;
 }
 #endif
+
 /*
  *
  *
@@ -750,12 +756,15 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 
 #if defined(HWDT_PRINT_GREETING)
     ets_printf("\n\nHardware WDT Stack Dump - enabled\n\n");
+#else
+    ets_printf("\n\n");
 #endif
 
-ets_delay_us(12000); /* Let UART FIFO clear. */
 #ifdef HWDT_UART_SPEED
     if (uart_divisor) {
+        ets_delay_us(18000);
         real_uart_div_modify(0, uart_divisor); // Put it back the way we found it!
+        ets_delay_us(1000);
     }
 #endif
 }

From ad3bbad21fd803bceaf5e8aa42997517208cd5c5 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 14 Jan 2020 22:18:43 -0800
Subject: [PATCH 10/35] Finished TODO looked at assembly of
 app_entry_redefinable to confirm no mixed up stack frame was created. Also
 removed no longer needed extra level of function calling. Use existing macros
 from uart_register,h to handle getting current UART speed. Added some missing
 `const`.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 62 ++++++++-----------
 1 file changed, 25 insertions(+), 37 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 52827515b7..91f14d124a 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -217,7 +217,8 @@ extern uint32_t rtc_get_reset_reason(void);
 
 #ifdef DEBUG_HWDT_DEBUG
 /*
- * We have two copies of HWDT_INFO_t. Verify internal and external structures match.
+ * We have two copies of HWDT_INFO_t. Verify internal and external structures
+ * match.
  *
  * This duplication is done so that in most cases, a simple/quick add one file
  * to a sketch folder is enough to debug.
@@ -298,11 +299,10 @@ constexpr uint32_t *rom_stack_first = (uint32_t *)0x40000000;
 constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
 /*
  * The space between 0x3fffe000 up to 0x3fffeb30 is a ROM BSS area that is later
- * claimed by the SDK for stack space. This is a problem area for stack dump,
+ * claimed by the SDK for stack space. This is a problem area for this tool,
  * because the ROM BSS gets zeroed as part of ROM init on reboot. Any part of
  * the "sys" stack residing there is lost. On the other hand, it becomes a prime
- * candidate for DRAM address space to handle the needs of this stack dump
- * tool.
+ * candidate for DRAM address space to handle the needs of this tool.
  */
 constexpr uint32_t *sys_stack_e000  = (uint32_t *)0x3fffe000;
 
@@ -327,8 +327,7 @@ uint32_t *g_rom_stack  __attribute__((section(".noinit")));
 size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
 HWDT_INFO_t hwdt_info __attribute__((section(".noinit")));
 
-void enable_debug_hwdt_at_link_time(void)
-{
+void enable_debug_hwdt_at_link_time(void) {
     /*
      * This function does nothing; however, including a call to it in setup,
      * allows this module to override, at link time, the core_esp8266_main.cpp's
@@ -353,7 +352,7 @@ enum PRINT_STACK {
 };
 
 
-static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t chunk) {
+static void ICACHE_RAM_ATTR print_stack(const uintptr_t start, const uintptr_t end, const uint32_t chunk) {
     ets_printf("\n>>>stack>>>\n\nctx: ");
 
     if (chunk & PRINT_STACK::CONT) {
@@ -368,12 +367,12 @@ static void ICACHE_RAM_ATTR print_stack(uintptr_t start, uintptr_t end, uint32_t
 
     ets_printf("\nsp: %08x end: %08x offset: %04x\n", start, end, 0);
 
-    size_t this_mutch = end - start;
+    const size_t this_mutch = end - start;
     if (this_mutch >= 0x10) {
         for (size_t pos = 0; pos < this_mutch; pos += 0x10) {
-            uint32_t *value = (uint32_t *)(start + pos);
+            const uint32_t *value = (uint32_t *)(start + pos);
 
-            // rough indicator: stack frames usually have SP saved as the second word
+            /* rough indicator: stack frames usually have SP saved as the second word */
             bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
             ets_printf("%08x:  %08x %08x %08x %08x %c\n", (uint32_t)&value[0],
                        value[0], value[1], value[2], value[3],
@@ -481,9 +480,10 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      *
      */
 
-    uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason = RTC_SYS[0];
+    hwdt_info.rtc_sys_reason = RTC_SYS[0];
+    const uint32_t rtc_sys_reason = hwdt_info.rtc_sys_reason;
     hwdt_info.rom_api_reason = rtc_get_reset_reason();
-    ROM_RST_REASON_t rom_api_reason = (ROM_RST_REASON_t)hwdt_info.rom_api_reason;
+    const ROM_RST_REASON_t rom_api_reason = (ROM_RST_REASON_t)hwdt_info.rom_api_reason;
 
 #ifdef HWDT_IF_METHOD_RESET_REASON
     *hwdt_reset = false;
@@ -605,18 +605,15 @@ typedef int (*fp_uart_div_modify_t)(uint32_t uart_no, uint32 DivLatchValue);
 constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_uart_div_modify;
 
 
-static uint32_t ICACHE_RAM_ATTR set_uart_speed(uint32_t uart_no, uint32_t new_speed) {
-    (void)uart_no;
+static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
 
-    // #if F_CRYSTAL == 40000000
 #ifdef F_CRYSTAL
     constexpr uint32_t crystal_freq = F_CRYSTAL;
 #else
     constexpr uint32_t crystal_freq = 26000000;
 #endif
-    constexpr uint32_t UART_CLK_DIVISOR_M = (0x000FFFFF);
     constexpr uint32_t rom_uart_speed = 115200;
-    uint32_t uart_divisor = ESP8266_REG(0x14) & UART_CLK_DIVISOR_M;
+    const uint32_t uart_divisor = UART_CLKDIV(uart_no) & UART_CLKDIV_CNT;
     uint32_t master_freq = crystal_freq * 2;
 
     if (REASON_DEFAULT_RST       == hwdt_info.reset_reason ||
@@ -674,7 +671,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
     get_reset_reason(&power_on, &hwdt_reset);
 
 #ifdef HWDT_UART_SPEED
-    uint32_t uart_divisor = set_uart_speed(0, HWDT_UART_SPEED);
+    const uint32_t uart_divisor = set_uart_speed(0, HWDT_UART_SPEED);
 #endif
 #if defined(DEBUG_HWDT_DEBUG)
     ets_printf("Basic boot reason: %s\n", (power_on) ? "Power-on" : "Reboot");
@@ -770,6 +767,9 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 }
 
 void ICACHE_RAM_ATTR app_entry_start(void) {
+
+    handle_hwdt();
+
 #ifdef DEBUG_HWDT_NO4KEXTRA
     /*
      *  Continuation context is in BSS.
@@ -790,20 +790,12 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     asm volatile("" ::: "memory");
     asm volatile("mov.n a1, %0\n"
                  "mov.n a3, %1\n"
-                 "mov.n a0, %2\n"     // Should never return; however, set return to Boot ROM Breakpoint
+                 "mov.n a0, %2\n"     /* Should never return; however, set return to Boot ROM Breakpoint */
                  "jx a3\n" : : "r" (sys_stack_first), "r" (call_user_start), "r" (0x4000044c) );
 
     __builtin_unreachable();
 }
 
-
-void ICACHE_RAM_ATTR app_entry_redefinable2(void) {
-    handle_hwdt();
-    app_entry_start();
-
-    __builtin_unreachable();
-}
-
 void ICACHE_RAM_ATTR app_entry_redefinable(void) {
     /*
      * There are 4 sections of code that share the stack starting near
@@ -814,22 +806,18 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
      *   4) The NONOS SDK, optionally the Core when the extra 4K option is
      *      selected.
      *
-     * Make the ROM BSS zeroed out memory the home for our temporary stack. That
-     * way no additional information will be lost. That will remove this tool
-     * from the list of possible concerns for stack overwrite. For now, At this
-     * time it is set to 1024.
+     * Use the ROM BSS zeroed out memory as the home for our temporary stack.
+     * This way no additional information will be lost. That will remove this
+     * tool from the list of possible concerns for stack overwrite.
      *
      */
     asm volatile ("mov.n a1, %0\n"
                   "mov.n a3, %1\n"
                   "mov.n a0, %2\n"
-                  "jx a3\n" : : "r" (0x3fffeb30), "r" (app_entry_redefinable2), "r" (0x4000044c) );
+                  "jx a3\n" : : "r" (0x3fffeb30), "r" (app_entry_start), "r" (0x4000044c) );
     /*
-     * TODO: Look at the assembly, I had to split app_entry_redefinable like
-     * this to stop some back indexing on the stack. Looks like some temporary
-     * storage was set up and was being referenced and I moved it away by
-     * changing the stack pointer. Splitting the `app_entry_redefinable()`
-     * function into two parts seems to have taken care of that issue.
+     * Keep this function with just asm seems to help avoid a stack frame being
+     * created for this function and things getting really confused.
      */
 
     __builtin_unreachable();

From b08714b1d172f79ccf23c7d4f14ef9d24f5ad06d Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 16 Jan 2020 13:02:16 -0800
Subject: [PATCH 11/35] Comment changes. Added a few newlines to printing.
 Decreased the settling delay after the uart_div_modify call.

---
 .../examples/HwdtStackDump/HwdtStackDump.ino  | 12 ++-
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 94 ++++++++++++-------
 2 files changed, 68 insertions(+), 38 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 9692c40d8b..65e7ab9c88 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -8,9 +8,10 @@
    The goal was to have a file (hwdt_app_entry.cpp) that could be dropped into
    a sketch directory, then open the sketch project, build, upload, and debug.
 
-   Note, at the restart, the UART speed is set by the ROM to 115200 bps. This
-   is the speed your serial device needs to be for displaying the dump.
-   See hwdt_app_entry.cpp for more options and details.
+   When the ESP8266 restarts because of a Hardware WDT reset, the serial port
+   speed defaults to 115200 bps. For support of other speeds, review the
+   comments on option HWDT_UART_SPEED in wdt_app_entry.cpp.
+
 */
 
 #include <Arduino.h>
@@ -20,8 +21,9 @@
 
 #include "AddOn.h"
 /*
-  To see the difference with and without this tool. Comment out the #include
-  below. And comment out the "#define DEBUG_HWDT" line in hwdt_app_entry.cpp.
+  If you need to run your sketch w/o this tool or you want to  see the
+  difference with and without this tool. Comment out the #include below. And
+  comment out the "#define DEBUG_HWDT" line in hwdt_app_entry.cpp.
 */
 #include "hwdt_app_entry.h"
 
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 91f14d124a..0be58dd140 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -28,8 +28,9 @@
  * load an alternate `app_entry_redefinable()`. For details on this method, see
  * comments in `core_esp8266_main.cpp's app_entry()`.
  *
- * Using this alternate we can gain control before the SDK is started.
- * And dump what is left of the "sys" and "cont" stacks.
+ * Using this tools alternate `app_entry_redefinable()` we can gain control
+ * before the SDK is started. And dump what is left of the "sys" and "cont"
+ * stacks.
  *
  * By making some adjustments to start of the stack pointer, at the entry to
  * `app_entry_redefinable()`, and also to the stack pointer passed to the SDK,
@@ -40,9 +41,26 @@
  * included in your sketch. If that does not work, then add a call to:
  *    `void enable_debug_hwdt_at_link_time (void);`
  * in `setup()`. This tool prints to the serial port at the default serial port
- * speed set by the boot ROM. On a Hardware WDT reset that port speed is
+ * speed set by the Boot ROM. On a Hardware WDT reset that port speed is
  * 115200 bps. If your needs differ, see the HWDT_UART_SPEED option below.
  *
+ * More on crystal differences and data rates:
+ *     When the ESP8266 restarts because of a Hardware WDT reset, the port speed
+ *     defaults to 115200. This will be the speed, even if you have a 26MHz or
+ *     40MHz Crystal. If you would like to use a different data rate, use the
+ *     option HWDT_UART_SPEED described below.
+ *
+ *     The Boot ROM initially sets the UART clock divisor to support a data rate
+ *     of 115200 bps with the assumption that it has a 40MHz crystal. When a
+ *     26MHz crystal is used instead, the resulting error gives us a real rate
+ *     of 74880 bps and printing is garbled at first, until the CPU clock's PLL
+ *     is adjusted by the NONOS SDK. While CH_PD and EST_RST bring the CPU back
+ *     to this state of underclocking with a 26MHz crystal, the Hardware WDT
+ *     reset does not appear to do the same. The UART continues to be clocked at
+ *     a rate to support a device at 115200 bps. Thus, allowing us to see the
+ *     old cryptic WDT message along with our new stack dump.
+ *
+ *
  * When you get a stack dump, copy-paste it into the "ESP Exception Decoder".
  * Since we don't have a SP, we see a lot more stuff in the report. Start at the
  * bottom and work your way up. At this time I have not had a lot of practice
@@ -79,16 +97,20 @@
  * DEBUG_HWDT_NO4KEXTRA
  *
  * This option will leave more of the system stack available for the stack dump.
- * The problem with the "4K extra" option is that it pushes the system stack up
- * into the ROM's BSS area which gets zeroed at reboot by the Boot ROM.
+ * A problem we have with the "4K extra" option, is it pushes the system stack
+ * up into the ROM's BSS area which gets zeroed at reboot by the Boot ROM.
  *
- * Using this option has the effect of taking 4K of DRAM away from the heap
+ * Using this option has the effect of taking 4K of DRAM away from the heap,
  * which gets used for the "cont" stack. Leaving an extra 4K on the "sys" stack,
  * that is clear of the ROM's BSS area. This allows for a more complete "sys"
  * stack dump. The choice here can depend on where you are crashing.
  *
  * Because we don't know where the crash occurs, this option prints two stack
- * dumps. One for "cont" (user stack) and one for "sys" (NONOS SDK).
+ * dumps, one for "cont" (user stack) and one for "sys" (NONOS SDK).
+ *
+ * In contrast, if the hang is happening on the "cont" stack, you don't need a
+ * complete stack dump of the "sys" stack. You can omit this define and have an
+ * extra 4K in the heap.
  *
  */
 #define DEBUG_HWDT_NO4KEXTRA
@@ -97,19 +119,26 @@
 /*
  * HWDT_UART_SPEED
  *
- * UART serial speed to be used for stack dump. On reboot the ESP8266 ROM
- * sets a speed of 115200 BPS. If you are using this default speed you can skip
- * this option and save the IRAM space.
+ * This option alters the UART serial speed used for printing the Hardware WDT
+ * reset stack dump. Without this option on an HWDT reset, the existing default
+ * speed of 115200 bps will be used. If you are using this default speed, you
+ * can skip this option and save on the IRAM space. Note this option only
+ * changes the speed while this module is printing.
+ *
+ * For more confusion on the serial port speed, see "More on crystal differences
+ * and data rates" in the comments at the top.
  *
  */
+ // #define HWDT_UART_SPEED (74880)
  // #define HWDT_UART_SPEED (115200)
+ // #define HWDT_UART_SPEED (230400)
 
 
 /*
  * HWDT_PRINT_GREETING
  *
  * Prints a simple introduction to let you know this tool is active and in the
- * build. At power-on this may not be viewable on some devices. The crystal
+ * build. At power-on, this may not be viewable on some devices. The crystal
  * has to be 40Mhz for this to work w/o using the HWDT_UART_SPEED option above.
  * May not be worth the cost in IRAM.
  *
@@ -129,12 +158,12 @@
 /*
  * ROM_STACK_SIZE
  *
- * There are four sections of code that would normally share the same stack
- * space starting just before 0x40000000.
+ * There are four sections of code starting just before 0x40000000, that share
+ * the same stack space.
  *   1) The Boot ROM (uses around 640 bytes)
  *   2) The Bootloader, eboot.elf (uses around 720 bytes.)
  *   3) `app_entry_redefinable()` just before it starts the SDK.
- *   4) The NONOS SDK, optionally the Core when the extra 4K option is selected.
+ *   4) The NONOS SDK and optionally the Core when the extra 4K option is selected.
  *
  * To preserve the sketch stack data for a stack dump, I define three separate
  * stacks:
@@ -154,9 +183,9 @@
 /*
  * HWDT_INFO
  *
- * Gather some interesting information on ROM and bootloader combined, sys, and
- * cont stack usage. If you are missing the include file for this structure, you
- * can copy-paste from an embeded version of the .h below.
+ * Gather some information on ROM and bootloader combined, sys, and cont stack
+ * usage. If you are missing the include file for this structure, you can
+ * copy-paste from the embedded version of the .h below.
  *
  */
  #define HWDT_INFO
@@ -165,10 +194,10 @@
 /*
  * ROM_STACK_DUMP
  *
- * Dump the stack contents of the ROM Stack area. Good for getting a visual
- * on stack usage. Probably not of value beyond developing this tool.
+ * Dump the stack contents of the ROM Stack area. This gives us a visual of the
+ * stack usage. Probably not of value, beyond developing this tool.
  *
- * To see printing you may need to use this with option: HWDT_UART_SPEED.
+ * To see printing, you may need to use this option with HWDT_UART_SPEED.
  */
  // #define ROM_STACK_DUMP
 
@@ -176,15 +205,13 @@
 /*
  * HWDT_IF_METHOD_RESET_REASON
  *
- * If statement vs switch method to implement the logic. Both can be made
- * smaller by removing confirmation checks.
+ * "If" statement or "switch" method to implement, the reset reason logic. Both
+ * can be made smaller by removing confirmation checks.
  *
- * Checks are being performed when DEBUG_HWDT_DEBUG_RESET_REASON has been
- * defined.
+ * Checks are performed when DEBUG_HWDT_DEBUG_RESET_REASON has been defined.
  *
  * EDIT: I should settle on one or the other; however, new issues continue to
- * popup on determining reset reason. I'll wait till later and pick the
- * smaller. At this time the "if" approach is 4 bytes smaller.
+ * pop up on determining reset reason. I'll wait until later and pick one.
  *
  #define DEBUG_HWDT_DEBUG_RESET_REASON
  */
@@ -353,7 +380,7 @@ enum PRINT_STACK {
 
 
 static void ICACHE_RAM_ATTR print_stack(const uintptr_t start, const uintptr_t end, const uint32_t chunk) {
-    ets_printf("\n>>>stack>>>\n\nctx: ");
+    ets_printf("\n\n>>>stack>>>\n\nctx: ");
 
     if (chunk & PRINT_STACK::CONT) {
         ets_printf("cont");
@@ -462,7 +489,8 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
      * and remains 1 during the operation of the sketch. So during normal
      * execution the reason is preset to indicate a Hardware WDT reset.
      *
-     * This case list for example and not comprehensive.
+     * These cases represent some examples. The list is not meant to be
+     * comprehensive.
      *
      * Case 1: At power-on boot the ROM API result is valid; however, the SDK
      * value in RTC Memory has not been set at this time.
@@ -595,8 +623,8 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
 
 #ifdef HWDT_UART_SPEED
 /*
- * We need this because the SDK has an override on this already. If we call it
- * at this time we will crash in the unintialized SDK.
+ * We need this because the SDK overrides the ROMs entry-point. When we call the
+ * uninitialized SDK's version of uart_div_modify, we crash.
  */
 #ifndef ROM_uart_div_modify
 #define ROM_uart_div_modify         0x400039d8
@@ -643,7 +671,7 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uin
          */
         ets_delay_us(18000);
         rc = real_uart_div_modify(0, new_uart_divisor);
-        ets_delay_us(1000);
+        ets_delay_us(150);
     }
 #if defined(DEBUG_HWDT_DEBUG)
     ets_printf("\n\n%d = real_uart_div_modify(0, %u / %u);\n", rc, master_freq, new_speed);
@@ -715,7 +743,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 
         /* Print context SYS */
         if (hwdt_reset) {
-            ets_printf("\nHardware WDT reset\n");
+            ets_printf("\n\nHardware WDT reset\n");
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
@@ -761,7 +789,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
     if (uart_divisor) {
         ets_delay_us(18000);
         real_uart_div_modify(0, uart_divisor); // Put it back the way we found it!
-        ets_delay_us(1000);
+        ets_delay_us(150);
     }
 #endif
 }

From be7417a16eeeeda339f070cc4ff052877e107e93 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Mon, 20 Jan 2020 15:40:48 -0800
Subject: [PATCH 12/35] Improved comments. Print caution message when stack
 integrity checks failed.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 38 ++++++++++++++++---
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 0be58dd140..c2a829351e 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -62,9 +62,10 @@
  *
  *
  * When you get a stack dump, copy-paste it into the "ESP Exception Decoder".
- * Since we don't have a SP, we see a lot more stuff in the report. Start at the
- * bottom and work your way up. At this time I have not had a lot of practice
- * using this tool.  TODO: Update description with more details when available.
+ * Since we don't have an SP, we see a lot more stuff in the report, compared to
+ * what you would see with a postmortem report. Start at the bottom and work
+ * your way up. At this time, I have not had a lot of practice using this tool.
+ * TODO: Update description with more details when available.
  *
  *
  *
@@ -74,7 +75,12 @@
  * 0x3fffeb30. This would allow for a value near 640 for ROM_STACK_SIZE.
  *
  * If a problem should arise with some data elements being corrupted during
- * reboot, would it be possible to move their DRAM location higher in memory.
+ * reboot, would it be possible to move their DRAM location higher in memory?
+ *
+ * Also, DRAM being valid across reset events other than power-on and deep
+ * sleep, suggest that a variable in the .noinit section could be used instead
+ * of the more limited RTC Memory for sketches that don't do deep sleep.
+ * However, DRAM should be considered invalid after an upload serial or OTA.
  *
  */
 
@@ -434,6 +440,9 @@ static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, c
 
 static void ICACHE_RAM_ATTR check_g_pcont_validity(void) {
     /*
+     * DRAM appears to remain valid after most resets. There is more on this in
+     * handle_hwdt().
+     *
      * Testing of vital pointers for validity could also aid as a partial
      * indicator of power-on. Not needed for that purpose at this time.
      */
@@ -593,7 +602,7 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
         case REASON_EXCEPTION_RST:
         case REASON_SOFT_WDT_RST:
         case REASON_SOFT_RESTART:
-        case REASON_DEEP_SLEEP_AWAKE:    // TODO: Untested.
+        case REASON_DEEP_SLEEP_AWAKE:
             hwdt_info.reset_reason = rtc_sys_reason;
             break;
         /*
@@ -714,7 +723,21 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
         ets_printf("  ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
     }
 #endif
-    // After a flash upload memory cannot be trusted.
+    /*
+     * With a few exceptions, DRAM data remains valid after a reset.
+     *
+     * Check for "cont" stack consistency.
+     * The contents of DRAM are not expected to be valid after a:
+     *   1) flash update (OTA or serial)
+     *   2) power-on
+     *   3) deep sleep
+     * Additionally, g_pcont is expected to be invalid after these events.
+     *
+     * When g_pcont is valid, we expect these checks to be valid. I am not sure
+     * what to do when they are not. An error that could lead to a crash is
+     * corrected. We currently continue and print the stack dump. This assumes
+     * something is better than nothing.
+     */
     if (!power_on && hwdt_info.g_pcont_valid) {
         uint32_t cont_integrity = 0;
         if (g_pcont->stack_guard1 != CONT_STACKGUARD) {
@@ -750,6 +773,9 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
             /* Print separate ctx: cont stack */
             print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
 #endif
+            if (hwdt_info.cont_integrity) {
+                ets_printf("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n")
+            }
         }
     }
 

From 45284460bb87efd39c85bcbc73adddc0ecf05ba8 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 21 Jan 2020 12:27:46 -0800
Subject: [PATCH 13/35] Several corrections to set_uart_speed Comment
 improvements Added missing ";"

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 53 ++++++++++++-------
 1 file changed, 34 insertions(+), 19 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index c2a829351e..080d7317d5 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -632,15 +632,18 @@ static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_rese
 
 #ifdef HWDT_UART_SPEED
 /*
- * We need this because the SDK overrides the ROMs entry-point. When we call the
- * uninitialized SDK's version of uart_div_modify, we crash.
+ * Here we use uart_div_modify in the Boot ROM. Note the Boot ROM version does
+ * not do any input validation.
+ *
+ * We cannot use the SDKs replacement. It is not in IRAM.
  */
 #ifndef ROM_uart_div_modify
 #define ROM_uart_div_modify         0x400039d8
 #endif
-typedef int (*fp_uart_div_modify_t)(uint32_t uart_no, uint32 DivLatchValue);
+typedef void (*fp_uart_div_modify_t)(uint32_t uart_no, uint32 DivLatchValue);
 constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_uart_div_modify;
 
+#define UART_CLKDIV_MASK 0x000FFFFFUL
 
 static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
 
@@ -650,45 +653,57 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uin
     constexpr uint32_t crystal_freq = 26000000;
 #endif
     constexpr uint32_t rom_uart_speed = 115200;
-    const uint32_t uart_divisor = UART_CLKDIV(uart_no) & UART_CLKDIV_CNT;
+    uint32_t uart_divisor = USD(uart_no) & UART_CLKDIV_MASK;
     uint32_t master_freq = crystal_freq * 2;
 
     if (REASON_DEFAULT_RST       == hwdt_info.reset_reason ||
         REASON_EXT_SYS_RST       == hwdt_info.reset_reason ||
         REASON_DEEP_SLEEP_AWAKE  == hwdt_info.reset_reason) {
         /*
-         * At this time, with a power on boot or EXT_RSTs the CPU Frequency
-         * calibration has not happended. Thus for a 26MHz Xtal, the CPU clock
-         * is running at 52MHz. Tweak uart speed here, so printing works.
-         * To avoid confusion at exit, put the divisor back as we found it.
+         * At this time, with power on boot or EXT_RST, the CPU Frequency
+         * calibration has not happened. Thus for a 26MHz Xtal, the CPU clock is
+         * running at 52MHz. Tweak UART speed here, so printing works. To avoid
+         * confusion on exit, we later restore the divisor.
          */
         master_freq = crystal_freq * 2;
+
     } else {
         /*
-         * No adjustments needed on reboots, etc.
-         * Avoid accumulating divide errors.
+         * No adjustments are needed on reboots, etc.
+         *
+         * The UART clock is independent of the CPU Speed. (ie. 80MHz, 160MHz)
+         * UART_CLK_FREQ is used in user_init, and ESP8266_CLOCK is used in
+         * uart.h. Both are defined to be 80000000.
          */
-        master_freq = ((uart_divisor * rom_uart_speed) < 100000000) ? 80000000 : 160000000;
+        master_freq = UART_CLK_FREQ;
     }
+
     uint32_t new_uart_divisor = master_freq / new_speed;
 
-    int rc = 1;
-    if (new_uart_divisor != uart_divisor) {
+    if (UART_CLKDIV_MASK < new_uart_divisor ||
+        2 > new_uart_divisor ||
+        new_uart_divisor == uart_divisor) {
+        uart_divisor = 0;
+
+    } else {
         /*
-         * These delays appear to resolve the lost data problem that occurs when
-         * printing after a flash upload using esptool.
+         * These delays appear to resolve the lost data problem that occurs
+         * when printing after a flash upload using esptool.
          */
         ets_delay_us(18000);
-        rc = real_uart_div_modify(0, new_uart_divisor);
+        real_uart_div_modify(0, new_uart_divisor);
         ets_delay_us(150);
     }
+
 #if defined(DEBUG_HWDT_DEBUG)
-    ets_printf("\n\n%d = real_uart_div_modify(0, %u / %u);\n", rc, master_freq, new_speed);
+    ets_printf("\n\nreal_uart_div_modify(0, %u / %u);\n", master_freq, new_speed);
     ets_printf("F_CRYSTAL = %u\n", crystal_freq);
     ets_printf("old uart_divisor = %u\n", uart_divisor);
+    ets_printf("new uart_divisor = %u\n", new_uart_divisor);
     ets_printf("master_freq = %u\n", master_freq);
 #endif
-    return (rc) ? 0 : uart_divisor;
+
+    return uart_divisor;
 }
 #endif
 
@@ -774,7 +789,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
             print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
 #endif
             if (hwdt_info.cont_integrity) {
-                ets_printf("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n")
+                ets_printf("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n");
             }
         }
     }

From ed826ea4d6de01d9fff070242201457a12d21b75 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 21 Jan 2020 15:46:30 -0800
Subject: [PATCH 14/35] Removed unused include. Code cleanup. Comments.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 64 ++++++++++++-------
 1 file changed, 40 insertions(+), 24 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 080d7317d5..d640b782dc 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -20,16 +20,16 @@
  * trapped. Debugging an HWDT can be quite challenging.
  *
  * This module writes a stack dump to the serial port after a Hardware Watchdog
- * Timer has struck and a new boot cycle has begun. By making adjustments to the
+ * Timer has struck, and a new boot cycle has begun. By making adjustments to the
  * stack, we can avoid crash stack data being overwritten by this tool,
- * the Boot ROM and the bootloader.
+ * the Boot ROM, and the bootloader.
  *
  * We are using the method defined for `core_esp8266_app_entry_noextra4k.cpp` to
  * load an alternate `app_entry_redefinable()`. For details on this method, see
  * comments in `core_esp8266_main.cpp's app_entry()`.
  *
- * Using this tools alternate `app_entry_redefinable()` we can gain control
- * before the SDK is started. And dump what is left of the "sys" and "cont"
+ * Using this tool's alternate `app_entry_redefinable()`, we can gain control
+ * before the SDK is started. And dump the contents of the "sys" and "cont"
  * stacks.
  *
  * By making some adjustments to start of the stack pointer, at the entry to
@@ -82,6 +82,28 @@
  * of the more limited RTC Memory for sketches that don't do deep sleep.
  * However, DRAM should be considered invalid after an upload serial or OTA.
  *
+ * With this module active, postmortem stack dumps will be a little longer than
+ * they need to be. The sys stack now ends at 0x3FFFFC00 instead of 0x3FFFFB0.
+ *
+ * Uh, there is a third stack ?? ctx: bearssl - I have not coded for this.
+ * I'll leave this for later, as a possible future enhancement.
+ * There are three possible stacks to hang in!?
+ * Notes for later:
+ *   * Stack is allocted with malloc - must be recovered before SDK init
+ *     (umm_init() called on 1ST heap free call early in SDK init)
+ *   * Function calls for addresses are pageable. Need to access pointers
+ *     directly.
+ *   * stackpaint is 0xdeadbeef
+ *   * stack_thunk_save has reg a1.
+ *   * stack_thunk_ptr malloc-ed address
+ *   * use stack_thunk_refcnt to determine if present
+ *   * malloc addresses are aligned 8 not 16
+ *   * stack_thunk_top beginning of stack. Defined as stack_thunk_ptr + size -1
+ *   * uhhh, either my dyslexic brain is playing tricks on me or
+ *     `void stack_thunk_dump_stack()` in `StackThunk.cpp` has top and bottom
+ *     (which is higher?) confused.
+ *
+ * Maybe an in/out ref count would be nice for bearssl and cont stacks.
  */
 
 /*____________________________________________________________________________*/
@@ -136,7 +158,7 @@
  *
  */
  // #define HWDT_UART_SPEED (74880)
- // #define HWDT_UART_SPEED (115200)
+ #define HWDT_UART_SPEED (115200)
  // #define HWDT_UART_SPEED (230400)
 
 
@@ -241,7 +263,6 @@
 
 extern "C" {
 #include <user_interface.h>
-#include <uart_register.h>
 extern void call_user_start();
 extern uint32_t rtc_get_reset_reason(void);
 }
@@ -647,15 +668,15 @@ constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_
 
 static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
 
-#ifdef F_CRYSTAL
-    constexpr uint32_t crystal_freq = F_CRYSTAL;
-#else
-    constexpr uint32_t crystal_freq = 26000000;
-#endif
-    constexpr uint32_t rom_uart_speed = 115200;
     uint32_t uart_divisor = USD(uart_no) & UART_CLKDIV_MASK;
-    uint32_t master_freq = crystal_freq * 2;
-
+    /*
+     * No adjustments are needed on most reboots, etc.
+     *
+     * The UART clock is independent of the CPU Speed. (ie. 80MHz, 160MHz)
+     * UART_CLK_FREQ is used in user_init, and ESP8266_CLOCK is used in
+     * uart.h. Both are defined to be 80000000.
+     */
+    uint32_t master_freq = UART_CLK_FREQ;
     if (REASON_DEFAULT_RST       == hwdt_info.reset_reason ||
         REASON_EXT_SYS_RST       == hwdt_info.reset_reason ||
         REASON_DEEP_SLEEP_AWAKE  == hwdt_info.reset_reason) {
@@ -665,17 +686,12 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uin
          * running at 52MHz. Tweak UART speed here, so printing works. To avoid
          * confusion on exit, we later restore the divisor.
          */
+#if (1 < F_CRYSTAL)
+        constexpr uint32_t crystal_freq = F_CRYSTAL;
+#else
+        constexpr uint32_t crystal_freq = 26000000;
+#endif
         master_freq = crystal_freq * 2;
-
-    } else {
-        /*
-         * No adjustments are needed on reboots, etc.
-         *
-         * The UART clock is independent of the CPU Speed. (ie. 80MHz, 160MHz)
-         * UART_CLK_FREQ is used in user_init, and ESP8266_CLOCK is used in
-         * uart.h. Both are defined to be 80000000.
-         */
-        master_freq = UART_CLK_FREQ;
     }
 
     uint32_t new_uart_divisor = master_freq / new_speed;

From 81418df134f304cbe8e6fb10b2468e55ed317801 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 30 Jan 2020 22:01:23 -0800
Subject: [PATCH 15/35] Now runs from flash before SDK is started.
 Cache_Read_Enable working. Free 1K of IRAM and 200 bytes of DRAM.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 147 +++++++++++++-----
 1 file changed, 110 insertions(+), 37 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index d640b782dc..a6ea185923 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -81,6 +81,7 @@
  * sleep, suggest that a variable in the .noinit section could be used instead
  * of the more limited RTC Memory for sketches that don't do deep sleep.
  * However, DRAM should be considered invalid after an upload serial or OTA.
+ * These operations use a lot of DRAM.
  *
  * With this module active, postmortem stack dumps will be a little longer than
  * they need to be. The sys stack now ends at 0x3FFFFC00 instead of 0x3FFFFB0.
@@ -260,6 +261,7 @@
 #include <esp8266_undocumented.h>
 #include <esp8266_peri.h>
 #include <uart.h>
+#include <pgmspace.h>
 
 extern "C" {
 #include <user_interface.h>
@@ -268,6 +270,20 @@ extern uint32_t rtc_get_reset_reason(void);
 }
 
 // #define DEBUG_HWDT_DEBUG
+// #define USE_IRAM
+
+#ifdef USE_IRAM
+#undef USE_IRAM
+#define USE_IRAM 1
+#define IRAM_MAYBE ICACHE_RAM_ATTR
+
+#else
+#undef USE_IRAM
+#define IRAM_MAYBE
+#endif
+
+#define STATIC static __attribute__((noinline))
+// #define STATIC
 
 #ifdef DEBUG_HWDT_DEBUG
 /*
@@ -399,6 +415,33 @@ void enable_debug_hwdt_at_link_time(void) {
 
 extern "C" {
 
+#if USE_IRAM
+#define ETS_PRINTF ets_uart_printf
+
+#else
+/*
+ This function is already in umm_malloc for some debug options.
+ Define here in case they are not enabled.
+*/
+int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) __attribute__((weak));
+int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
+    /*
+      To use ets_strlen() and ets_strcpy() safely with PROGMEM, flash storage,
+      the PROGMEM address must be word (4 bytes) aligned. The destination
+      address for ets_memcpy must also be word-aligned.
+    */
+    char ram_buf[ets_strlen(fmt)] __attribute__ ((aligned(4)));
+    ets_strcpy(ram_buf, fmt);
+    va_list argPtr;
+    va_start(argPtr, fmt);
+    int result = ets_vprintf(ets_uart_putc1, ram_buf, argPtr);
+    va_end(argPtr);
+    return result;
+}
+
+#define ETS_PRINTF(fmt, ...) umm_info_safe_printf_P(PSTR(fmt), ##__VA_ARGS__)
+#endif
+
 enum PRINT_STACK {
     CONT = 1,
     SYS = 2,
@@ -406,20 +449,20 @@ enum PRINT_STACK {
 };
 
 
-static void ICACHE_RAM_ATTR print_stack(const uintptr_t start, const uintptr_t end, const uint32_t chunk) {
-    ets_printf("\n\n>>>stack>>>\n\nctx: ");
+STATIC void IRAM_MAYBE print_stack(const uintptr_t start, const uintptr_t end, const uint32_t chunk) {
+    ETS_PRINTF("\n\n>>>stack>>>\n\nctx: ");
 
     if (chunk & PRINT_STACK::CONT) {
-        ets_printf("cont");
+        ETS_PRINTF("cont");
     } else
     if (chunk & PRINT_STACK::SYS) {
-        ets_printf("sys");
+        ETS_PRINTF("sys");
     } else
     if (chunk & PRINT_STACK::ROM) {
-        ets_printf("ROM");
+        ETS_PRINTF("ROM");
     }
 
-    ets_printf("\nsp: %08x end: %08x offset: %04x\n", start, end, 0);
+    ETS_PRINTF("\nsp: %08x end: %08x offset: %04x\n", start, end, 0);
 
     const size_t this_mutch = end - start;
     if (this_mutch >= 0x10) {
@@ -428,17 +471,17 @@ static void ICACHE_RAM_ATTR print_stack(const uintptr_t start, const uintptr_t e
 
             /* rough indicator: stack frames usually have SP saved as the second word */
             bool looksLikeStackFrame = (value[2] == (start + pos + 0x10));
-            ets_printf("%08x:  %08x %08x %08x %08x %c\n", (uint32_t)&value[0],
+            ETS_PRINTF("%08x:  %08x %08x %08x %08x %c\n", (uint32_t)&value[0],
                        value[0], value[1], value[2], value[3],
                        (looksLikeStackFrame)?'<':' ');
         }
     }
 
-    ets_printf("<<<stack<<<\n");
+    ETS_PRINTF("<<<stack<<<\n");
 }
 
 
-static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, const uint32_t *end, const uint32_t pattern) {
+STATIC const uint32_t * IRAM_MAYBE skip_stackguard(const uint32_t *start, const uint32_t *end, const uint32_t pattern) {
     // Find the end of SYS stack activity
     const uint32_t *uptr = start;
 
@@ -459,7 +502,7 @@ static const uint32_t * ICACHE_RAM_ATTR skip_stackguard(const uint32_t *start, c
     return uptr;
 }
 
-static void ICACHE_RAM_ATTR check_g_pcont_validity(void) {
+STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
     /*
      * DRAM appears to remain valid after most resets. There is more on this in
      * handle_hwdt().
@@ -503,7 +546,7 @@ typedef enum ROM_RST_REASON { /* Comments on the right are from RTOS SDK */
   SDIO_RESET             =  6,    /*                    *//**<6, Reset by SLC module, reset digital core*/
 } ROM_RST_REASON_t;
 
-static uint32_t ICACHE_RAM_ATTR get_reset_reason(bool* power_on, bool* hwdt_reset) {
+STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
     /*
      * Detecting a Hardware WDT (HWDT) reset is a little complicated at boot
      * before the SDK is started.
@@ -666,7 +709,7 @@ constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_
 
 #define UART_CLKDIV_MASK 0x000FFFFFUL
 
-static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
+STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
 
     uint32_t uart_divisor = USD(uart_no) & UART_CLKDIV_MASK;
     /*
@@ -712,11 +755,11 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uin
     }
 
 #if defined(DEBUG_HWDT_DEBUG)
-    ets_printf("\n\nreal_uart_div_modify(0, %u / %u);\n", master_freq, new_speed);
-    ets_printf("F_CRYSTAL = %u\n", crystal_freq);
-    ets_printf("old uart_divisor = %u\n", uart_divisor);
-    ets_printf("new uart_divisor = %u\n", new_uart_divisor);
-    ets_printf("master_freq = %u\n", master_freq);
+    ETS_PRINTF("\n\nreal_uart_div_modify(0, %u / %u);\n", master_freq, new_speed);
+    ETS_PRINTF("F_CRYSTAL = %u\n", crystal_freq);
+    ETS_PRINTF("old uart_divisor = %u\n", uart_divisor);
+    ETS_PRINTF("new uart_divisor = %u\n", new_uart_divisor);
+    ETS_PRINTF("master_freq = %u\n", master_freq);
 #endif
 
     return uart_divisor;
@@ -729,7 +772,7 @@ static uint32_t ICACHE_RAM_ATTR set_uart_speed(const uint32_t uart_no, const uin
  *
  *
  */
-static void ICACHE_RAM_ATTR handle_hwdt(void) {
+STATIC void IRAM_MAYBE handle_hwdt(void) {
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
     check_g_pcont_validity();
@@ -742,16 +785,16 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
     const uint32_t uart_divisor = set_uart_speed(0, HWDT_UART_SPEED);
 #endif
 #if defined(DEBUG_HWDT_DEBUG)
-    ets_printf("Basic boot reason: %s\n", (power_on) ? "Power-on" : "Reboot");
-    ets_printf("RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
-    ets_printf("ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
-    ets_printf("HWDT Reset Reason = %u\n\n", hwdt_info.reset_reason);
+    ETS_PRINTF("Basic boot reason: %s\n", (power_on) ? "Power-on" : "Reboot");
+    ETS_PRINTF("RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
+    ETS_PRINTF("ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
+    ETS_PRINTF("HWDT Reset Reason = %u\n\n", hwdt_info.reset_reason);
 #endif
 #if defined(DEBUG_HWDT_DEBUG_RESET_REASON)
     if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
-        ets_printf("Reset reason confirmation failed!\n");
-        ets_printf("  RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
-        ets_printf("  ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
+        ETS_PRINTF("Reset reason confirmation failed!\n");
+        ETS_PRINTF("  RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
+        ETS_PRINTF("  ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
     }
 #endif
     /*
@@ -797,7 +840,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 
         /* Print context SYS */
         if (hwdt_reset) {
-            ets_printf("\n\nHardware WDT reset\n");
+            ETS_PRINTF("\n\nHardware WDT reset\n");
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
@@ -805,7 +848,7 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
             print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
 #endif
             if (hwdt_info.cont_integrity) {
-                ets_printf("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n");
+                ETS_PRINTF("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n");
             }
         }
     }
@@ -837,9 +880,9 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 #endif
 
 #if defined(HWDT_PRINT_GREETING)
-    ets_printf("\n\nHardware WDT Stack Dump - enabled\n\n");
+    ETS_PRINTF("\n\nHardware WDT Stack Dump - enabled\n\n");
 #else
-    ets_printf("\n\n");
+    ETS_PRINTF("\n\n");
 #endif
 
 #ifdef HWDT_UART_SPEED
@@ -851,6 +894,25 @@ static void ICACHE_RAM_ATTR handle_hwdt(void) {
 #endif
 }
 
+/*
+ * Using Cache_Read_Enable/Cache_Read_Disable to reduce IRAM usage. Moved
+ * strings and most functions to flash. At this phase of the startup, "C++" has
+ * not initialized. So, we needed a local "C" function to handle printing from
+ * flash. For this, I grabbed a copy of umm_info_safe_printf_P.
+ *
+ * This reduced IRAM usage by ~1K and DRAM ~200 bytes.
+ *
+ * Inspiration for using Cache_Read_Enable came from reviewing rboot, zboot, and
+ * https://richard.burtons.org/2015/06/12/esp8266-cache_read_enable/.
+ * Additional insight can be gleemed from reviewing the ESP8266_RTOS_SDK.
+ * (eg. ../components/bootloader_support/src/bootloader_utility.c)
+ */
+#define ICACHE_SIZE_32 1
+#define ICACHE_SIZE_16 0
+
+extern "C" void Cache_Read_Disable(void);
+extern "C" void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
+
 void ICACHE_RAM_ATTR app_entry_start(void) {
 
     handle_hwdt();
@@ -873,10 +935,13 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
      *  Call the entry point of the SDK code.
      */
     asm volatile("" ::: "memory");
-    asm volatile("mov.n a1, %0\n"
-                 "mov.n a3, %1\n"
-                 "mov.n a0, %2\n"     /* Should never return; however, set return to Boot ROM Breakpoint */
-                 "jx a3\n" : : "r" (sys_stack_first), "r" (call_user_start), "r" (0x4000044c) );
+    asm volatile ("mov.n a1, %0\n" :: "r" (sys_stack_first));
+
+#ifndef USE_IRAM
+    asm volatile ("call0 Cache_Read_Disable\n" ::);
+#endif
+    asm volatile("movi a0, 0x4000044c\n"     /* Should never return; however, set return to Boot ROM Breakpoint */
+                 "j call_user_start\n" ::);
 
     __builtin_unreachable();
 }
@@ -896,10 +961,18 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
      * tool from the list of possible concerns for stack overwrite.
      *
      */
-    asm volatile ("mov.n a1, %0\n"
-                  "mov.n a3, %1\n"
-                  "mov.n a0, %2\n"
-                  "jx a3\n" : : "r" (0x3fffeb30), "r" (app_entry_start), "r" (0x4000044c) );
+    asm volatile ("movi a1, 0x3fffeb30\n" ::);
+
+#ifndef USE_IRAM
+    // Enable cache over flash
+    asm volatile ("movi.n a2, 0\n"
+                  "mov.n  a3, a2\n"
+                  "movi.n a4, 1\n"    // ICACHE_SIZE_32
+                  "call0 Cache_Read_Enable\n" ::);
+#endif
+
+    asm volatile ("j app_entry_start" ::);
+
     /*
      * Keep this function with just asm seems to help avoid a stack frame being
      * created for this function and things getting really confused.

From 1f0e6f4a996ed4fb1e22dbb1a894be7af1158a97 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 13 Feb 2020 19:54:22 -0800
Subject: [PATCH 16/35] Changed ICACHE size from 32K to 16K to avoid conflict
 with SDK or core selecting smaller 16K ICACHE.

The Issue: Cache_Read_Enable does not clear the bit field when mapping IRAM to
ICACHE on register 0x3FF00024. Thus, no problem upgrading from 16K to 32K;
however, you cannot downgrade from 32K to 16K. These bits are cleared at boot.

Improved uart data rate change handling.

Update comments.
---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 52 +++++++++++++------
 1 file changed, 35 insertions(+), 17 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index a6ea185923..2b61c1c27f 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -71,8 +71,9 @@
  *
  * Possible Issues/Thoughts/Improvements:
  *
- * I wonder if the eboot could be changed to use at stack pointer beginning at
- * 0x3fffeb30. This would allow for a value near 640 for ROM_STACK_SIZE.
+ * On reboot after an OTA download, eboot has a large demand for stack and DRAM
+ * space. For routine loads from flash, its stack and DRAM usage is light and
+ * should leave us a good stack to dump for a HWDT.
  *
  * If a problem should arise with some data elements being corrupted during
  * reboot, would it be possible to move their DRAM location higher in memory?
@@ -100,9 +101,6 @@
  *   * use stack_thunk_refcnt to determine if present
  *   * malloc addresses are aligned 8 not 16
  *   * stack_thunk_top beginning of stack. Defined as stack_thunk_ptr + size -1
- *   * uhhh, either my dyslexic brain is playing tricks on me or
- *     `void stack_thunk_dump_stack()` in `StackThunk.cpp` has top and bottom
- *     (which is higher?) confused.
  *
  * Maybe an in/out ref count would be nice for bearssl and cont stacks.
  */
@@ -158,8 +156,9 @@
  * and data rates" in the comments at the top.
  *
  */
+ // #define HWDT_UART_SPEED (19200)
  // #define HWDT_UART_SPEED (74880)
- #define HWDT_UART_SPEED (115200)
+ // #define HWDT_UART_SPEED (115200)
  // #define HWDT_UART_SPEED (230400)
 
 
@@ -442,6 +441,8 @@ int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
 #define ETS_PRINTF(fmt, ...) umm_info_safe_printf_P(PSTR(fmt), ##__VA_ARGS__)
 #endif
 
+#define ETS_FLUSH(uart_no) while((USS(uart_no) >> USTXC) & 0xff) {}
+
 enum PRINT_STACK {
     CONT = 1,
     SYS = 2,
@@ -709,6 +710,31 @@ constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_
 
 #define UART_CLKDIV_MASK 0x000FFFFFUL
 
+void adjust_uart_speed(uint32_t uart_divisor) {
+    /*
+     * Take care to let serial data in the FIFO finish before changing UART
+     * speed. Then after changing speeds, let the uart clock generator
+     * stablilize, and let the remote receiver come to an idle state before
+     * continuing.
+     *
+     * Load a Rubout character for the final charcter shifting out to stop
+     * the last charcter from getting crunched during the speed change.
+     *
+     * The thinking is if the speed changes while shifting out, as long as the
+     * start bit gets out before the change. The change will not be noticed
+     * since all ones will look like the serial line idle state. And for text
+     * displaying, received rubout characters should be discarded. At least that
+     * was true 40 years ago.
+     *
+     * These adjustments appear to resolve the lost data problem that occurs
+     * when printing after a flash upload using esptool.
+     */
+    ets_putc('\xFF');
+    ETS_FLUSH(0);
+    real_uart_div_modify(0, uart_divisor);
+    ets_delay_us(150);
+}
+
 STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t new_speed) {
 
     uint32_t uart_divisor = USD(uart_no) & UART_CLKDIV_MASK;
@@ -745,13 +771,7 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
         uart_divisor = 0;
 
     } else {
-        /*
-         * These delays appear to resolve the lost data problem that occurs
-         * when printing after a flash upload using esptool.
-         */
-        ets_delay_us(18000);
-        real_uart_div_modify(0, new_uart_divisor);
-        ets_delay_us(150);
+        adjust_uart_speed(new_uart_divisor);
     }
 
 #if defined(DEBUG_HWDT_DEBUG)
@@ -887,9 +907,7 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
 
 #ifdef HWDT_UART_SPEED
     if (uart_divisor) {
-        ets_delay_us(18000);
-        real_uart_div_modify(0, uart_divisor); // Put it back the way we found it!
-        ets_delay_us(150);
+        adjust_uart_speed(uart_divisor);
     }
 #endif
 }
@@ -967,7 +985,7 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
     // Enable cache over flash
     asm volatile ("movi.n a2, 0\n"
                   "mov.n  a3, a2\n"
-                  "movi.n a4, 1\n"    // ICACHE_SIZE_32
+                  "movi.n a4, 0\n"    // ICACHE_SIZE_16
                   "call0 Cache_Read_Enable\n" ::);
 #endif
 

From 7288abf1b90d2a081fe1b1e7ead14ae6179c5d0e Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 14 Feb 2020 19:52:59 -0800
Subject: [PATCH 17/35] Added support to print ThunkStack. Adjustments to
 inline asm. Added "memory" when callx0 is used.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 73 +++++++++++++++----
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  1 +
 2 files changed, 58 insertions(+), 16 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 2b61c1c27f..f87792bce9 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -71,9 +71,9 @@
  *
  * Possible Issues/Thoughts/Improvements:
  *
- * On reboot after an OTA download, eboot has a large demand for stack and DRAM
- * space. For routine loads from flash, its stack and DRAM usage is light and
- * should leave us a good stack to dump for a HWDT.
+ * On reboot after an OTA download, eboot requires a lot of stack and DRAM
+ * space. For routine loads from flash, the stack and DRAM usage are small,
+ * leaving us valid data to print a stack dump.
  *
  * If a problem should arise with some data elements being corrupted during
  * reboot, would it be possible to move their DRAM location higher in memory?
@@ -179,6 +179,11 @@
  * uart_div_modify(). Leave these comments until I have more experience with
  * this change.
  *
+ * EDIT3: The delay before the uart_div_modify() has been replaced with a wait
+ * till FIFO empty loop. I now believe the lost greeting message after an
+ * esptool firmware update, has to do with the transition period between the
+ * tool performing hardware reset and exiting, then the serial monitor
+ * re-ngaging. This is not an issue that needs to be addressed here.
  */
  // #define HWDT_PRINT_GREETING
 
@@ -266,6 +271,15 @@ extern "C" {
 #include <user_interface.h>
 extern void call_user_start();
 extern uint32_t rtc_get_reset_reason(void);
+
+uint32_t __zero_return() {
+  return 0;
+}
+// extern void stack_thunk_dump_stack();
+extern uint32_t stack_thunk_get_refcnt() __attribute__((weak, alias("__zero_return")));
+extern uint32_t stack_thunk_get_stack_top() __attribute__((weak, alias("__zero_return")));
+extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_return")));
+
 }
 
 // #define DEBUG_HWDT_DEBUG
@@ -324,6 +338,7 @@ typedef struct HWDT_INFO {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
+    uint32_t bearssl;
     uint32_t rom_api_reason;
     uint32_t rtc_sys_reason;
     uint32_t reset_reason;
@@ -446,7 +461,8 @@ int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
 enum PRINT_STACK {
     CONT = 1,
     SYS = 2,
-    ROM = 4
+    ROM = 4,
+    BEARSSL = 8
 };
 
 
@@ -461,6 +477,9 @@ STATIC void IRAM_MAYBE print_stack(const uintptr_t start, const uintptr_t end, c
     } else
     if (chunk & PRINT_STACK::ROM) {
         ETS_PRINTF("ROM");
+    } else
+    if (chunk & PRINT_STACK::BEARSSL) {
+        ETS_PRINTF("bearssl");
     }
 
     ETS_PRINTF("\nsp: %08x end: %08x offset: %04x\n", start, end, 0);
@@ -858,9 +877,25 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
         const uint32_t *ctx_sys_ptr = skip_stackguard(sys_stack, rom_stack, CONT_STACKGUARD);
         hwdt_info.sys = (uintptr_t)rom_stack - (uintptr_t)ctx_sys_ptr;
 
-        /* Print context SYS */
+#ifndef USE_IRAM
+        const uint32_t *bearssl_stack_top = NULL;
+        const uint32_t *ctx_bearssl_ptr = NULL;
+        if (stack_thunk_get_refcnt()) {
+            bearssl_stack_top = (const uint32_t *)stack_thunk_get_stack_top();
+            ctx_bearssl_ptr = skip_stackguard((const uint32_t *)stack_thunk_get_stack_bot(), bearssl_stack_top, 0xdeadbeef);
+            hwdt_info.bearssl = (uintptr_t)bearssl_stack_top - (uintptr_t)ctx_bearssl_ptr;
+        }
+#endif
+
         if (hwdt_reset) {
             ETS_PRINTF("\n\nHardware WDT reset\n");
+#ifndef USE_IRAM
+            if (bearssl_stack_top) {
+                /* Print context bearssl */
+                print_stack((uintptr_t)ctx_bearssl_ptr, (uintptr_t)bearssl_stack_top, PRINT_STACK::BEARSSL);
+            }
+#endif
+            /* Print context SYS */
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
@@ -952,14 +987,18 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
      *  Use new calculated SYS stack from top.
      *  Call the entry point of the SDK code.
      */
-    asm volatile("" ::: "memory");
-    asm volatile ("mov.n a1, %0\n" :: "r" (sys_stack_first));
+    asm volatile ("" ::: "memory");
 
 #ifndef USE_IRAM
-    asm volatile ("call0 Cache_Read_Disable\n" ::);
+    asm volatile ("callx0 %0\n\t" ::
+                  "r" (Cache_Read_Disable) : "memory");
 #endif
-    asm volatile("movi a0, 0x4000044c\n"     /* Should never return; however, set return to Boot ROM Breakpoint */
-                 "j call_user_start\n" ::);
+
+    asm volatile ("mov.n a1, %0\n\t"
+                  "movi a0, 0x4000044c\n\t"     /* Should never return; however, set return to Boot ROM Breakpoint */
+                  "jx %1\n\t" ::
+                  "r" (sys_stack_first), "r" (call_user_start):
+                  "a0", "a1");
 
     __builtin_unreachable();
 }
@@ -979,14 +1018,16 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
      * tool from the list of possible concerns for stack overwrite.
      *
      */
-    asm volatile ("movi a1, 0x3fffeb30\n" ::);
+    asm volatile ("movi a1, 0x3fffeb30\n\t" ::: "a1");
 
 #ifndef USE_IRAM
     // Enable cache over flash
-    asm volatile ("movi.n a2, 0\n"
-                  "mov.n  a3, a2\n"
-                  "movi.n a4, 0\n"    // ICACHE_SIZE_16
-                  "call0 Cache_Read_Enable\n" ::);
+    asm volatile ("movi.n a2, 0\n\t"
+                  "movi.n a3, 0\n\t"
+                  "movi.n a4, 0\n\t"    // 0 == ICACHE_SIZE_16
+                  "callx0 %0\n\t" ::
+                  "r" (Cache_Read_Enable):
+                  "a2", "a3", "a4", "memory");
 #endif
 
     asm volatile ("j app_entry_start" ::);
@@ -1017,6 +1058,6 @@ void preinit(void) {
 };
 
 #else
-void enable_debug_hwdt_at_link_time (void){
+void enable_debug_hwdt_at_link_time(void) {
 }
 #endif // end of #ifdef DEBUG_HWDT
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index bf5cdd380e..025f7735a7 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -5,6 +5,7 @@ typedef struct HWDT_INFO {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
+    uint32_t bearssl;
     uint32_t rom_api_reason;
     uint32_t rtc_sys_reason;
     uint32_t reset_reason;

From eec0192fb0cf2f0145abebbb7452211bfa85e2cc Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sat, 25 Apr 2020 14:10:56 -0700
Subject: [PATCH 18/35] comment cleanup. added missing additional #if defined()
 Made structure name unique. Changed HWDT_INFO to HWDR_INFO_S.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 21 +++----------------
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  2 +-
 2 files changed, 4 insertions(+), 19 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index f87792bce9..693ca6674a 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -87,21 +87,6 @@
  * With this module active, postmortem stack dumps will be a little longer than
  * they need to be. The sys stack now ends at 0x3FFFFC00 instead of 0x3FFFFB0.
  *
- * Uh, there is a third stack ?? ctx: bearssl - I have not coded for this.
- * I'll leave this for later, as a possible future enhancement.
- * There are three possible stacks to hang in!?
- * Notes for later:
- *   * Stack is allocted with malloc - must be recovered before SDK init
- *     (umm_init() called on 1ST heap free call early in SDK init)
- *   * Function calls for addresses are pageable. Need to access pointers
- *     directly.
- *   * stackpaint is 0xdeadbeef
- *   * stack_thunk_save has reg a1.
- *   * stack_thunk_ptr malloc-ed address
- *   * use stack_thunk_refcnt to determine if present
- *   * malloc addresses are aligned 8 not 16
- *   * stack_thunk_top beginning of stack. Defined as stack_thunk_ptr + size -1
- *
  * Maybe an in/out ref count would be nice for bearssl and cont stacks.
  */
 
@@ -183,7 +168,7 @@
  * till FIFO empty loop. I now believe the lost greeting message after an
  * esptool firmware update, has to do with the transition period between the
  * tool performing hardware reset and exiting, then the serial monitor
- * re-ngaging. This is not an issue that needs to be addressed here.
+ * re-engaging. This is not an issue that needs to be addressed here.
  */
  // #define HWDT_PRINT_GREETING
 
@@ -334,7 +319,7 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
 #if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
-typedef struct HWDT_INFO {
+typedef struct HWDT_INFO_S {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
@@ -1041,7 +1026,7 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
 }
 
 
-#if defined(HWDT_INFO)
+#if defined(HWDT_INFO) || defined(ROM_STACK_DUMP)
 void preinit(void) {
     /*
      * Fill the rom_stack while it is not actively being used.
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index 025f7735a7..e2dd151bd6 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -1,7 +1,7 @@
 #if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
-typedef struct HWDT_INFO {
+typedef struct HWDT_INFO_S {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;

From 1264394175631453e1269cf02dc4f70195335fbb Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sun, 26 Apr 2020 11:13:14 -0700
Subject: [PATCH 19/35] Update style used for structure and typedef to match
 that used in core when snake case is used. Moved a constexpr block up a scope
 so that some #ifdef debug code compiles again.

---
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 40 +++++++++++--------
 .../examples/HwdtStackDump/hwdt_app_entry.h   |  6 +--
 2 files changed, 27 insertions(+), 19 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 693ca6674a..8013da0803 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -285,7 +285,7 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
 
 #ifdef DEBUG_HWDT_DEBUG
 /*
- * We have two copies of HWDT_INFO_t. Verify internal and external structures
+ * We have two copies of hwdt_info_t. Verify internal and external structures
  * match.
  *
  * This duplication is done so that in most cases, a simple/quick add one file
@@ -302,13 +302,14 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
  * Verify that the internal and external structure definitions match.
  */
 #ifdef HWDT_STACK_DUMP_H
-#define HWDT_INFO_t LOCAL_HWDT_INFO_t
-#define hwdt_info LOCAL_hwdt_info
+#define hwdt_info_t LOCAL_HWDT_INFO_T
+#define hwdt_info_ LOCAL_HWDT_INFO_
+#define hwdt_info LOCAL_HWDT_INFO
 #define HWDT_VERIFY_HWDT_INFO
 #endif
 
 /*
- * If you are using the HWDT_INFO_t structure, and are missing the include file.
+ * If you are using the hwdt_info_t structure, and are missing the include file.
  * Copy-paste the include block below into its respective filename.
  */
 
@@ -319,7 +320,7 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
 #if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
-typedef struct HWDT_INFO_S {
+typedef struct hwdt_info_ {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
@@ -329,12 +330,12 @@ typedef struct HWDT_INFO_S {
     uint32_t reset_reason;
     uint32_t cont_integrity;
     bool g_pcont_valid;
-} HWDT_INFO_t;
+} hwdt_info_t;
 
 void enable_debug_hwdt_at_link_time(void);
 
 extern uint32_t *g_rom_stack;
-extern HWDT_INFO_t hwdt_info;
+extern hwdt_info_t hwdt_info;
 
 #endif
 /*____________________________________________________________________________*/
@@ -344,10 +345,11 @@ extern HWDT_INFO_t hwdt_info;
 
 
 #ifdef HWDT_VERIFY_HWDT_INFO
-#undef HWDT_INFO_t
+#undef hwdt_info_t
+#undef hwdt_info_
 #undef hwdt_info
 #undef HWDT_VERIFY_HWDT_INFO
-static_assert(sizeof(HWDT_INFO_t) == sizeof(LOCAL_HWDT_INFO_t), "Local and include verison of HWDT_INFO_t do not match.");
+static_assert(sizeof(hwdt_info_t) == sizeof(LOCAL_HWDT_INFO_T), "Local and include verison of hwdt_info_t do not match.");
 #endif
 
 
@@ -394,7 +396,7 @@ constexpr uint32_t *sys_stack_first = (uint32_t *)((uintptr_t)cont_stack);
 
 uint32_t *g_rom_stack  __attribute__((section(".noinit")));
 size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
-HWDT_INFO_t hwdt_info __attribute__((section(".noinit")));
+hwdt_info_t hwdt_info __attribute__((section(".noinit")));
 
 void enable_debug_hwdt_at_link_time(void) {
     /*
@@ -730,6 +732,12 @@ void adjust_uart_speed(uint32_t uart_divisor) {
      * displaying, received rubout characters should be discarded. At least that
      * was true 40 years ago.
      *
+     * EDIT: In today's world, it appears the rubout character is no longer
+     * discarded. However, I think we are better off using it since it allows
+     * for creating a deterministic last character that will not clear the
+     * screen or something worse. And it is simpler than the other option of
+     * calculating and waiting for a character time to pass.
+     *
      * These adjustments appear to resolve the lost data problem that occurs
      * when printing after a flash upload using esptool.
      */
@@ -749,6 +757,11 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
      * UART_CLK_FREQ is used in user_init, and ESP8266_CLOCK is used in
      * uart.h. Both are defined to be 80000000.
      */
+#if (1 < F_CRYSTAL)
+    constexpr uint32_t crystal_freq = F_CRYSTAL;
+#else
+    constexpr uint32_t crystal_freq = 26000000;
+#endif
     uint32_t master_freq = UART_CLK_FREQ;
     if (REASON_DEFAULT_RST       == hwdt_info.reset_reason ||
         REASON_EXT_SYS_RST       == hwdt_info.reset_reason ||
@@ -759,11 +772,6 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
          * running at 52MHz. Tweak UART speed here, so printing works. To avoid
          * confusion on exit, we later restore the divisor.
          */
-#if (1 < F_CRYSTAL)
-        constexpr uint32_t crystal_freq = F_CRYSTAL;
-#else
-        constexpr uint32_t crystal_freq = 26000000;
-#endif
         master_freq = crystal_freq * 2;
     }
 
@@ -772,7 +780,7 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
     if (UART_CLKDIV_MASK < new_uart_divisor ||
         2 > new_uart_divisor ||
         new_uart_divisor == uart_divisor) {
-        uart_divisor = 0;
+        uart_divisor = 0;   // used to indicate no change
 
     } else {
         adjust_uart_speed(new_uart_divisor);
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
index e2dd151bd6..8823d8361f 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
@@ -1,7 +1,7 @@
 #if !defined(HWDT_STACK_DUMP_H) || defined(HWDT_VERIFY_HWDT_INFO)
 #define HWDT_STACK_DUMP_H
 
-typedef struct HWDT_INFO_S {
+typedef struct hwdt_info_ {
     uint32_t rom;
     uint32_t sys;
     uint32_t cont;
@@ -11,11 +11,11 @@ typedef struct HWDT_INFO_S {
     uint32_t reset_reason;
     uint32_t cont_integrity;
     bool g_pcont_valid;
-} HWDT_INFO_t;
+} hwdt_info_t;
 
 void enable_debug_hwdt_at_link_time(void);
 
 extern uint32_t *g_rom_stack;
-extern HWDT_INFO_t hwdt_info;
+extern hwdt_info_t hwdt_info;
 
 #endif

From 1da67e340ef7e5a76ba6a63aec54118e6a921df3 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 5 May 2020 11:05:28 -0700
Subject: [PATCH 20/35] Updated comments

---
 .../esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp      | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 8013da0803..6822034278 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -598,7 +598,7 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
     *power_on = false;
     /*
      * This logic takes the reason left in memory by the SDK as an initial
-     * estimate and expands on it.
+     * estimate and improves on it.
      */
     hwdt_info.reset_reason = rtc_sys_reason;
     if (REASON_DEFAULT_RST == rtc_sys_reason ||
@@ -608,7 +608,8 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
          *    quickly. The 1 value (REASON_WDT_RST), previous if, shows up if
          *    you wait a while before the EXT_RST.
          * 2) The 0 value also shows up if a HWDT reset occurs too quickly after
-         *    the system starts. Note even the SDK gets this one right.
+         *    the system starts. Note the current SDK will get this one wrong
+         *    and indicate power-on reset.
          */
         if (OWDT_RESET == rom_api_reason) {
              *hwdt_reset = true;
@@ -634,7 +635,7 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
         }
     } else {
         /*
-         * REASON_EXT_SYS_RST is not expected at reboot, let it fall through to
+         * REASON_EXT_SYS_RST is not expected at reboot, let it fall through
          * for confirmation in debug option.
          */
         if (REASON_EXT_SYS_RST == rtc_sys_reason) {

From 7d75454fd1d42b80c1ed6c1012d5da7c41af0976 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 10 Jul 2020 18:42:50 -0700
Subject: [PATCH 21/35] Corrected new errors from upgrade to GCC 10.1 toolchain
 related to constexpr and casting integers to pointers. Cleared warning for
 asm.

---
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  2 +-
 .../examples/HwdtStackDump/hwdt_app_entry.cpp | 65 +++++++++----------
 2 files changed, 31 insertions(+), 36 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 65e7ab9c88..92c8a8ea09 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -21,7 +21,7 @@
 
 #include "AddOn.h"
 /*
-  If you need to run your sketch w/o this tool or you want to  see the
+  If you need to run your sketch w/o this tool or you want to see the
   difference with and without this tool. Comment out the #include below. And
   comment out the "#define DEBUG_HWDT" line in hwdt_app_entry.cpp.
 */
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
index 6822034278..ea94042d03 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
@@ -125,7 +125,7 @@
  * extra 4K in the heap.
  *
  */
-#define DEBUG_HWDT_NO4KEXTRA
+ // #define DEBUG_HWDT_NO4KEXTRA
 
 
 /*
@@ -360,14 +360,14 @@ static_assert(sizeof(hwdt_info_t) == sizeof(LOCAL_HWDT_INFO_T), "Local and inclu
 #ifndef CONT_STACKGUARD
 #define CONT_STACKGUARD 0xfeefeffe
 #endif
-constexpr volatile uint32_t *RTC_SYS = (volatile uint32_t*)0x60001100;
+#define RTC_SYS         ((volatile uint32_t*)0x60001100)
 
 
-constexpr uint32_t *dram_start      = (uint32_t *)0x3FFE8000;
-constexpr uint32_t *dram_end        = (uint32_t *)0x40000000;
+#define dram_start      ((uint32_t *)0x3FFE8000)
+#define dram_end        ((uint32_t *)0x40000000)
 
-constexpr uint32_t *rom_stack_first = (uint32_t *)0x40000000;
-constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
+#define rom_stack_first ((uint32_t *)0x40000000)
+#define sys_stack       ((uint32_t *)0x3fffeb30)
 /*
  * The space between 0x3fffe000 up to 0x3fffeb30 is a ROM BSS area that is later
  * claimed by the SDK for stack space. This is a problem area for this tool,
@@ -375,23 +375,23 @@ constexpr uint32_t *sys_stack       = (uint32_t *)0x3fffeb30;
  * the "sys" stack residing there is lost. On the other hand, it becomes a prime
  * candidate for DRAM address space to handle the needs of this tool.
  */
-constexpr uint32_t *sys_stack_e000  = (uint32_t *)0x3fffe000;
+#define sys_stack_e000     ((uint32_t *)0x3fffe000)
 
 // Map out who will live where.
-constexpr size_t rom_stack_A16_sz = MK_ALIGN16_SZ(ROM_STACK_SIZE);
-constexpr size_t cont_stack_A16_sz = MK_ALIGN16_SZ(sizeof(cont_t));
-constexpr uint32_t *rom_stack = (uint32_t *)((uintptr_t)rom_stack_first - rom_stack_A16_sz);
+#define rom_stack_A16_sz   (MK_ALIGN16_SZ(ROM_STACK_SIZE))
+#define cont_stack_A16_sz  (MK_ALIGN16_SZ(sizeof(cont_t)))
+#define rom_stack ((uint32_t *) ((uintptr_t)rom_stack_first - rom_stack_A16_sz))
 
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
 /* This is the default NONOS-SDK user's heap location for NO4KEXTRA */
 static cont_t g_cont __attribute__ ((aligned (16)));
-constexpr uint32_t *sys_stack_first = (uint32_t *)((uintptr_t)rom_stack);
+#define sys_stack_first ((uint32_t *)((uintptr_t)rom_stack))
 
 #else
-constexpr uint32_t *cont_stack_first = (uint32_t *)((uintptr_t)rom_stack); // only for computation
-constexpr cont_t *cont_stack = (cont_t *)((uintptr_t)cont_stack_first - cont_stack_A16_sz);
-constexpr uint32_t *sys_stack_first = (uint32_t *)((uintptr_t)cont_stack);
+#define cont_stack_first ((uint32_t *)((uintptr_t)rom_stack)) // only for computation
+#define cont_stack ((cont_t *)((uintptr_t)cont_stack_first - cont_stack_A16_sz))
+#define sys_stack_first ((uint32_t *)((uintptr_t)cont_stack))
 #endif
 
 uint32_t *g_rom_stack  __attribute__((section(".noinit")));
@@ -805,6 +805,7 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
  *
  *
  */
+STATIC void IRAM_MAYBE handle_hwdt(void)  __attribute__((used));
 STATIC void IRAM_MAYBE handle_hwdt(void) {
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
@@ -960,9 +961,21 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
 extern "C" void Cache_Read_Disable(void);
 extern "C" void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
 
+#ifndef USE_IRAM
+void ICACHE_RAM_ATTR handle_hwdt_icache() {
+  Cache_Read_Enable(0, 0, ICACHE_SIZE_16);
+  handle_hwdt();
+  Cache_Read_Disable();
+}
+#endif
+
 void ICACHE_RAM_ATTR app_entry_start(void) {
 
+#ifdef USE_IRAM
     handle_hwdt();
+#else
+    handle_hwdt_icache();
+#endif
 
 #ifdef DEBUG_HWDT_NO4KEXTRA
     /*
@@ -981,18 +994,11 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
      *  Use new calculated SYS stack from top.
      *  Call the entry point of the SDK code.
      */
-    asm volatile ("" ::: "memory");
-
-#ifndef USE_IRAM
-    asm volatile ("callx0 %0\n\t" ::
-                  "r" (Cache_Read_Disable) : "memory");
-#endif
-
     asm volatile ("mov.n a1, %0\n\t"
                   "movi a0, 0x4000044c\n\t"     /* Should never return; however, set return to Boot ROM Breakpoint */
                   "jx %1\n\t" ::
                   "r" (sys_stack_first), "r" (call_user_start):
-                  "a0", "a1");
+                  "a0", "memory");
 
     __builtin_unreachable();
 }
@@ -1012,19 +1018,9 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
      * tool from the list of possible concerns for stack overwrite.
      *
      */
-    asm volatile ("movi a1, 0x3fffeb30\n\t" ::: "a1");
 
-#ifndef USE_IRAM
-    // Enable cache over flash
-    asm volatile ("movi.n a2, 0\n\t"
-                  "movi.n a3, 0\n\t"
-                  "movi.n a4, 0\n\t"    // 0 == ICACHE_SIZE_16
-                  "callx0 %0\n\t" ::
-                  "r" (Cache_Read_Enable):
-                  "a2", "a3", "a4", "memory");
-#endif
-
-    asm volatile ("j app_entry_start" ::);
+    asm volatile ("movi a1, 0x3fffeb30\n\t"
+                  "j app_entry_start" ::: "memory");
 
     /*
      * Keep this function with just asm seems to help avoid a stack frame being
@@ -1034,7 +1030,6 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
     __builtin_unreachable();
 }
 
-
 #if defined(HWDT_INFO) || defined(ROM_STACK_DUMP)
 void preinit(void) {
     /*

From dcce57dfaa5ed005147258e14c0b5784849ab08b Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sun, 12 Jul 2020 19:00:56 -0700
Subject: [PATCH 22/35] Work around divide by 0 HWDT event under toolchain
 10.1.

---
 libraries/esp8266/examples/HwdtStackDump/AddOn.ino | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
index 52ea07f9f0..7488d5aab4 100644
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
@@ -36,7 +36,7 @@ void printHelpAddOn(Print& out) {
   out.println(F("  d    - Print some HWDT Debug info."));
 }
 
-
+int divideA_B(int a, int b);
 
 int hotKeyHandlerAddOn(Print& out, int hotKey) {
   switch (hotKey) {
@@ -50,6 +50,7 @@ int hotKeyHandlerAddOn(Print& out, int hotKey) {
     case '0':
       out.println(F("Crashing by dividing by zero."));
       out.printf_P(PSTR("This should not print %d\n"), divideA_B(1, 0));
+      // out.printf("This should not print %d\r\n", divideA_B(1, 0));
       break;
     case 'c':
       out.println(F("Now calling: void crashMeIfYouCan(void)__attribute__((weak));"));
@@ -62,7 +63,9 @@ int hotKeyHandlerAddOn(Print& out, int hotKey) {
   return 1;
 }
 
-int divideA_B(int a, int b) {
+// Will HWDT if not set to NOINLINE
+// int divideA_B(int a, int b) {
+int __attribute__((noinline)) divideA_B(int a, int b) {
   return (a / b);
 }
 

From 8c2d214834607acf6c79e086bd17ff839991cb07 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Fri, 17 Jul 2020 16:07:44 -0700
Subject: [PATCH 23/35] Changes to move feature into core.

Making ready for selection via tools menu, updated defines to DEBUG_ESP_,,, format.
Added HWDT and HWDT_NO4KEXTRA options to boards.txt.py. These options are selectable
from Arduino IDE 'Tools->Debug Level'
Converted macro names that use to be constexprs to uppercase.
Update comments. Added comments to maintainers anotated by '//C'
Revised example.
---
 boards.txt                                    | 408 ++++++++++++++++++
 cores/esp8266/core_esp8266_main.cpp           |   5 +
 .../esp8266}/hwdt_app_entry.cpp               | 201 +++++----
 .../esp8266}/hwdt_app_entry.h                 |   1 +
 .../esp8266/examples/HwdtStackDump/AddOn.h    |   3 -
 .../esp8266/examples/HwdtStackDump/AddOn.ino  |  86 ----
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  33 +-
 .../examples/HwdtStackDump/ProcessKey.ino     |  62 ++-
 tools/boards.txt.py                           |  18 +-
 9 files changed, 588 insertions(+), 229 deletions(-)
 rename {libraries/esp8266/examples/HwdtStackDump => cores/esp8266}/hwdt_app_entry.cpp (87%)
 rename {libraries/esp8266/examples/HwdtStackDump => cores/esp8266}/hwdt_app_entry.h (92%)
 delete mode 100644 libraries/esp8266/examples/HwdtStackDump/AddOn.h
 delete mode 100644 libraries/esp8266/examples/HwdtStackDump/AddOn.ino

diff --git a/boards.txt b/boards.txt
index ba4c7e6e04..f5a67d0c9f 100644
--- a/boards.txt
+++ b/boards.txt
@@ -465,10 +465,22 @@ generic.menu.lvl.OOM=OOM
 generic.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 generic.menu.lvl.MDNS=MDNS
 generic.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+generic.menu.lvl.HWDT=HWDT
+generic.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+generic.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+generic.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 generic.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 generic.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 generic.menu.wipe.none=Only Sketch
@@ -794,10 +806,22 @@ esp8285.menu.lvl.OOM=OOM
 esp8285.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 esp8285.menu.lvl.MDNS=MDNS
 esp8285.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+esp8285.menu.lvl.HWDT=HWDT
+esp8285.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+esp8285.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+esp8285.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp8285.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 esp8285.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 esp8285.menu.wipe.none=Only Sketch
@@ -992,10 +1016,22 @@ espduino.menu.lvl.OOM=OOM
 espduino.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espduino.menu.lvl.MDNS=MDNS
 espduino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espduino.menu.lvl.HWDT=HWDT
+espduino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espduino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espduino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espduino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espduino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espduino.menu.wipe.none=Only Sketch
@@ -1182,10 +1218,22 @@ huzzah.menu.lvl.OOM=OOM
 huzzah.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 huzzah.menu.lvl.MDNS=MDNS
 huzzah.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+huzzah.menu.lvl.HWDT=HWDT
+huzzah.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+huzzah.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+huzzah.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 huzzah.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 huzzah.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 huzzah.menu.wipe.none=Only Sketch
@@ -1372,10 +1420,22 @@ inventone.menu.lvl.OOM=OOM
 inventone.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 inventone.menu.lvl.MDNS=MDNS
 inventone.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+inventone.menu.lvl.HWDT=HWDT
+inventone.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+inventone.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+inventone.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 inventone.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 inventone.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 inventone.menu.wipe.none=Only Sketch
@@ -1565,10 +1625,22 @@ cw01.menu.lvl.OOM=OOM
 cw01.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 cw01.menu.lvl.MDNS=MDNS
 cw01.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+cw01.menu.lvl.HWDT=HWDT
+cw01.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+cw01.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+cw01.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 cw01.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 cw01.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 cw01.menu.wipe.none=Only Sketch
@@ -1758,10 +1830,22 @@ espresso_lite_v1.menu.lvl.OOM=OOM
 espresso_lite_v1.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espresso_lite_v1.menu.lvl.MDNS=MDNS
 espresso_lite_v1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espresso_lite_v1.menu.lvl.HWDT=HWDT
+espresso_lite_v1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espresso_lite_v1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espresso_lite_v1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espresso_lite_v1.menu.wipe.none=Only Sketch
@@ -1951,10 +2035,22 @@ espresso_lite_v2.menu.lvl.OOM=OOM
 espresso_lite_v2.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espresso_lite_v2.menu.lvl.MDNS=MDNS
 espresso_lite_v2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espresso_lite_v2.menu.lvl.HWDT=HWDT
+espresso_lite_v2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espresso_lite_v2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espresso_lite_v2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espresso_lite_v2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espresso_lite_v2.menu.wipe.none=Only Sketch
@@ -2144,10 +2240,22 @@ phoenix_v1.menu.lvl.OOM=OOM
 phoenix_v1.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 phoenix_v1.menu.lvl.MDNS=MDNS
 phoenix_v1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+phoenix_v1.menu.lvl.HWDT=HWDT
+phoenix_v1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+phoenix_v1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 phoenix_v1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 phoenix_v1.menu.wipe.none=Only Sketch
@@ -2337,10 +2445,22 @@ phoenix_v2.menu.lvl.OOM=OOM
 phoenix_v2.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 phoenix_v2.menu.lvl.MDNS=MDNS
 phoenix_v2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+phoenix_v2.menu.lvl.HWDT=HWDT
+phoenix_v2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+phoenix_v2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 phoenix_v2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 phoenix_v2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 phoenix_v2.menu.wipe.none=Only Sketch
@@ -2527,10 +2647,22 @@ nodemcu.menu.lvl.OOM=OOM
 nodemcu.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 nodemcu.menu.lvl.MDNS=MDNS
 nodemcu.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+nodemcu.menu.lvl.HWDT=HWDT
+nodemcu.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+nodemcu.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+nodemcu.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcu.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 nodemcu.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 nodemcu.menu.wipe.none=Only Sketch
@@ -2721,10 +2853,22 @@ nodemcuv2.menu.lvl.OOM=OOM
 nodemcuv2.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 nodemcuv2.menu.lvl.MDNS=MDNS
 nodemcuv2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+nodemcuv2.menu.lvl.HWDT=HWDT
+nodemcuv2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+nodemcuv2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 nodemcuv2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 nodemcuv2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 nodemcuv2.menu.wipe.none=Only Sketch
@@ -2931,10 +3075,22 @@ modwifi.menu.lvl.OOM=OOM
 modwifi.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 modwifi.menu.lvl.MDNS=MDNS
 modwifi.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+modwifi.menu.lvl.HWDT=HWDT
+modwifi.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+modwifi.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+modwifi.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 modwifi.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 modwifi.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 modwifi.menu.wipe.none=Only Sketch
@@ -3121,10 +3277,22 @@ thing.menu.lvl.OOM=OOM
 thing.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 thing.menu.lvl.MDNS=MDNS
 thing.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+thing.menu.lvl.HWDT=HWDT
+thing.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+thing.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+thing.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 thing.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 thing.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 thing.menu.wipe.none=Only Sketch
@@ -3311,10 +3479,22 @@ thingdev.menu.lvl.OOM=OOM
 thingdev.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 thingdev.menu.lvl.MDNS=MDNS
 thingdev.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+thingdev.menu.lvl.HWDT=HWDT
+thingdev.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+thingdev.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+thingdev.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 thingdev.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 thingdev.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 thingdev.menu.wipe.none=Only Sketch
@@ -3501,10 +3681,22 @@ blynk.menu.lvl.OOM=OOM
 blynk.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 blynk.menu.lvl.MDNS=MDNS
 blynk.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+blynk.menu.lvl.HWDT=HWDT
+blynk.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+blynk.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+blynk.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 blynk.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 blynk.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 blynk.menu.wipe.none=Only Sketch
@@ -3691,10 +3883,22 @@ esp210.menu.lvl.OOM=OOM
 esp210.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 esp210.menu.lvl.MDNS=MDNS
 esp210.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+esp210.menu.lvl.HWDT=HWDT
+esp210.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+esp210.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+esp210.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 esp210.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 esp210.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 esp210.menu.wipe.none=Only Sketch
@@ -3881,10 +4085,22 @@ d1_mini.menu.lvl.OOM=OOM
 d1_mini.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 d1_mini.menu.lvl.MDNS=MDNS
 d1_mini.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+d1_mini.menu.lvl.HWDT=HWDT
+d1_mini.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+d1_mini.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+d1_mini.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini.menu.wipe.none=Only Sketch
@@ -4054,10 +4270,22 @@ d1_mini_pro.menu.lvl.OOM=OOM
 d1_mini_pro.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 d1_mini_pro.menu.lvl.MDNS=MDNS
 d1_mini_pro.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+d1_mini_pro.menu.lvl.HWDT=HWDT
+d1_mini_pro.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+d1_mini_pro.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_pro.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini_pro.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini_pro.menu.wipe.none=Only Sketch
@@ -4284,10 +4512,22 @@ d1_mini_lite.menu.lvl.OOM=OOM
 d1_mini_lite.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 d1_mini_lite.menu.lvl.MDNS=MDNS
 d1_mini_lite.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+d1_mini_lite.menu.lvl.HWDT=HWDT
+d1_mini_lite.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+d1_mini_lite.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1_mini_lite.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini_lite.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini_lite.menu.wipe.none=Only Sketch
@@ -4474,10 +4714,22 @@ d1.menu.lvl.OOM=OOM
 d1.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 d1.menu.lvl.MDNS=MDNS
 d1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+d1.menu.lvl.HWDT=HWDT
+d1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+d1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+d1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 d1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1.menu.wipe.none=Only Sketch
@@ -4667,10 +4919,22 @@ espino.menu.lvl.OOM=OOM
 espino.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espino.menu.lvl.MDNS=MDNS
 espino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espino.menu.lvl.HWDT=HWDT
+espino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espino.menu.wipe.none=Only Sketch
@@ -4857,10 +5121,22 @@ espinotee.menu.lvl.OOM=OOM
 espinotee.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espinotee.menu.lvl.MDNS=MDNS
 espinotee.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espinotee.menu.lvl.HWDT=HWDT
+espinotee.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espinotee.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espinotee.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espinotee.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espinotee.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espinotee.menu.wipe.none=Only Sketch
@@ -5111,10 +5387,22 @@ wifinfo.menu.lvl.OOM=OOM
 wifinfo.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 wifinfo.menu.lvl.MDNS=MDNS
 wifinfo.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+wifinfo.menu.lvl.HWDT=HWDT
+wifinfo.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+wifinfo.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+wifinfo.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifinfo.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifinfo.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifinfo.menu.wipe.none=Only Sketch
@@ -5313,10 +5601,22 @@ arduino-esp8266.menu.lvl.OOM=OOM
 arduino-esp8266.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 arduino-esp8266.menu.lvl.MDNS=MDNS
 arduino-esp8266.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+arduino-esp8266.menu.lvl.HWDT=HWDT
+arduino-esp8266.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+arduino-esp8266.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 arduino-esp8266.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 arduino-esp8266.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 arduino-esp8266.menu.wipe.none=Only Sketch
@@ -5571,10 +5871,22 @@ gen4iod.menu.lvl.OOM=OOM
 gen4iod.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 gen4iod.menu.lvl.MDNS=MDNS
 gen4iod.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+gen4iod.menu.lvl.HWDT=HWDT
+gen4iod.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+gen4iod.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+gen4iod.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 gen4iod.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 gen4iod.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 gen4iod.menu.wipe.none=Only Sketch
@@ -5762,10 +6074,22 @@ oak.menu.lvl.OOM=OOM
 oak.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 oak.menu.lvl.MDNS=MDNS
 oak.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+oak.menu.lvl.HWDT=HWDT
+oak.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+oak.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+oak.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 oak.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 oak.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 oak.menu.wipe.none=Only Sketch
@@ -5952,10 +6276,22 @@ wifiduino.menu.lvl.OOM=OOM
 wifiduino.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 wifiduino.menu.lvl.MDNS=MDNS
 wifiduino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+wifiduino.menu.lvl.HWDT=HWDT
+wifiduino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+wifiduino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+wifiduino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifiduino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifiduino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifiduino.menu.wipe.none=Only Sketch
@@ -6256,10 +6592,22 @@ wifi_slot.menu.lvl.OOM=OOM
 wifi_slot.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 wifi_slot.menu.lvl.MDNS=MDNS
 wifi_slot.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+wifi_slot.menu.lvl.HWDT=HWDT
+wifi_slot.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+wifi_slot.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wifi_slot.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifi_slot.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifi_slot.menu.wipe.none=Only Sketch
@@ -6446,10 +6794,22 @@ wiolink.menu.lvl.OOM=OOM
 wiolink.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 wiolink.menu.lvl.MDNS=MDNS
 wiolink.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+wiolink.menu.lvl.HWDT=HWDT
+wiolink.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+wiolink.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+wiolink.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 wiolink.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wiolink.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wiolink.menu.wipe.none=Only Sketch
@@ -6636,10 +6996,22 @@ espectro.menu.lvl.OOM=OOM
 espectro.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espectro.menu.lvl.MDNS=MDNS
 espectro.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espectro.menu.lvl.HWDT=HWDT
+espectro.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espectro.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espectro.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espectro.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espectro.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espectro.menu.wipe.none=Only Sketch
@@ -6826,10 +7198,22 @@ eduinowifi.menu.lvl.OOM=OOM
 eduinowifi.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 eduinowifi.menu.lvl.MDNS=MDNS
 eduinowifi.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+eduinowifi.menu.lvl.HWDT=HWDT
+eduinowifi.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+eduinowifi.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 eduinowifi.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 eduinowifi.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 eduinowifi.menu.wipe.none=Only Sketch
@@ -7066,10 +7450,22 @@ sonoff.menu.lvl.OOM=OOM
 sonoff.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 sonoff.menu.lvl.MDNS=MDNS
 sonoff.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+sonoff.menu.lvl.HWDT=HWDT
+sonoff.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+sonoff.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+sonoff.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 sonoff.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 sonoff.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 sonoff.menu.wipe.none=Only Sketch
@@ -7297,10 +7693,22 @@ espmxdevkit.menu.lvl.OOM=OOM
 espmxdevkit.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 espmxdevkit.menu.lvl.MDNS=MDNS
 espmxdevkit.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+espmxdevkit.menu.lvl.HWDT=HWDT
+espmxdevkit.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+espmxdevkit.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
 espmxdevkit.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espmxdevkit.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espmxdevkit.menu.wipe.none=Only Sketch
diff --git a/cores/esp8266/core_esp8266_main.cpp b/cores/esp8266/core_esp8266_main.cpp
index 337686199d..67b60d298a 100644
--- a/cores/esp8266/core_esp8266_main.cpp
+++ b/cores/esp8266/core_esp8266_main.cpp
@@ -35,6 +35,7 @@ extern "C" {
 #include <core_version.h>
 #include "gdb_hooks.h"
 #include "flash_quirks.h"
+#include "hwdt_app_entry.h"
 
 #define LOOP_TASK_PRIORITY 1
 #define LOOP_QUEUE_SIZE    1
@@ -339,6 +340,10 @@ extern "C" void user_init(void) {
 
     cont_init(g_pcont);
 
+#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
+    debug_hwdt_init();
+#endif
+
     preinit(); // Prior to C++ Dynamic Init (not related to above init() ). Meant to be user redefinable.
 
     ets_task(loop_task,
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
similarity index 87%
rename from libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
rename to cores/esp8266/hwdt_app_entry.cpp
index ea94042d03..39af1e5941 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -42,13 +42,13 @@
  *    `void enable_debug_hwdt_at_link_time (void);`
  * in `setup()`. This tool prints to the serial port at the default serial port
  * speed set by the Boot ROM. On a Hardware WDT reset that port speed is
- * 115200 bps. If your needs differ, see the HWDT_UART_SPEED option below.
+ * 115200 bps. If your needs differ, see the DEBUG_ESP_HWDT_UART_SPEED option below.
  *
  * More on crystal differences and data rates:
  *     When the ESP8266 restarts because of a Hardware WDT reset, the port speed
  *     defaults to 115200. This will be the speed, even if you have a 26MHz or
  *     40MHz Crystal. If you would like to use a different data rate, use the
- *     option HWDT_UART_SPEED described below.
+ *     option DEBUG_ESP_HWDT_UART_SPEED described below.
  *
  *     The Boot ROM initially sets the UART clock divisor to support a data rate
  *     of 115200 bps with the assumption that it has a 40MHz crystal. When a
@@ -97,16 +97,17 @@
 
 
 /*
- * DEBUG_HWDT
+ * DEBUG_ESP_HWDT
  *
  * Enables this debug tool for printing a Hardware WDT stack dump at restart.
  *
+ * This option is now managed from the Arduinoo IDE menu 'Tools->Debug Level'
+ #define DEBUG_ESP_HWDT
  */
- #define DEBUG_HWDT
 
 
 /*
- * DEBUG_HWDT_NO4KEXTRA
+ * DEBUG_ESP_HWDT_NO4KEXTRA
  *
  * This option will leave more of the system stack available for the stack dump.
  * A problem we have with the "4K extra" option, is it pushes the system stack
@@ -124,12 +125,13 @@
  * complete stack dump of the "sys" stack. You can omit this define and have an
  * extra 4K in the heap.
  *
+ * This option is now managed from the Arduinoo IDE menu 'Tools->Debug Level'
+ #define DEBUG_ESP_HWDT_NO4KEXTRA
  */
- // #define DEBUG_HWDT_NO4KEXTRA
 
 
 /*
- * HWDT_UART_SPEED
+ * DEBUG_ESP_HWDT_UART_SPEED
  *
  * This option alters the UART serial speed used for printing the Hardware WDT
  * reset stack dump. Without this option on an HWDT reset, the existing default
@@ -141,19 +143,19 @@
  * and data rates" in the comments at the top.
  *
  */
- // #define HWDT_UART_SPEED (19200)
- // #define HWDT_UART_SPEED (74880)
- // #define HWDT_UART_SPEED (115200)
- // #define HWDT_UART_SPEED (230400)
+ // #define DEBUG_ESP_HWDT_UART_SPEED (19200)
+ // #define DEBUG_ESP_HWDT_UART_SPEED (74880)
+ // #define DEBUG_ESP_HWDT_UART_SPEED (115200)
+ // #define DEBUG_ESP_HWDT_UART_SPEED (230400)
 
 
 /*
- * HWDT_PRINT_GREETING
+ * DEBUG_ESP_HWDT_PRINT_GREETING
  *
  * Prints a simple introduction to let you know this tool is active and in the
- * build. At power-on, this may not be viewable on some devices. The crystal
- * has to be 40Mhz for this to work w/o using the HWDT_UART_SPEED option above.
- * May not be worth the cost in IRAM.
+ * build. At power-on, this may not be viewable on some devices. The crystal has
+ * to be 40Mhz for this to work w/o using the DEBUG_ESP_HWDT_UART_SPEED option
+ * above. May not be worth the cost in IRAM.
  *
  * EDIT: There is something different in the UART setup after a flash upload. I
  * am unable to print using the same code that works for Power-on and an EXT_RST
@@ -170,11 +172,11 @@
  * tool performing hardware reset and exiting, then the serial monitor
  * re-engaging. This is not an issue that needs to be addressed here.
  */
- // #define HWDT_PRINT_GREETING
+ #define DEBUG_ESP_HWDT_PRINT_GREETING
 
 
 /*
- * ROM_STACK_SIZE
+ * DEBUG_ESP_HWDT_ROM_STACK_SIZE
  *
  * There are four sections of code starting just before 0x40000000, that share
  * the same stack space.
@@ -193,20 +195,20 @@
  * safe, I am leaving this at 1024; however, I think there is room to lower it
  * without loss of information.
  */
-#ifndef ROM_STACK_SIZE
-#define ROM_STACK_SIZE (1024)
+#ifndef DEBUG_ESP_HWDT_ROM_STACK_SIZE
+#define DEBUG_ESP_HWDT_ROM_STACK_SIZE (1024)
 #endif
 
 
 /*
- * HWDT_INFO
+ * DEBUG_ESP_HWDT_INFO
  *
  * Gather some information on ROM and bootloader combined, sys, and cont stack
  * usage. If you are missing the include file for this structure, you can
  * copy-paste from the embedded version of the .h below.
  *
  */
- #define HWDT_INFO
+ // #define DEBUG_ESP_HWDT_INFO
 
 
 /*
@@ -215,7 +217,7 @@
  * Dump the stack contents of the ROM Stack area. This gives us a visual of the
  * stack usage. Probably not of value, beyond developing this tool.
  *
- * To see printing, you may need to use this option with HWDT_UART_SPEED.
+ * To see printing, you may need to use this option with DEBUG_ESP_HWDT_UART_SPEED.
  */
  // #define ROM_STACK_DUMP
 
@@ -226,12 +228,12 @@
  * "If" statement or "switch" method to implement, the reset reason logic. Both
  * can be made smaller by removing confirmation checks.
  *
- * Checks are performed when DEBUG_HWDT_DEBUG_RESET_REASON has been defined.
+ * Checks are performed when DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON has been defined.
  *
  * EDIT: I should settle on one or the other; however, new issues continue to
  * pop up on determining reset reason. I'll wait until later and pick one.
  *
- #define DEBUG_HWDT_DEBUG_RESET_REASON
+ #define DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON
  */
  #define HWDT_IF_METHOD_RESET_REASON
 
@@ -240,8 +242,7 @@
 /*                     End of Configuration Options                           */
 /*____________________________________________________________________________*/
 
-
-#ifdef DEBUG_HWDT
+#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
 
 #include <c_types.h>
 #include "cont.h"
@@ -267,9 +268,12 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
 
 }
 
-// #define DEBUG_HWDT_DEBUG
+// #define DEBUG_ESP_HWDT_DEV_DEBUG
 // #define USE_IRAM
 
+//C To the maintainers: Since the Cache_Read_Enable logic seems to work, do you
+//C see a need or would you like to keep the IRAM build path?
+//C If you see no need for it the USE_IRAM build path could be deleted.
 #ifdef USE_IRAM
 #undef USE_IRAM
 #define USE_IRAM 1
@@ -283,7 +287,7 @@ extern uint32_t stack_thunk_get_stack_bot() __attribute__((weak, alias("__zero_r
 #define STATIC static __attribute__((noinline))
 // #define STATIC
 
-#ifdef DEBUG_HWDT_DEBUG
+#ifdef DEBUG_ESP_HWDT_DEV_DEBUG
 /*
  * We have two copies of hwdt_info_t. Verify internal and external structures
  * match.
@@ -333,6 +337,7 @@ typedef struct hwdt_info_ {
 } hwdt_info_t;
 
 void enable_debug_hwdt_at_link_time(void);
+extern "C" void debug_hwdt_init(void);
 
 extern uint32_t *g_rom_stack;
 extern hwdt_info_t hwdt_info;
@@ -353,67 +358,53 @@ static_assert(sizeof(hwdt_info_t) == sizeof(LOCAL_HWDT_INFO_T), "Local and inclu
 #endif
 
 
-#define MK_ALIGN16_SZ(a) (((a) + 0x0F) & ~0x0F)
+#define MK_ALIGN16_SZ(a) (((a) + 0x0FUL) & ~0x0FUL)
 #define ALIGN_UP(a, s) ((decltype(a))((((uintptr_t)(a)) + (s-1)) & ~(s-1)))
 #define ALIGN_DOWN(a, s) ((decltype(a))(((uintptr_t)(a)) & ~(s-1)))
 
 #ifndef CONT_STACKGUARD
 #define CONT_STACKGUARD 0xfeefeffe
 #endif
-#define RTC_SYS         ((volatile uint32_t*)0x60001100)
-
-
-#define dram_start      ((uint32_t *)0x3FFE8000)
-#define dram_end        ((uint32_t *)0x40000000)
+#define RTC_SYS         ((volatile uint32_t*)0x60001100UL)
 
-#define rom_stack_first ((uint32_t *)0x40000000)
-#define sys_stack       ((uint32_t *)0x3fffeb30)
 /*
+ *
+ #define DRAM_START      ((uint32_t *)0x3FFE8000UL)
+ #define DRAM_END        ((uint32_t *)0x40000000UL)
+ *
  * The space between 0x3fffe000 up to 0x3fffeb30 is a ROM BSS area that is later
  * claimed by the SDK for stack space. This is a problem area for this tool,
  * because the ROM BSS gets zeroed as part of ROM init on reboot. Any part of
  * the "sys" stack residing there is lost. On the other hand, it becomes a prime
  * candidate for DRAM address space to handle the needs of this tool.
+ *
+ #define SYS_STACK_E000     ((uint32_t *)0x3fffe000UL)
  */
-#define sys_stack_e000     ((uint32_t *)0x3fffe000)
+
+#define ROM_STACK_FIRST ((uint32_t *)0x40000000UL)
+#define SYS_STACK       ((uint32_t *)0x3fffeb30UL)
 
 // Map out who will live where.
-#define rom_stack_A16_sz   (MK_ALIGN16_SZ(ROM_STACK_SIZE))
-#define cont_stack_A16_sz  (MK_ALIGN16_SZ(sizeof(cont_t)))
-#define rom_stack ((uint32_t *) ((uintptr_t)rom_stack_first - rom_stack_A16_sz))
+#define ROM_STACK_A16_SZ   (MK_ALIGN16_SZ(DEBUG_ESP_HWDT_ROM_STACK_SIZE))
+#define CONT_STACK_A16_SZ  (MK_ALIGN16_SZ(sizeof(cont_t)))
+#define ROM_STACK ((uint32_t *) ((uintptr_t)ROM_STACK_FIRST - ROM_STACK_A16_SZ))
 
 
-#ifdef DEBUG_HWDT_NO4KEXTRA
+#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
 /* This is the default NONOS-SDK user's heap location for NO4KEXTRA */
 static cont_t g_cont __attribute__ ((aligned (16)));
-#define sys_stack_first ((uint32_t *)((uintptr_t)rom_stack))
+#define SYS_STACK_FIRST ROM_STACK
 
 #else
-#define cont_stack_first ((uint32_t *)((uintptr_t)rom_stack)) // only for computation
-#define cont_stack ((cont_t *)((uintptr_t)cont_stack_first - cont_stack_A16_sz))
-#define sys_stack_first ((uint32_t *)((uintptr_t)cont_stack))
+#define CONT_STACK_FIRST ROM_STACK // only for computation
+#define CONT_STACK ((cont_t *)((uintptr_t)CONT_STACK_FIRST - CONT_STACK_A16_SZ))
+#define SYS_STACK_FIRST CONT_STACK
 #endif
 
 uint32_t *g_rom_stack  __attribute__((section(".noinit")));
 size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
 hwdt_info_t hwdt_info __attribute__((section(".noinit")));
 
-void enable_debug_hwdt_at_link_time(void) {
-    /*
-     * This function does nothing; however, including a call to it in setup,
-     * allows this module to override, at link time, the core_esp8266_main.cpp's
-     * `app_entry()` with the one below. This will create a stack dump on
-     * Hardware WDT resets.
-     *
-     * It appears just including this module in the sketch directory before
-     * opening the project is enough. However, just play it safe, call this
-     * function from setup.
-     */
-}
-
-
-/* the following code is linked only if a call to the above function is made somewhere */
-
 extern "C" {
 
 #if USE_IRAM
@@ -517,25 +508,25 @@ STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
      * Testing of vital pointers for validity could also aid as a partial
      * indicator of power-on. Not needed for that purpose at this time.
      */
-    if (g_rom_stack == rom_stack &&
-        g_rom_stack_A16_sz == rom_stack_A16_sz &&
-#ifdef DEBUG_HWDT_NO4KEXTRA
+    if (g_rom_stack == ROM_STACK &&
+        g_rom_stack_A16_sz == ROM_STACK_A16_SZ &&
+#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
         g_pcont == &g_cont
 #else
-        g_pcont == cont_stack
+        g_pcont == CONT_STACK
 #endif
         ) {
             hwdt_info.g_pcont_valid = true;
     } else {
         hwdt_info.g_pcont_valid = false;
-        g_rom_stack = rom_stack;
-        g_rom_stack_A16_sz = rom_stack_A16_sz;
+        g_rom_stack = ROM_STACK;
+        g_rom_stack_A16_sz = ROM_STACK_A16_SZ;
     }
 }
 
-#if defined(DEBUG_HWDT_DEBUG) || defined(DEBUG_HWDT_DEBUG_RESET_REASON)
-#ifndef DEBUG_HWDT_DEBUG_RESET_REASON
-#define DEBUG_HWDT_DEBUG_RESET_REASON
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) || defined(DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON)
+#ifndef DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON
+#define DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON
 #endif
 #define debug__confirm_rom_reason(a) ((a) == rom_api_reason)
 #else
@@ -586,6 +577,9 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
      * I need to know if this is the 1st boot at power on. Combining these
      * indicators has been tricky, I think I now have it.
      *
+     * Maybe a TODO: This logic is for the general case of detecting the true
+     * reset cause before the SDK is started. It may be possible to reduce to
+     * a specific HWDT test. Leaving for now.
      */
 
     hwdt_info.rtc_sys_reason = RTC_SYS[0];
@@ -593,6 +587,11 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
     hwdt_info.rom_api_reason = rtc_get_reset_reason();
     const ROM_RST_REASON_t rom_api_reason = (ROM_RST_REASON_t)hwdt_info.rom_api_reason;
 
+//C To maintainers: Cleanup: Of these two methods is there one you prefer?
+//C The other could be deleted.
+//C I did it two ways looking to see if one was shorter than the other. I think
+//C they ended out being about the same. Also coding it twice, helped check my
+//C logic.
 #ifdef HWDT_IF_METHOD_RESET_REASON
     *hwdt_reset = false;
     *power_on = false;
@@ -702,7 +701,7 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
     return hwdt_info.reset_reason;
 }
 
-#ifdef HWDT_UART_SPEED
+#ifdef DEBUG_ESP_HWDT_UART_SPEED
 /*
  * Here we use uart_div_modify in the Boot ROM. Note the Boot ROM version does
  * not do any input validation.
@@ -787,7 +786,7 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
         adjust_uart_speed(new_uart_divisor);
     }
 
-#if defined(DEBUG_HWDT_DEBUG)
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG)
     ETS_PRINTF("\n\nreal_uart_div_modify(0, %u / %u);\n", master_freq, new_speed);
     ETS_PRINTF("F_CRYSTAL = %u\n", crystal_freq);
     ETS_PRINTF("old uart_divisor = %u\n", uart_divisor);
@@ -815,16 +814,16 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
     bool hwdt_reset = false;
     get_reset_reason(&power_on, &hwdt_reset);
 
-#ifdef HWDT_UART_SPEED
-    const uint32_t uart_divisor = set_uart_speed(0, HWDT_UART_SPEED);
+#ifdef DEBUG_ESP_HWDT_UART_SPEED
+    const uint32_t uart_divisor = set_uart_speed(0, DEBUG_ESP_HWDT_UART_SPEED);
 #endif
-#if defined(DEBUG_HWDT_DEBUG)
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG)
     ETS_PRINTF("Basic boot reason: %s\n", (power_on) ? "Power-on" : "Reboot");
     ETS_PRINTF("RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
     ETS_PRINTF("ROM API Reset Reason = %u\n", hwdt_info.rom_api_reason);
     ETS_PRINTF("HWDT Reset Reason = %u\n\n", hwdt_info.reset_reason);
 #endif
-#if defined(DEBUG_HWDT_DEBUG_RESET_REASON)
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON)
     if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
         ETS_PRINTF("Reset reason confirmation failed!\n");
         ETS_PRINTF("  RTC_SYS Reset Reason = %u\n", hwdt_info.rtc_sys_reason);
@@ -864,13 +863,13 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
         }
         hwdt_info.cont_integrity = cont_integrity;
 
-#if defined(DEBUG_HWDT_NO4KEXTRA) || defined(HWDT_INFO)
+#if defined(DEBUG_ESP_HWDT_NO4KEXTRA) || defined(DEBUG_ESP_HWDT_INFO)
         const uint32_t *ctx_cont_ptr = skip_stackguard(g_pcont->stack, g_pcont->stack_end, CONT_STACKGUARD);
         hwdt_info.cont = (uintptr_t)g_pcont->stack_end - (uintptr_t)ctx_cont_ptr;
 #endif
 
-        const uint32_t *ctx_sys_ptr = skip_stackguard(sys_stack, rom_stack, CONT_STACKGUARD);
-        hwdt_info.sys = (uintptr_t)rom_stack - (uintptr_t)ctx_sys_ptr;
+        const uint32_t *ctx_sys_ptr = skip_stackguard(SYS_STACK, ROM_STACK, CONT_STACKGUARD);
+        hwdt_info.sys = (uintptr_t)ROM_STACK - (uintptr_t)ctx_sys_ptr;
 
 #ifndef USE_IRAM
         const uint32_t *bearssl_stack_top = NULL;
@@ -891,9 +890,9 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
             }
 #endif
             /* Print context SYS */
-            print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)rom_stack, PRINT_STACK::SYS);
+            print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)ROM_STACK, PRINT_STACK::SYS);
 
-#ifdef DEBUG_HWDT_NO4KEXTRA
+#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
             /* Print separate ctx: cont stack */
             print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
 #endif
@@ -908,34 +907,34 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
      *  skip the unused section of the stack when printing a Stack Dump.
      */
     {
-        size_t this_mutch = (uintptr_t)rom_stack - (uintptr_t)sys_stack;
+        size_t this_mutch = (uintptr_t)ROM_STACK - (uintptr_t)SYS_STACK;
         this_mutch /= sizeof(uint32_t);
         for (size_t i = 0; i < this_mutch; i++) {
-            sys_stack[i] = CONT_STACKGUARD;
+            SYS_STACK[i] = CONT_STACKGUARD;
         }
     }
 
-#if defined(HWDT_INFO) || defined(ROM_STACK_DUMP)
+#if defined(DEBUG_ESP_HWDT_INFO) || defined(ROM_STACK_DUMP)
     /*
-     *  Reports on rom_stack usage by ROM and eboot.
-     *  Used to confirm ROM_STACK_SIZE is large enough.
+     *  Reports on ROM_STACK usage by ROM and eboot.
+     *  Used to confirm DEBUG_ESP_HWDT_ROM_STACK_SIZE is large enough.
      */
     {
-        const uint32_t *ctx_rom_ptr = skip_stackguard(rom_stack, rom_stack_first, CONT_STACKGUARD);
-        hwdt_info.rom = (uintptr_t)rom_stack_first - (uintptr_t)ctx_rom_ptr;
+        const uint32_t *ctx_rom_ptr = skip_stackguard(ROM_STACK, ROM_STACK_FIRST, CONT_STACKGUARD);
+        hwdt_info.rom = (uintptr_t)ROM_STACK_FIRST - (uintptr_t)ctx_rom_ptr;
 #if defined(ROM_STACK_DUMP)
-        print_stack((uintptr_t)ctx_rom_ptr, (uintptr_t)rom_stack_first, PRINT_STACK::ROM);
+        print_stack((uintptr_t)ctx_rom_ptr, (uintptr_t)ROM_STACK_FIRST, PRINT_STACK::ROM);
 #endif
     }
 #endif
 
-#if defined(HWDT_PRINT_GREETING)
+#if defined(DEBUG_ESP_HWDT_PRINT_GREETING)
     ETS_PRINTF("\n\nHardware WDT Stack Dump - enabled\n\n");
 #else
     ETS_PRINTF("\n\n");
 #endif
 
-#ifdef HWDT_UART_SPEED
+#ifdef DEBUG_ESP_HWDT_UART_SPEED
     if (uart_divisor) {
         adjust_uart_speed(uart_divisor);
     }
@@ -977,7 +976,7 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     handle_hwdt_icache();
 #endif
 
-#ifdef DEBUG_HWDT_NO4KEXTRA
+#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
     /*
      *  Continuation context is in BSS.
      */
@@ -988,7 +987,7 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
      *  for the ROM/eboot stack and before the SYS stack begins.
      *  All computations were done at top, save pointer to it now.
      */
-    g_pcont = cont_stack;
+    g_pcont = CONT_STACK;
 #endif
     /*
      *  Use new calculated SYS stack from top.
@@ -997,7 +996,7 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     asm volatile ("mov.n a1, %0\n\t"
                   "movi a0, 0x4000044c\n\t"     /* Should never return; however, set return to Boot ROM Breakpoint */
                   "jx %1\n\t" ::
-                  "r" (sys_stack_first), "r" (call_user_start):
+                  "r" (SYS_STACK_FIRST), "r" (call_user_start):
                   "a0", "memory");
 
     __builtin_unreachable();
@@ -1030,10 +1029,10 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
     __builtin_unreachable();
 }
 
-#if defined(HWDT_INFO) || defined(ROM_STACK_DUMP)
-void preinit(void) {
+#if defined(DEBUG_ESP_HWDT_INFO) || defined(ROM_STACK_DUMP)
+void debug_hwdt_init(void) {
     /*
-     * Fill the rom_stack while it is not actively being used.
+     * Fill the ROM_STACK while it is not actively being used.
      *
      * I am thinking that during the time the sketch is running this block of
      * memory could be used for a scratch buffer.
@@ -1042,11 +1041,11 @@ void preinit(void) {
         g_rom_stack[i] = CONT_STACKGUARD;
     }
 }
+#else
+void debug_hwdt_init(void) {
+}
 #endif
 
 };
 
-#else
-void enable_debug_hwdt_at_link_time(void) {
-}
-#endif // end of #ifdef DEBUG_HWDT
+#endif // end of #if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
diff --git a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h b/cores/esp8266/hwdt_app_entry.h
similarity index 92%
rename from libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
rename to cores/esp8266/hwdt_app_entry.h
index 8823d8361f..deeddcdf98 100644
--- a/libraries/esp8266/examples/HwdtStackDump/hwdt_app_entry.h
+++ b/cores/esp8266/hwdt_app_entry.h
@@ -14,6 +14,7 @@ typedef struct hwdt_info_ {
 } hwdt_info_t;
 
 void enable_debug_hwdt_at_link_time(void);
+extern "C" void debug_hwdt_init(void);
 
 extern uint32_t *g_rom_stack;
 extern hwdt_info_t hwdt_info;
diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.h b/libraries/esp8266/examples/HwdtStackDump/AddOn.h
deleted file mode 100644
index 320f9f83b4..0000000000
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.h
+++ /dev/null
@@ -1,3 +0,0 @@
-void printHelpAddOn(Print& out)__attribute__((weak));
-int hotKeyHandlerAddOn(Print& out, int hotKey)__attribute__((weak));
-void crashMeIfYouCan(void)__attribute__((weak));
diff --git a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino b/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
deleted file mode 100644
index 7488d5aab4..0000000000
--- a/libraries/esp8266/examples/HwdtStackDump/AddOn.ino
+++ /dev/null
@@ -1,86 +0,0 @@
-#ifdef HWDT_STACK_DUMP_H
-
-extern struct rst_info resetInfo;
-
-void printHwdtDebugInfo(Print& out) {
-  extern struct rst_info resetInfo;
-  out.println(String(F("RTC_SYS[0] = ")) + (hwdt_info.rtc_sys_reason) + F(", resetInfo.reason = ") + (resetInfo.reason) + F(", ") + ESP.getResetReason());
-  out.println(String(F("ROM API reset reason = ")) + (hwdt_info.rom_api_reason));
-  out.println(String(F("HWDT reset reason = ")) + (hwdt_info.reset_reason));
-  if (REASON_EXT_SYS_RST < hwdt_info.reset_reason) {
-    out.println(String(F("Reset reason confirmation failed!\n")));
-  }
-
-  out.println();
-  if (hwdt_info.sys) {
-    out.println(String(F("Stack Usages:")));
-    out.printf_P(PSTR("  ctx: sys  %6u\r\n"), hwdt_info.sys);
-    uint32 cont_flags = hwdt_info.cont_integrity;
-    out.printf_P(PSTR("  ctx: cont %6u, Integrity Flags: %04X - %s\r\n"), hwdt_info.cont, cont_flags, (cont_flags) ? "fail" : "pass");
-    if (hwdt_info.rom) {
-      out.printf_P(PSTR("  ctx: ROM  %6u\r\n"), hwdt_info.rom);
-    }
-  } else {
-    out.println(F("No stack usage information available at this time. Try restart."));
-  }
-  out.println();
-}
-
-
-void printHelpAddOn(Print& out) {
-  out.println(F("  0    - Divide by zero, exception(0);"));
-  out.println(F("  p    - panic();"));
-  out.println(F("  c    - Hardware WDT reset by calling a missing function."));
-  out.println();
-  out.println(F("Additional options:"));
-  out.println(F("  d    - Print some HWDT Debug info."));
-}
-
-int divideA_B(int a, int b);
-
-int hotKeyHandlerAddOn(Print& out, int hotKey) {
-  switch (hotKey) {
-    case 'd':
-      printHwdtDebugInfo(out);
-      break;
-    case 'p':
-      out.println(F("Time to panic()!"));
-      panic();
-      break;
-    case '0':
-      out.println(F("Crashing by dividing by zero."));
-      out.printf_P(PSTR("This should not print %d\n"), divideA_B(1, 0));
-      // out.printf("This should not print %d\r\n", divideA_B(1, 0));
-      break;
-    case 'c':
-      out.println(F("Now calling: void crashMeIfYouCan(void)__attribute__((weak));"));
-      out.println(F("This function was missing when the sketch was linked. ..."));
-      crashMeIfYouCan();
-      break;
-    default:
-      return 0;
-  }
-  return 1;
-}
-
-// Will HWDT if not set to NOINLINE
-// int divideA_B(int a, int b) {
-int __attribute__((noinline)) divideA_B(int a, int b) {
-  return (a / b);
-}
-
-#else
-void printHwdtDebugInfo(Print& out) {
-  (void)out;
-}
-
-int hotKeyHandlerAddOn(Print& out, int hotKey) {
-  (void)out;
-  (void)hotKey;
-  return 0;
-}
-
-void printHelpAddOn(Print& out) {
-  (void)out;
-}
-#endif
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 92c8a8ea09..71de487456 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -1,16 +1,17 @@
 /*
-   A Hardware WDT Reset stack dump tool by Michael Hightower
 
-   This Sketch demonstrates the use of a tool that prints a stack dump after
-   a Hardware WDT reset. After a Hardware Watchdog Timer reset, the module
-   hwdt_app_entry.cpp writes a stack dump to the serial interface.
-
-   The goal was to have a file (hwdt_app_entry.cpp) that could be dropped into
-   a sketch directory, then open the sketch project, build, upload, and debug.
+   There is a tool to print a stack dump at boot after a Hardware WDT
+   reset. To use the Hardware WDT Reset stack dump tool, you can select HWDT or
+   HWDT_NO4KEXTRA from the Arduino IDE menu "Tools->Debug Level" before
+   building your sketch. Note, 'Tools->Debug port' selection is not needed or
+   referenced for printing the HWDT stack dump.
 
    When the ESP8266 restarts because of a Hardware WDT reset, the serial port
-   speed defaults to 115200 bps. For support of other speeds, review the
-   comments on option HWDT_UART_SPEED in wdt_app_entry.cpp.
+   speed defaults to 115200 bps. The HWDT stack dump will always print on port
+   'Serial'.
+
+   To demonstrates this tool, this Sketch offers a few options for crashing the
+   ESP8266 with and without a HWDT reset.
 
 */
 
@@ -19,23 +20,11 @@
 #include <Esp.h>
 #include <user_interface.h>
 
-#include "AddOn.h"
-/*
-  If you need to run your sketch w/o this tool or you want to see the
-  difference with and without this tool. Comment out the #include below. And
-  comment out the "#define DEBUG_HWDT" line in hwdt_app_entry.cpp.
-*/
-#include "hwdt_app_entry.h"
-
-
 void setup(void) {
-#ifdef DEBUG_HWDT
-  enable_debug_hwdt_at_link_time();
-#endif
   WiFi.persistent(false); // w/o this a flash write occurs at every boot
   WiFi.mode(WIFI_OFF);
   Serial.begin(115200);
-  delay(20);
+  delay(20);    // This delay helps when using the 'Modified Serial monitor' otherwise it is not needed.
   Serial.println();
   Serial.println();
   Serial.println(F("The Hardware Watchdog Timer Demo is now available for crashing ..."));
diff --git a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
index 98f255d22a..9c12ac7c1c 100644
--- a/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/ProcessKey.ino
@@ -1,4 +1,6 @@
 #include <esp8266_undocumented.h>
+void crashMeIfYouCan(void)__attribute__((weak));
+int divideA_B(int a, int b);
 
 int* nullPointer = NULL;
 
@@ -25,14 +27,12 @@ void processKey(Print& out, int hotKey) {
       break;
     case 'h':
       out.printf_P(PSTR("Now crashing with Hardware WDT. This will take about 6 seconds.\r\n"));
-      // ESP.wdtDisable();
-      asm volatile("" ::: "memory");
-      asm volatile("mov.n a2, %0\n"
-                   "mov.n a3, %1\n"
-                   "mov.n a4, %2\n"
-                   "mov.n a5, %3\n"
-                   "mov.n a6, %4\n"
-                   : : "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa));
+      asm volatile("mov.n a2, %0\n\t"
+                   "mov.n a3, %1\n\t"
+                   "mov.n a4, %2\n\t"
+                   "mov.n a5, %3\n\t"
+                   "mov.n a6, %4\n\t"
+                   : : "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa), "r"(0xaaaaaaaa) : "memory");
       // Could not find these in the stack dump, unless interrupts were enabled.
       {
         uint32_t startTime = millis();
@@ -51,6 +51,29 @@ void processKey(Print& out, int hotKey) {
         }
       }
       break;
+    case 'p':
+      out.println(F("Time to panic()!"));
+      panic();
+      break;
+    case 'z':
+      out.println(F("Crashing by dividing by zero. This should generate an exception(0)."));
+      out.printf_P(PSTR("This should not print %d\n"), divideA_B(1, 0));
+      break;
+    case 'w':
+      out.println(F("Now calling: void crashMeIfYouCan(void)__attribute__((weak));"));
+      out.println(F("This function has a prototype but was missing when the sketch was linked. ..."));
+      crashMeIfYouCan();
+      break;
+    case 'b':
+      out.println(F("Executing a break instruction w/o GDB will cause a HWDT reset."));
+      asm volatile("break 1, 15;");
+      out.println(F("This line will not be printable w/o running GDB"));
+      break;
+    case '0':
+      out.println(F("Crashing at an embeded 'break 1, 15' instruction that was generated"));
+      out.println(F("by the compiler after detecting a divide by zero."));
+      out.printf_P(PSTR("This should not print %d\n"), divideA_B_bp(1, 0));
+      break;
     case '\r':
       out.println();
     case '\n':
@@ -64,17 +87,30 @@ void processKey(Print& out, int hotKey) {
       out.println();
       out.println(F("Crash with:"));
       out.println(F("  s    - Software WDT"));
-      out.println(F("  h    - Hardware WDT"));
-      printHelpAddOn(out);
+      out.println(F("  h    - Hardware WDT - looping with interrupts disabled"));
+      out.println(F("  w    - Hardware WDT - calling a missing (weak) function."));
+      out.println(F("  0    - Hardware WDT - a hard coded compiler breakpoint from a compile time detected divide by zero"));
+      out.println(F("  b    - Hardware WDT - a forgotten hard coded 'break 1, 15;' and no GDB running."));
+      out.println(F("  z    - Divide by zero, exception(0);"));
+      out.println(F("  p    - panic();"));
       out.println();
       break;
     default:
-      if (hotKeyHandlerAddOn(out, hotKey)) {
-        return;
-      }
       out.printf_P(PSTR("\"%c\" - Not an option?  / ? - help"), hotKey);
       out.println();
       processKey(out, '?');
       break;
   }
 }
+
+// With the current toolchain 10.1, using this to divide by zero will *not* be
+// caught at compile time.
+int __attribute__((noinline)) divideA_B(int a, int b) {
+  return (a / b);
+}
+
+// With the current toolchain 10.1, using this to divide by zero *will* be
+// caught at compile time. And a hard coded breakpoint will be inserted.
+int divideA_B_bp(int a, int b) {
+  return (a / b);
+}
diff --git a/tools/boards.txt.py b/tools/boards.txt.py
index 789f75714c..7a1559bc33 100755
--- a/tools/boards.txt.py
+++ b/tools/boards.txt.py
@@ -956,7 +956,7 @@
 
     })
 	])
-    
+
 
 ################################################################
 
@@ -1227,20 +1227,30 @@ def combn (lst):
         all += comb(i + 1, lst)
     return all
 
-def comb1 (lst):
+def comb1 (lst, lstplusone):
     all = []
     for i in range(0, len(lst)):
         all += [ [ lst[i] ] ]
-    all += [ lst ]
+    if len(lstplusone):
+        for i in range(0, len(lstplusone)):
+            all += [ [ lstplusone[i] ] ]
+        all += [ lst ]
+        for i in range(0, len(lstplusone)):
+            all += [ lst + [ lstplusone[i] ] ]
+    else:
+        all += [ lst ]
     return all
 
 def all_debug ():
     listcomb = [ 'SSL', 'TLS_MEM', 'HTTP_CLIENT', 'HTTP_SERVER' ]
     listnocomb = [ 'CORE', 'WIFI', 'HTTP_UPDATE', 'UPDATER', 'OTA', 'OOM', 'MDNS' ]
+    listplusone = [ 'HWDT', 'HWDT_NO4KEXTRA' ]
     listsingle = [ 'NoAssert-NDEBUG' ]
     options = combn(listcomb)
-    options += comb1(listnocomb)
+    options += comb1(listnocomb, listplusone)
     options += [ listcomb + listnocomb ]
+    for i in range(0, len(listplusone)):
+        options += [ listcomb + listnocomb + [ listplusone[i] ] ]
     options += [ listsingle ]
     debugmenu = collections.OrderedDict([
             ( '.menu.dbg.Disabled', 'Disabled' ),

From 9024184074305b53373ce40917f93b0a1707ddc8 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sun, 26 Jul 2020 14:48:01 -0700
Subject: [PATCH 24/35] Fix stack character buffer length.

---
 cores/esp8266/hwdt_app_entry.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index 39af1e5941..f738999b1f 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -422,7 +422,7 @@ int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
       the PROGMEM address must be word (4 bytes) aligned. The destination
       address for ets_memcpy must also be word-aligned.
     */
-    char ram_buf[ets_strlen(fmt)] __attribute__ ((aligned(4)));
+    char ram_buf[ets_strlen(fmt) + 1] __attribute__((aligned(4)));
     ets_strcpy(ram_buf, fmt);
     va_list argPtr;
     va_start(argPtr, fmt);

From 2ce297cf231e50ab107fda59f2b2b4304fd1d902 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 4 Aug 2020 08:34:38 -0700
Subject: [PATCH 25/35] Updated comment to reflect support via Arduino IDE
 Tools menu.

---
 cores/esp8266/hwdt_app_entry.cpp | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index f738999b1f..ee79062c21 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -36,13 +36,15 @@
  * `app_entry_redefinable()`, and also to the stack pointer passed to the SDK,
  * we can preserve the stack during an HWDT event.
  *
- * To use, just place this file in the sketch directory before opening the
- * project and build and upload your sketch. That should be enough to get it
- * included in your sketch. If that does not work, then add a call to:
- *    `void enable_debug_hwdt_at_link_time (void);`
- * in `setup()`. This tool prints to the serial port at the default serial port
- * speed set by the Boot ROM. On a Hardware WDT reset that port speed is
- * 115200 bps. If your needs differ, see the DEBUG_ESP_HWDT_UART_SPEED option below.
+ * To use this tool, select HWDT or HWDT_NO4KEXTRA from the Arduino IDE menu
+ * "Tools->Debug Level" before building your sketch. Note, 'Tools->Debug port'
+ * selection is not needed or referenced for printing the HWDT stack dump.
+ * To enable in other build environments, add DEBUG_ESP_HWDT_NO4KEXTRA or
+ * DEBUG_ESP_HWDT global defines to your build.
+ *
+ * This tool prints to the serial port at the default serial port speed set by
+ * the Boot ROM. On a Hardware WDT reset that port speed is 115200 bps. If your
+ * needs differ, see the DEBUG_ESP_HWDT_UART_SPEED option below.
  *
  * More on crystal differences and data rates:
  *     When the ESP8266 restarts because of a Hardware WDT reset, the port speed

From 1bd4e33efb8005a1d7662d32da7e757e83525114 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Tue, 4 Aug 2020 21:35:39 -0700
Subject: [PATCH 26/35] Improve meshing of HWDT and NOEXTRA4K

---
 cores/esp8266/core_esp8266_app_entry_noextra4k.cpp |  8 ++++++++
 cores/esp8266/hwdt_app_entry.cpp                   | 11 +++++++----
 2 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp b/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
index 56e4b1d598..d477691400 100644
--- a/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
+++ b/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
@@ -27,6 +27,13 @@ extern "C" void call_user_start();
 /* this is the default NONOS-SDK user's heap location */
 static cont_t g_cont __attribute__ ((aligned (16)));
 
+#if defined(DEBUG_ESP_HWDT_NO4KEXTRA)
+extern "C" cont_t * ICACHE_RAM_ATTR get_g_cont(void)
+{
+    return &g_cont;
+}
+
+#else
 extern "C" void app_entry_redefinable(void)
 {
     g_pcont = &g_cont;
@@ -34,3 +41,4 @@ extern "C" void app_entry_redefinable(void)
     /* Call the entry point of the SDK code. */
     call_user_start();
 }
+#endif
diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index ee79062c21..aaa08fd559 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -394,8 +394,8 @@ static_assert(sizeof(hwdt_info_t) == sizeof(LOCAL_HWDT_INFO_T), "Local and inclu
 
 #ifdef DEBUG_ESP_HWDT_NO4KEXTRA
 /* This is the default NONOS-SDK user's heap location for NO4KEXTRA */
-static cont_t g_cont __attribute__ ((aligned (16)));
 #define SYS_STACK_FIRST ROM_STACK
+extern cont_t * get_g_cont(void);
 
 #else
 #define CONT_STACK_FIRST ROM_STACK // only for computation
@@ -513,7 +513,7 @@ STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
     if (g_rom_stack == ROM_STACK &&
         g_rom_stack_A16_sz == ROM_STACK_A16_SZ &&
 #ifdef DEBUG_ESP_HWDT_NO4KEXTRA
-        g_pcont == &g_cont
+        g_pcont == get_g_cont()
 #else
         g_pcont == CONT_STACK
 #endif
@@ -808,6 +808,9 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
  */
 STATIC void IRAM_MAYBE handle_hwdt(void)  __attribute__((used));
 STATIC void IRAM_MAYBE handle_hwdt(void) {
+#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
+    disable_extra4k_at_link_time();
+#endif
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
     check_g_pcont_validity();
@@ -963,7 +966,7 @@ extern "C" void Cache_Read_Disable(void);
 extern "C" void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
 
 #ifndef USE_IRAM
-void ICACHE_RAM_ATTR handle_hwdt_icache() {
+static void ICACHE_RAM_ATTR __attribute__((noinline)) handle_hwdt_icache() {
   Cache_Read_Enable(0, 0, ICACHE_SIZE_16);
   handle_hwdt();
   Cache_Read_Disable();
@@ -982,7 +985,7 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     /*
      *  Continuation context is in BSS.
      */
-    g_pcont = &g_cont;
+    g_pcont = get_g_cont();
 #else
     /*
      *  The continuation context is on the stack just after the reserved space

From 65f8e1dc294137abd49631720662b4ce1656d723 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 6 Aug 2020 20:55:03 -0700
Subject: [PATCH 27/35] Made compatible with `disable_extra4k_at_link_time()`
 usage.

Changed to strings containing "no4kextra" to "noextra4k" to be consistant with
original usage.

Updated example to provide indications of which build options were used or resulted.

Some comment cleanup.
---
 boards.txt                                    | 408 +++++++++---------
 .../core_esp8266_app_entry_noextra4k.cpp      |   4 +-
 cores/esp8266/core_esp8266_main.cpp           |   2 +-
 cores/esp8266/hwdt_app_entry.cpp              | 123 ++++--
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  26 +-
 tools/boards.txt.py                           |   2 +-
 6 files changed, 311 insertions(+), 254 deletions(-)

diff --git a/boards.txt b/boards.txt
index f5a67d0c9f..2433b5b6e2 100644
--- a/boards.txt
+++ b/boards.txt
@@ -467,20 +467,20 @@ generic.menu.lvl.MDNS=MDNS
 generic.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 generic.menu.lvl.HWDT=HWDT
 generic.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-generic.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-generic.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+generic.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+generic.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+generic.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+generic.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 generic.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 generic.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 generic.menu.wipe.none=Only Sketch
@@ -808,20 +808,20 @@ esp8285.menu.lvl.MDNS=MDNS
 esp8285.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 esp8285.menu.lvl.HWDT=HWDT
 esp8285.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-esp8285.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-esp8285.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp8285.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+esp8285.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+esp8285.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+esp8285.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp8285.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 esp8285.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 esp8285.menu.wipe.none=Only Sketch
@@ -1018,20 +1018,20 @@ espduino.menu.lvl.MDNS=MDNS
 espduino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espduino.menu.lvl.HWDT=HWDT
 espduino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espduino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espduino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espduino.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espduino.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espduino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espduino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espduino.menu.wipe.none=Only Sketch
@@ -1220,20 +1220,20 @@ huzzah.menu.lvl.MDNS=MDNS
 huzzah.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 huzzah.menu.lvl.HWDT=HWDT
 huzzah.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-huzzah.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-huzzah.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+huzzah.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+huzzah.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+huzzah.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+huzzah.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 huzzah.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 huzzah.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 huzzah.menu.wipe.none=Only Sketch
@@ -1422,20 +1422,20 @@ inventone.menu.lvl.MDNS=MDNS
 inventone.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 inventone.menu.lvl.HWDT=HWDT
 inventone.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-inventone.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-inventone.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+inventone.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+inventone.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+inventone.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+inventone.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 inventone.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 inventone.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 inventone.menu.wipe.none=Only Sketch
@@ -1627,20 +1627,20 @@ cw01.menu.lvl.MDNS=MDNS
 cw01.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 cw01.menu.lvl.HWDT=HWDT
 cw01.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-cw01.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-cw01.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+cw01.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+cw01.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+cw01.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+cw01.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 cw01.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 cw01.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 cw01.menu.wipe.none=Only Sketch
@@ -1832,20 +1832,20 @@ espresso_lite_v1.menu.lvl.MDNS=MDNS
 espresso_lite_v1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espresso_lite_v1.menu.lvl.HWDT=HWDT
 espresso_lite_v1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espresso_lite_v1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espresso_lite_v1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espresso_lite_v1.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espresso_lite_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espresso_lite_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espresso_lite_v1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espresso_lite_v1.menu.wipe.none=Only Sketch
@@ -2037,20 +2037,20 @@ espresso_lite_v2.menu.lvl.MDNS=MDNS
 espresso_lite_v2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espresso_lite_v2.menu.lvl.HWDT=HWDT
 espresso_lite_v2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espresso_lite_v2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espresso_lite_v2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espresso_lite_v2.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espresso_lite_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espresso_lite_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espresso_lite_v2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espresso_lite_v2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espresso_lite_v2.menu.wipe.none=Only Sketch
@@ -2242,20 +2242,20 @@ phoenix_v1.menu.lvl.MDNS=MDNS
 phoenix_v1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 phoenix_v1.menu.lvl.HWDT=HWDT
 phoenix_v1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-phoenix_v1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-phoenix_v1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+phoenix_v1.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+phoenix_v1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+phoenix_v1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 phoenix_v1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 phoenix_v1.menu.wipe.none=Only Sketch
@@ -2447,20 +2447,20 @@ phoenix_v2.menu.lvl.MDNS=MDNS
 phoenix_v2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 phoenix_v2.menu.lvl.HWDT=HWDT
 phoenix_v2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-phoenix_v2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-phoenix_v2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+phoenix_v2.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+phoenix_v2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+phoenix_v2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 phoenix_v2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 phoenix_v2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 phoenix_v2.menu.wipe.none=Only Sketch
@@ -2649,20 +2649,20 @@ nodemcu.menu.lvl.MDNS=MDNS
 nodemcu.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 nodemcu.menu.lvl.HWDT=HWDT
 nodemcu.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-nodemcu.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-nodemcu.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcu.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+nodemcu.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+nodemcu.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+nodemcu.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcu.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 nodemcu.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 nodemcu.menu.wipe.none=Only Sketch
@@ -2855,20 +2855,20 @@ nodemcuv2.menu.lvl.MDNS=MDNS
 nodemcuv2.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 nodemcuv2.menu.lvl.HWDT=HWDT
 nodemcuv2.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-nodemcuv2.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-nodemcuv2.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+nodemcuv2.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+nodemcuv2.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+nodemcuv2.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 nodemcuv2.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 nodemcuv2.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 nodemcuv2.menu.wipe.none=Only Sketch
@@ -3077,20 +3077,20 @@ modwifi.menu.lvl.MDNS=MDNS
 modwifi.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 modwifi.menu.lvl.HWDT=HWDT
 modwifi.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-modwifi.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-modwifi.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+modwifi.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+modwifi.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+modwifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+modwifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 modwifi.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 modwifi.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 modwifi.menu.wipe.none=Only Sketch
@@ -3279,20 +3279,20 @@ thing.menu.lvl.MDNS=MDNS
 thing.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 thing.menu.lvl.HWDT=HWDT
 thing.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-thing.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-thing.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+thing.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+thing.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+thing.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+thing.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 thing.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 thing.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 thing.menu.wipe.none=Only Sketch
@@ -3481,20 +3481,20 @@ thingdev.menu.lvl.MDNS=MDNS
 thingdev.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 thingdev.menu.lvl.HWDT=HWDT
 thingdev.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-thingdev.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-thingdev.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+thingdev.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+thingdev.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+thingdev.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+thingdev.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 thingdev.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 thingdev.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 thingdev.menu.wipe.none=Only Sketch
@@ -3683,20 +3683,20 @@ blynk.menu.lvl.MDNS=MDNS
 blynk.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 blynk.menu.lvl.HWDT=HWDT
 blynk.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-blynk.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-blynk.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+blynk.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+blynk.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+blynk.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+blynk.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 blynk.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 blynk.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 blynk.menu.wipe.none=Only Sketch
@@ -3885,20 +3885,20 @@ esp210.menu.lvl.MDNS=MDNS
 esp210.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 esp210.menu.lvl.HWDT=HWDT
 esp210.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-esp210.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-esp210.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp210.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+esp210.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+esp210.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+esp210.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 esp210.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 esp210.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 esp210.menu.wipe.none=Only Sketch
@@ -4087,20 +4087,20 @@ d1_mini.menu.lvl.MDNS=MDNS
 d1_mini.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 d1_mini.menu.lvl.HWDT=HWDT
 d1_mini.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-d1_mini.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-d1_mini.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+d1_mini.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini.menu.wipe.none=Only Sketch
@@ -4272,20 +4272,20 @@ d1_mini_pro.menu.lvl.MDNS=MDNS
 d1_mini_pro.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 d1_mini_pro.menu.lvl.HWDT=HWDT
 d1_mini_pro.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-d1_mini_pro.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-d1_mini_pro.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+d1_mini_pro.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini_pro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini_pro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_pro.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini_pro.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini_pro.menu.wipe.none=Only Sketch
@@ -4514,20 +4514,20 @@ d1_mini_lite.menu.lvl.MDNS=MDNS
 d1_mini_lite.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 d1_mini_lite.menu.lvl.HWDT=HWDT
 d1_mini_lite.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-d1_mini_lite.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-d1_mini_lite.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+d1_mini_lite.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini_lite.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1_mini_lite.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1_mini_lite.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1_mini_lite.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1_mini_lite.menu.wipe.none=Only Sketch
@@ -4716,20 +4716,20 @@ d1.menu.lvl.MDNS=MDNS
 d1.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 d1.menu.lvl.HWDT=HWDT
 d1.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-d1.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-d1.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+d1.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+d1.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 d1.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 d1.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 d1.menu.wipe.none=Only Sketch
@@ -4921,20 +4921,20 @@ espino.menu.lvl.MDNS=MDNS
 espino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espino.menu.lvl.HWDT=HWDT
 espino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espino.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espino.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espino.menu.wipe.none=Only Sketch
@@ -5123,20 +5123,20 @@ espinotee.menu.lvl.MDNS=MDNS
 espinotee.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espinotee.menu.lvl.HWDT=HWDT
 espinotee.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espinotee.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espinotee.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espinotee.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espinotee.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espinotee.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espinotee.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espinotee.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espinotee.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espinotee.menu.wipe.none=Only Sketch
@@ -5389,20 +5389,20 @@ wifinfo.menu.lvl.MDNS=MDNS
 wifinfo.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 wifinfo.menu.lvl.HWDT=HWDT
 wifinfo.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-wifinfo.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-wifinfo.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifinfo.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+wifinfo.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifinfo.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifinfo.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifinfo.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifinfo.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifinfo.menu.wipe.none=Only Sketch
@@ -5603,20 +5603,20 @@ arduino-esp8266.menu.lvl.MDNS=MDNS
 arduino-esp8266.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 arduino-esp8266.menu.lvl.HWDT=HWDT
 arduino-esp8266.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-arduino-esp8266.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-arduino-esp8266.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+arduino-esp8266.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+arduino-esp8266.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+arduino-esp8266.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 arduino-esp8266.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 arduino-esp8266.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 arduino-esp8266.menu.wipe.none=Only Sketch
@@ -5873,20 +5873,20 @@ gen4iod.menu.lvl.MDNS=MDNS
 gen4iod.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 gen4iod.menu.lvl.HWDT=HWDT
 gen4iod.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-gen4iod.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-gen4iod.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+gen4iod.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+gen4iod.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+gen4iod.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+gen4iod.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 gen4iod.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 gen4iod.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 gen4iod.menu.wipe.none=Only Sketch
@@ -6076,20 +6076,20 @@ oak.menu.lvl.MDNS=MDNS
 oak.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 oak.menu.lvl.HWDT=HWDT
 oak.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-oak.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-oak.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+oak.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+oak.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+oak.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+oak.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 oak.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 oak.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 oak.menu.wipe.none=Only Sketch
@@ -6278,20 +6278,20 @@ wifiduino.menu.lvl.MDNS=MDNS
 wifiduino.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 wifiduino.menu.lvl.HWDT=HWDT
 wifiduino.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-wifiduino.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-wifiduino.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifiduino.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+wifiduino.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifiduino.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifiduino.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifiduino.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifiduino.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifiduino.menu.wipe.none=Only Sketch
@@ -6594,20 +6594,20 @@ wifi_slot.menu.lvl.MDNS=MDNS
 wifi_slot.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 wifi_slot.menu.lvl.HWDT=HWDT
 wifi_slot.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-wifi_slot.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-wifi_slot.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+wifi_slot.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifi_slot.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wifi_slot.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wifi_slot.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wifi_slot.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wifi_slot.menu.wipe.none=Only Sketch
@@ -6796,20 +6796,20 @@ wiolink.menu.lvl.MDNS=MDNS
 wiolink.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 wiolink.menu.lvl.HWDT=HWDT
 wiolink.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-wiolink.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-wiolink.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+wiolink.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+wiolink.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wiolink.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+wiolink.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 wiolink.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 wiolink.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 wiolink.menu.wipe.none=Only Sketch
@@ -6998,20 +6998,20 @@ espectro.menu.lvl.MDNS=MDNS
 espectro.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espectro.menu.lvl.HWDT=HWDT
 espectro.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espectro.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espectro.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espectro.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espectro.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espectro.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espectro.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espectro.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espectro.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espectro.menu.wipe.none=Only Sketch
@@ -7200,20 +7200,20 @@ eduinowifi.menu.lvl.MDNS=MDNS
 eduinowifi.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 eduinowifi.menu.lvl.HWDT=HWDT
 eduinowifi.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-eduinowifi.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-eduinowifi.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+eduinowifi.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+eduinowifi.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+eduinowifi.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 eduinowifi.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 eduinowifi.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 eduinowifi.menu.wipe.none=Only Sketch
@@ -7452,20 +7452,20 @@ sonoff.menu.lvl.MDNS=MDNS
 sonoff.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 sonoff.menu.lvl.HWDT=HWDT
 sonoff.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-sonoff.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-sonoff.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+sonoff.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+sonoff.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+sonoff.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+sonoff.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 sonoff.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 sonoff.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 sonoff.menu.wipe.none=Only Sketch
@@ -7695,20 +7695,20 @@ espmxdevkit.menu.lvl.MDNS=MDNS
 espmxdevkit.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
 espmxdevkit.menu.lvl.HWDT=HWDT
 espmxdevkit.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
-espmxdevkit.menu.lvl.HWDT_NO4KEXTRA=HWDT_NO4KEXTRA
-espmxdevkit.menu.lvl.HWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+espmxdevkit.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espmxdevkit.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
 espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
-espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NO4KEXTRA
-espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NO4KEXTRA.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NO4KEXTRA
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+espmxdevkit.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 espmxdevkit.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 espmxdevkit.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 espmxdevkit.menu.wipe.none=Only Sketch
diff --git a/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp b/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
index d477691400..e2a11b6a52 100644
--- a/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
+++ b/cores/esp8266/core_esp8266_app_entry_noextra4k.cpp
@@ -27,8 +27,8 @@ extern "C" void call_user_start();
 /* this is the default NONOS-SDK user's heap location */
 static cont_t g_cont __attribute__ ((aligned (16)));
 
-#if defined(DEBUG_ESP_HWDT_NO4KEXTRA)
-extern "C" cont_t * ICACHE_RAM_ATTR get_g_cont(void)
+#if defined(DEBUG_ESP_HWDT_NOEXTRA4K) || defined(DEBUG_ESP_HWDT)
+extern "C" cont_t * ICACHE_RAM_ATTR get_noextra4k_g_pcont(void)
 {
     return &g_cont;
 }
diff --git a/cores/esp8266/core_esp8266_main.cpp b/cores/esp8266/core_esp8266_main.cpp
index 67b60d298a..9d52a533bc 100644
--- a/cores/esp8266/core_esp8266_main.cpp
+++ b/cores/esp8266/core_esp8266_main.cpp
@@ -340,7 +340,7 @@ extern "C" void user_init(void) {
 
     cont_init(g_pcont);
 
-#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
+#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NOEXTRA4K)
     debug_hwdt_init();
 #endif
 
diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index aaa08fd559..7f64e07f86 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -36,10 +36,14 @@
  * `app_entry_redefinable()`, and also to the stack pointer passed to the SDK,
  * we can preserve the stack during an HWDT event.
  *
- * To use this tool, select HWDT or HWDT_NO4KEXTRA from the Arduino IDE menu
+ * To use this tool, select HWDT or HWDT_NOEXTRA4K from the Arduino IDE menu
  * "Tools->Debug Level" before building your sketch. Note, 'Tools->Debug port'
  * selection is not needed or referenced for printing the HWDT stack dump.
- * To enable in other build environments, add DEBUG_ESP_HWDT_NO4KEXTRA or
+ * If the sketch is calling `disable_extra4k_at_link_time()`, then building with
+ * HWDT selected on the Arduino IDE menu "Tools->Debug Level", will have the
+ * same result as if built with HWDT_NOEXTRA4K selected.
+ *
+ * To enable in other build environments, add DEBUG_ESP_HWDT_NOEXTRA4K or
  * DEBUG_ESP_HWDT global defines to your build.
  *
  * This tool prints to the serial port at the default serial port speed set by
@@ -109,7 +113,7 @@
 
 
 /*
- * DEBUG_ESP_HWDT_NO4KEXTRA
+ * DEBUG_ESP_HWDT_NOEXTRA4K
  *
  * This option will leave more of the system stack available for the stack dump.
  * A problem we have with the "4K extra" option, is it pushes the system stack
@@ -128,7 +132,7 @@
  * extra 4K in the heap.
  *
  * This option is now managed from the Arduinoo IDE menu 'Tools->Debug Level'
- #define DEBUG_ESP_HWDT_NO4KEXTRA
+ #define DEBUG_ESP_HWDT_NOEXTRA4K
  */
 
 
@@ -244,7 +248,7 @@
 /*                     End of Configuration Options                           */
 /*____________________________________________________________________________*/
 
-#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
+#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NOEXTRA4K)
 
 #include <c_types.h>
 #include "cont.h"
@@ -389,41 +393,66 @@ static_assert(sizeof(hwdt_info_t) == sizeof(LOCAL_HWDT_INFO_T), "Local and inclu
 // Map out who will live where.
 #define ROM_STACK_A16_SZ   (MK_ALIGN16_SZ(DEBUG_ESP_HWDT_ROM_STACK_SIZE))
 #define CONT_STACK_A16_SZ  (MK_ALIGN16_SZ(sizeof(cont_t)))
+/*
+ * For WPS support, cont stack comes out of the user's heap address space.
+ * The the NONOS-SDK stack address is initialized before tbe reserved ROM stack
+ * space. In this configuration there is no extra 4K in the heap.
+ * Memory map: 0x3FFE8000, ..., (CONT_STACK), ..., (SYS), (ROM_STACK), 0x4000000
+ *
+ * sys_stack_first <= ROM_STACK
+ */
 #define ROM_STACK ((uint32_t *) ((uintptr_t)ROM_STACK_FIRST - ROM_STACK_A16_SZ))
 
 
-#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
-/* This is the default NONOS-SDK user's heap location for NO4KEXTRA */
-#define SYS_STACK_FIRST ROM_STACK
-extern cont_t * get_g_cont(void);
-
-#else
 #define CONT_STACK_FIRST ROM_STACK // only for computation
+/*
+ * For extra 4K of heap space, the continuation stack (user's stack) is created
+ * in the SYS stack address space. The NONOS-SDK stack starts before the cont
+ * stack.
+ * Memory map: 0x3FFE8000, ..., (SYS), (CONT_STACK), (ROM_STACK), 0x4000000
+ *
+ * sys_stack_first <= CONT_STACK
+ */
 #define CONT_STACK ((cont_t *)((uintptr_t)CONT_STACK_FIRST - CONT_STACK_A16_SZ))
-#define SYS_STACK_FIRST CONT_STACK
-#endif
+
 
 uint32_t *g_rom_stack  __attribute__((section(".noinit")));
+uint32_t *sys_stack_first  __attribute__((section(".noinit")));
 size_t g_rom_stack_A16_sz  __attribute__((section(".noinit")));
 hwdt_info_t hwdt_info __attribute__((section(".noinit")));
 
 extern "C" {
 
+extern cont_t * get_noextra4k_g_pcont(void);
+
+cont_t * ICACHE_RAM_ATTR get_noextra4k_g_pcont(void) __attribute__((weak));
+cont_t * ICACHE_RAM_ATTR get_noextra4k_g_pcont(void) {
+    return NULL;
+}
+
+static void IRAM_MAYBE set__sys_stack_first(void) {
+  if (get_noextra4k_g_pcont()) {
+    sys_stack_first = ROM_STACK;
+  } else {
+    sys_stack_first = (uint32_t *)CONT_STACK;
+  }
+}
+
 #if USE_IRAM
 #define ETS_PRINTF ets_uart_printf
 
 #else
 /*
- This function is already in umm_malloc for some debug options.
- Define here in case they are not enabled.
-*/
+ * This function is already in umm_malloc for some debug options.
+ * Define here in case they are not enabled.
+ */
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) __attribute__((weak));
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
     /*
-      To use ets_strlen() and ets_strcpy() safely with PROGMEM, flash storage,
-      the PROGMEM address must be word (4 bytes) aligned. The destination
-      address for ets_memcpy must also be word-aligned.
-    */
+     * To use ets_strlen() and ets_strcpy() safely with PROGMEM, flash storage,
+     * the PROGMEM address must be word (4 bytes) aligned. The destination
+     * address for ets_memcpy must also be word-aligned.
+     */
     char ram_buf[ets_strlen(fmt) + 1] __attribute__((aligned(4)));
     ets_strcpy(ram_buf, fmt);
     va_list argPtr;
@@ -510,13 +539,10 @@ STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
      * Testing of vital pointers for validity could also aid as a partial
      * indicator of power-on. Not needed for that purpose at this time.
      */
+    cont_t *noextra4k_g_pcont = get_noextra4k_g_pcont();
     if (g_rom_stack == ROM_STACK &&
         g_rom_stack_A16_sz == ROM_STACK_A16_SZ &&
-#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
-        g_pcont == get_g_cont()
-#else
-        g_pcont == CONT_STACK
-#endif
+        g_pcont == ((noextra4k_g_pcont) ? noextra4k_g_pcont : CONT_STACK)
         ) {
             hwdt_info.g_pcont_valid = true;
     } else {
@@ -808,9 +834,10 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
  */
 STATIC void IRAM_MAYBE handle_hwdt(void)  __attribute__((used));
 STATIC void IRAM_MAYBE handle_hwdt(void) {
-#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
+#ifdef DEBUG_ESP_HWDT_NOEXTRA4K
     disable_extra4k_at_link_time();
 #endif
+    set__sys_stack_first();
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
     check_g_pcont_validity();
@@ -868,10 +895,14 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
         }
         hwdt_info.cont_integrity = cont_integrity;
 
-#if defined(DEBUG_ESP_HWDT_NO4KEXTRA) || defined(DEBUG_ESP_HWDT_INFO)
-        const uint32_t *ctx_cont_ptr = skip_stackguard(g_pcont->stack, g_pcont->stack_end, CONT_STACKGUARD);
-        hwdt_info.cont = (uintptr_t)g_pcont->stack_end - (uintptr_t)ctx_cont_ptr;
+        const uint32_t *ctx_cont_ptr = NULL;
+#if !defined(DEBUG_ESP_HWDT_INFO)
+        if (get_noextra4k_g_pcont())
 #endif
+        {
+            ctx_cont_ptr = skip_stackguard(g_pcont->stack, g_pcont->stack_end, CONT_STACKGUARD);
+            hwdt_info.cont = (uintptr_t)g_pcont->stack_end - (uintptr_t)ctx_cont_ptr;
+        }
 
         const uint32_t *ctx_sys_ptr = skip_stackguard(SYS_STACK, ROM_STACK, CONT_STACKGUARD);
         hwdt_info.sys = (uintptr_t)ROM_STACK - (uintptr_t)ctx_sys_ptr;
@@ -897,10 +928,11 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
             /* Print context SYS */
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)ROM_STACK, PRINT_STACK::SYS);
 
-#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
-            /* Print separate ctx: cont stack */
-            print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
-#endif
+            if (get_noextra4k_g_pcont()) {
+                /* Print separate ctx: cont stack */
+                print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
+            }
+
             if (hwdt_info.cont_integrity) {
                 ETS_PRINTF("\nCaution, the stack is possibly corrupt integrity checks did not pass.\n\n");
             }
@@ -981,19 +1013,20 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     handle_hwdt_icache();
 #endif
 
-#ifdef DEBUG_ESP_HWDT_NO4KEXTRA
     /*
      *  Continuation context is in BSS.
      */
-    g_pcont = get_g_cont();
-#else
-    /*
-     *  The continuation context is on the stack just after the reserved space
-     *  for the ROM/eboot stack and before the SYS stack begins.
-     *  All computations were done at top, save pointer to it now.
-     */
-    g_pcont = CONT_STACK;
-#endif
+    g_pcont = get_noextra4k_g_pcont();
+
+    if (!g_pcont) {
+        /*
+         *  The continuation context is on the stack just after the reserved
+         *  space for the ROM/eboot stack and before the SYS stack begins. All
+         *  computations were done at top, save pointer to it now.
+         */
+        g_pcont = CONT_STACK;
+    }
+
     /*
      *  Use new calculated SYS stack from top.
      *  Call the entry point of the SDK code.
@@ -1001,7 +1034,7 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
     asm volatile ("mov.n a1, %0\n\t"
                   "movi a0, 0x4000044c\n\t"     /* Should never return; however, set return to Boot ROM Breakpoint */
                   "jx %1\n\t" ::
-                  "r" (SYS_STACK_FIRST), "r" (call_user_start):
+                  "r" (sys_stack_first), "r" (call_user_start):
                   "a0", "memory");
 
     __builtin_unreachable();
@@ -1053,4 +1086,4 @@ void debug_hwdt_init(void) {
 
 };
 
-#endif // end of #if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NO4KEXTRA)
+#endif // end of #if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NOEXTRA4K)
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 71de487456..739513e2c1 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -2,7 +2,7 @@
 
    There is a tool to print a stack dump at boot after a Hardware WDT
    reset. To use the Hardware WDT Reset stack dump tool, you can select HWDT or
-   HWDT_NO4KEXTRA from the Arduino IDE menu "Tools->Debug Level" before
+   HWDT_NOEXTRA4K from the Arduino IDE menu "Tools->Debug Level" before
    building your sketch. Note, 'Tools->Debug port' selection is not needed or
    referenced for printing the HWDT stack dump.
 
@@ -19,6 +19,7 @@
 #include <ESP8266WiFi.h>
 #include <Esp.h>
 #include <user_interface.h>
+#include <coredecls.h> // g_pcont - only needed for this debug demo
 
 void setup(void) {
   WiFi.persistent(false); // w/o this a flash write occurs at every boot
@@ -27,6 +28,29 @@ void setup(void) {
   delay(20);    // This delay helps when using the 'Modified Serial monitor' otherwise it is not needed.
   Serial.println();
   Serial.println();
+
+// #define DEMO_NOEXTRA4K
+#ifdef DEMO_NOEXTRA4K
+    /*
+      When a call to disable_extra4k_at_link_time() is made, building with HWDT
+      selected on the Arduino IDE menu "Tools->Debug Level", will have the same
+      result as if built with HWDT_NOEXTRA4K selected.
+    */
+    disable_extra4k_at_link_time();
+#endif
+
+  Serial.printf_P(PSTR("This example was built with%s an extra 4K of heap space (g_pcont == 0x%08lX)\r\n"),
+                  ((uintptr_t)0x3FFFC000 < (uintptr_t)g_pcont) ? "" : "out",
+                  (uintptr_t)g_pcont);
+#if defined(DEBUG_ESP_HWDT) || defined(DEBUG_ESP_HWDT_NOEXTRA4K)
+  Serial.print(F("and with the HWDT"));
+#if defined(DEBUG_ESP_HWDT_NOEXTRA4K)
+  Serial.print(F("_NOEXTRA4K"));
+#endif
+  Serial.println(F(" option specified."));
+#endif
+
+  Serial.println();
   Serial.println(F("The Hardware Watchdog Timer Demo is now available for crashing ..."));
   Serial.println();
   processKey(Serial, '?');
diff --git a/tools/boards.txt.py b/tools/boards.txt.py
index 5b4cd28c6c..51e460909b 100755
--- a/tools/boards.txt.py
+++ b/tools/boards.txt.py
@@ -1243,7 +1243,7 @@ def comb1 (lst, lstplusone):
 def all_debug ():
     listcomb = [ 'SSL', 'TLS_MEM', 'HTTP_CLIENT', 'HTTP_SERVER' ]
     listnocomb = [ 'CORE', 'WIFI', 'HTTP_UPDATE', 'UPDATER', 'OTA', 'OOM', 'MDNS' ]
-    listplusone = [ 'HWDT', 'HWDT_NO4KEXTRA' ]
+    listplusone = [ 'HWDT', 'HWDT_NOEXTRA4K' ]
     listsingle = [ 'NoAssert-NDEBUG' ]
     options = combn(listcomb)
     options += comb1(listnocomb, listplusone)

From c31a354f8a881cb8568e1c94aacee489d8876688 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 6 Aug 2020 21:16:29 -0700
Subject: [PATCH 28/35] CI style

---
 .../examples/HwdtStackDump/HwdtStackDump.ino       | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index 739513e2c1..b77a235251 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -29,14 +29,14 @@ void setup(void) {
   Serial.println();
   Serial.println();
 
-// #define DEMO_NOEXTRA4K
+  // #define DEMO_NOEXTRA4K
 #ifdef DEMO_NOEXTRA4K
-    /*
-      When a call to disable_extra4k_at_link_time() is made, building with HWDT
-      selected on the Arduino IDE menu "Tools->Debug Level", will have the same
-      result as if built with HWDT_NOEXTRA4K selected.
-    */
-    disable_extra4k_at_link_time();
+  /*
+    When a call to disable_extra4k_at_link_time() is made, building with HWDT
+    selected on the Arduino IDE menu "Tools->Debug Level", will have the same
+    result as if built with HWDT_NOEXTRA4K selected.
+  */
+  disable_extra4k_at_link_time();
 #endif
 
   Serial.printf_P(PSTR("This example was built with%s an extra 4K of heap space (g_pcont == 0x%08lX)\r\n"),

From b080d333dcfb582ec30d3dfad17802702ba1e4e6 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Thu, 1 Oct 2020 15:28:09 -0700
Subject: [PATCH 29/35] Adjusted down the ROM Stack space for the extra 4K Heap
 option. If too large, a really bad crashes occurs.

Updated the example to start WiFi. This helps double check ROM
Stack space size is not too small at start.

Removed stale comment.

Changed cont stack check functions to make globally available.
---
 cores/esp8266/hwdt_app_entry.cpp              | 212 +++++++++++++++---
 cores/esp8266/hwdt_app_entry.h                |   1 -
 .../examples/HwdtStackDump/HwdtStackDump.ino  |  19 ++
 3 files changed, 195 insertions(+), 37 deletions(-)

diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index 7f64e07f86..ca509768c2 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -39,9 +39,6 @@
  * To use this tool, select HWDT or HWDT_NOEXTRA4K from the Arduino IDE menu
  * "Tools->Debug Level" before building your sketch. Note, 'Tools->Debug port'
  * selection is not needed or referenced for printing the HWDT stack dump.
- * If the sketch is calling `disable_extra4k_at_link_time()`, then building with
- * HWDT selected on the Arduino IDE menu "Tools->Debug Level", will have the
- * same result as if built with HWDT_NOEXTRA4K selected.
  *
  * To enable in other build environments, add DEBUG_ESP_HWDT_NOEXTRA4K or
  * DEBUG_ESP_HWDT global defines to your build.
@@ -107,7 +104,7 @@
  *
  * Enables this debug tool for printing a Hardware WDT stack dump at restart.
  *
- * This option is now managed from the Arduinoo IDE menu 'Tools->Debug Level'
+ * This option is now managed from the Arduino IDE menu 'Tools->Debug Level'
  #define DEBUG_ESP_HWDT
  */
 
@@ -197,12 +194,29 @@
  *   2) this stack dump code
  *   3) SDK, Core, and Sketch
  *
- * With this, we can recover a complete stack trace of our failed sketch. To be
+ * ~With this, we can recover a complete stack trace of our failed sketch. To be
  * safe, I am leaving this at 1024; however, I think there is room to lower it
- * without loss of information.
+ * without loss of information.~
+ *
+ * Edited: 1024 is not safe for the "extra 4K of heap" case. This case now uses
+ * 720 bytes. Really bad crashes happend with the 1024 and the "extra 4K of
+ * heap" case. This is so tight. I am a concerned about the robustness of using
+ * this option, "extra 4K of heap" and Debug Level: HWDT.
+ *
+ * If or when eboot.elf uses more than 720 there will be a  little over-writing
+ * of the cont stack that we report. (When retesting, 752 was the max I got away
+ * with crashing the SYS stack.)
+ *
+ * If possible, use the no-extra 4K heap option. This is the optimum choice for
+ * debugging HWDT crashes.
+ *
  */
 #ifndef DEBUG_ESP_HWDT_ROM_STACK_SIZE
-#define DEBUG_ESP_HWDT_ROM_STACK_SIZE (1024)
+  #ifdef DEBUG_ESP_HWDT_NOEXTRA4K
+    #define DEBUG_ESP_HWDT_ROM_STACK_SIZE (1024UL)
+  #else
+    #define DEBUG_ESP_HWDT_ROM_STACK_SIZE (720UL)
+  #endif
 #endif
 
 
@@ -342,7 +356,6 @@ typedef struct hwdt_info_ {
     bool g_pcont_valid;
 } hwdt_info_t;
 
-void enable_debug_hwdt_at_link_time(void);
 extern "C" void debug_hwdt_init(void);
 
 extern uint32_t *g_rom_stack;
@@ -531,7 +544,7 @@ STATIC const uint32_t * IRAM_MAYBE skip_stackguard(const uint32_t *start, const
     return uptr;
 }
 
-STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
+bool IRAM_MAYBE hwdt_check_g_pcont_validity(void) {
     /*
      * DRAM appears to remain valid after most resets. There is more on this in
      * handle_hwdt().
@@ -550,6 +563,7 @@ STATIC void IRAM_MAYBE check_g_pcont_validity(void) {
         g_rom_stack = ROM_STACK;
         g_rom_stack_A16_sz = ROM_STACK_A16_SZ;
     }
+    return hwdt_info.g_pcont_valid;
 }
 
 #if defined(DEBUG_ESP_HWDT_DEV_DEBUG) || defined(DEBUG_ESP_HWDT_DEV_DEBUG_RESET_REASON)
@@ -740,7 +754,8 @@ STATIC uint32_t IRAM_MAYBE get_reset_reason(bool* power_on, bool* hwdt_reset) {
 #define ROM_uart_div_modify         0x400039d8
 #endif
 typedef void (*fp_uart_div_modify_t)(uint32_t uart_no, uint32 DivLatchValue);
-constexpr fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_uart_div_modify;
+// const fp_uart_div_modify_t real_uart_div_modify = (fp_uart_div_modify_t)ROM_uart_div_modify;
+#define real_uart_div_modify ((fp_uart_div_modify_t)ROM_uart_div_modify)
 
 #define UART_CLKDIV_MASK 0x000FFFFFUL
 
@@ -827,10 +842,35 @@ STATIC uint32_t IRAM_MAYBE set_uart_speed(const uint32_t uart_no, const uint32_t
 #endif
 
 /*
+ * When g_pcont is valid, we expect these checks to be valid. I am not sure
+ * what to do when they are not. An error that could lead to a crash is
+ * corrected. We currently continue and print the stack dump. This assumes
+ * something is better than nothing.
  *
- *
- *
- *
+ * Make global so postmortem can take advange of this check.
+ */
+uint32_t IRAM_MAYBE hwdt_cont_integrity_check() {
+    uint32_t cont_integrity = 0;
+    if (g_pcont->stack_guard1 != CONT_STACKGUARD) {
+      cont_integrity |= 0x0001;
+    }
+    if (g_pcont->stack_guard2 != CONT_STACKGUARD) {
+      cont_integrity |= 0x0020;
+    }
+    if (g_pcont->stack_end != (g_pcont->stack + (sizeof(g_pcont->stack) / 4))) {
+      cont_integrity |= 0x0300;
+      // Fix ending so we don't crash
+      g_pcont->stack_end = (g_pcont->stack + (sizeof(g_pcont->stack) / 4));
+    }
+    if (g_pcont->struct_start != (unsigned*)g_pcont) {
+      cont_integrity |= 0x4000;
+      g_pcont->struct_start = (unsigned*)g_pcont;
+    }
+    hwdt_info.cont_integrity = cont_integrity;
+    return cont_integrity;
+}
+/*
+ * Determine if we have a HWDT reboot and dump stack traces if so.
  */
 STATIC void IRAM_MAYBE handle_hwdt(void)  __attribute__((used));
 STATIC void IRAM_MAYBE handle_hwdt(void) {
@@ -840,7 +880,7 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
     set__sys_stack_first();
 
     ets_memset(&hwdt_info, 0, sizeof(hwdt_info));
-    check_g_pcont_validity();
+    hwdt_check_g_pcont_validity();
 
     bool power_on = false;
     bool hwdt_reset = false;
@@ -872,28 +912,11 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
      *   3) deep sleep
      * Additionally, g_pcont is expected to be invalid after these events.
      *
-     * When g_pcont is valid, we expect these checks to be valid. I am not sure
-     * what to do when they are not. An error that could lead to a crash is
-     * corrected. We currently continue and print the stack dump. This assumes
-     * something is better than nothing.
      */
     if (!power_on && hwdt_info.g_pcont_valid) {
-        uint32_t cont_integrity = 0;
-        if (g_pcont->stack_guard1 != CONT_STACKGUARD) {
-          cont_integrity |= 0x0001;
-        }
-        if (g_pcont->stack_guard2 != CONT_STACKGUARD) {
-          cont_integrity |= 0x0020;
-        }
-        if (g_pcont->stack_end != (g_pcont->stack + (sizeof(g_pcont->stack) / 4))) {
-          cont_integrity |= 0x0300;
-          // Fix ending so we don't crash
-          g_pcont->stack_end = (g_pcont->stack + (sizeof(g_pcont->stack) / 4));
-        }
-        if (g_pcont->struct_start != (unsigned*) g_pcont) {
-          cont_integrity |= 0x4000;
-        }
-        hwdt_info.cont_integrity = cont_integrity;
+        // Checks and fixes incorrect cont_t structure values that might
+        // otherwise cause us to crash.
+        hwdt_cont_integrity_check();
 
         const uint32_t *ctx_cont_ptr = NULL;
 #if !defined(DEBUG_ESP_HWDT_INFO)
@@ -998,13 +1021,126 @@ extern "C" void Cache_Read_Disable(void);
 extern "C" void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
 
 #ifndef USE_IRAM
-static void ICACHE_RAM_ATTR __attribute__((noinline)) handle_hwdt_icache() {
+static void ICACHE_RAM_ATTR __attribute__((noinline)) handle_hwdt_icache() __attribute__((used));
+void handle_hwdt_icache() {
   Cache_Read_Enable(0, 0, ICACHE_SIZE_16);
   handle_hwdt();
   Cache_Read_Disable();
 }
+#endif // USE_IRAM
+
+
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) && !defined(USE_IRAM)
+static void printSanityCheck() {
+  ETS_PRINTF("\n\nsys_stack_first:         %p\n", sys_stack_first);
+  ETS_PRINTF(    "CONT_STACK:              %p\n", CONT_STACK);
+  ETS_PRINTF(    "g_pcont:                 %p\n", g_pcont);
+  ETS_PRINTF(    "ROM_STACK:               %p\n", ROM_STACK);
+  ETS_PRINTF(    "get_noextra4k_g_pcont(): %p\n", get_noextra4k_g_pcont());
+  ETS_PRINTF(    "g_rom_stack:             %p\n", g_rom_stack);
+  ETS_PRINTF(    "g_rom_stack_A16_sz:      0x%08X\n\n", g_rom_stack_A16_sz);
+}
+
+static void ICACHE_RAM_ATTR __attribute__((noinline)) print_sanity_check_icache(void) __attribute__((used));
+void print_sanity_check_icache(void) {
+  Cache_Read_Enable(0, 0, ICACHE_SIZE_16);
+#ifdef DEBUG_ESP_HWDT_UART_SPEED
+  const uint32_t uart_divisor = set_uart_speed(0, DEBUG_ESP_HWDT_UART_SPEED);
+#endif
+  printSanityCheck();
+#ifdef DEBUG_ESP_HWDT_UART_SPEED
+  if (uart_divisor) {
+      adjust_uart_speed(uart_divisor);
+  }
+#endif
+  Cache_Read_Disable();
+}
+#endif //DEBUG_ESP_HWDT_DEV_DEBUG
+
+
+#if 1
+/*
+  An asm function alternative to the function with inline asm at the #else. I
+  find the inline asm requires constant inspection to verify that the compiler
+  optimizer does not clobber needed registers, after small changes in code or
+  compiler updates. Hints to the compiler don't always work for me. Last I
+  checked, the inline version below was working.
+*/
+cont_t *hwdt_app_entry__cont_stack __attribute__((used)) = CONT_STACK;
+
+asm  (
+    ".section        .iram.text.hwdt_app_entry.cpp,\"ax\",@progbits\n\t"
+    ".literal_position\n\t"
+    ".literal .g_pcont, g_pcont\n\t"
+    ".literal .pcont_stack, hwdt_app_entry__cont_stack\n\t"
+    ".literal .sys_stack_first, sys_stack_first\n\t"
+    ".literal .call_user_start, call_user_start\n\t"
+    ".literal .get_noextra4k_g_pcont, get_noextra4k_g_pcont\n\t"
+    ".align  4\n\t"
+    ".global app_entry_redefinable\n\t"
+    ".type   app_entry_redefinable, @function\n\t"
+    "\n"
+"app_entry_redefinable:\n\t"
+    /*
+     * There are 4 sections of code that share the stack starting near
+     * 0x40000000.
+     *   1) The Boot ROM (uses around 640 bytes)
+     *   2) The Bootloader, eboot.elf (last seen using 720 bytes.)
+     *   3) `app_entry_redefinable()` just before it starts the SDK.
+     *   4) The NONOS SDK, optionally the Core when the extra 4K option is
+     *      selected.
+     *
+     * Use the ROM BSS zeroed out memory as the home for our temporary stack.
+     * This way no additional information will be lost. That will remove this
+     * tool from the list of possible concerns for stack overwrite.
+     *
+     */
+    "movi    a1, 0x3fffeb30\n\t"
+#ifdef USE_IRAM
+    "call0   handle_hwdt\n\t"
+#else
+    "call0   handle_hwdt_icache\n\t"
 #endif
+    /*
+     *  Use new calculated SYS stack from top.
+     *  Call the entry point of the SDK code.
+     */
+    "l32r    a2, .sys_stack_first\n\t"
+    /*
+     * Stack cases:
+     *
+     *  1) Continuation context is in BSS. (noextra4k)
+     *     g_pcont = get_noextra4k_g_pcont(); was &g_cont;
+     *
+     *  2) The continuation context is on the stack just after the reserved
+     *     space for the ROM/eboot stack and before the SYS stack begins.
+     *     All computations were done at top, save pointer to it now.
+     *     g_pcont = CONT_STACK;
+     */
+    "l32r    a13, .pcont_stack\n\t"
+    "l32r     a0, .get_noextra4k_g_pcont\n\t"
+    "l32r    a14, .g_pcont\n\t"
+    "l32i.n   a1,  a2, 0\n\t"          // delayed load for pipeline
+    "l32i.n  a13, a13, 0\n\t"
+    "callx0   a0\n\t"
+    "moveqz   a2, a13, a2\n\t"
+    "s32i.n   a2, a14, 0\n\t"
+
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) && !defined(USE_IRAM)
+    "call0    print_sanity_check_icache\n\t"
+#endif
+
+    "movi     a2, 0x3FFFE000\n\t" // ROM BSS Area
+    "movi     a3, 0x0b30\n\t"     // ROM BSS Size
+    "call0    ets_bzero\n\t"
 
+    "l32r     a3, .call_user_start\n\t"
+    "movi     a0, 0x4000044c\n\t"
+    "jx       a3\n\t"
+    ".size app_entry_redefinable, .-app_entry_redefinable\n\t"
+);
+
+#else
 void ICACHE_RAM_ATTR app_entry_start(void) {
 
 #ifdef USE_IRAM
@@ -1026,7 +1162,9 @@ void ICACHE_RAM_ATTR app_entry_start(void) {
          */
         g_pcont = CONT_STACK;
     }
-
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) && !defined(USE_IRAM)
+    print_sanity_check_icache();
+#endif
     /*
      *  Use new calculated SYS stack from top.
      *  Call the entry point of the SDK code.
@@ -1066,6 +1204,7 @@ void ICACHE_RAM_ATTR app_entry_redefinable(void) {
 
     __builtin_unreachable();
 }
+#endif
 
 #if defined(DEBUG_ESP_HWDT_INFO) || defined(ROM_STACK_DUMP)
 void debug_hwdt_init(void) {
@@ -1079,6 +1218,7 @@ void debug_hwdt_init(void) {
         g_rom_stack[i] = CONT_STACKGUARD;
     }
 }
+
 #else
 void debug_hwdt_init(void) {
 }
diff --git a/cores/esp8266/hwdt_app_entry.h b/cores/esp8266/hwdt_app_entry.h
index deeddcdf98..12861527ea 100644
--- a/cores/esp8266/hwdt_app_entry.h
+++ b/cores/esp8266/hwdt_app_entry.h
@@ -13,7 +13,6 @@ typedef struct hwdt_info_ {
     bool g_pcont_valid;
 } hwdt_info_t;
 
-void enable_debug_hwdt_at_link_time(void);
 extern "C" void debug_hwdt_init(void);
 
 extern uint32_t *g_rom_stack;
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index b77a235251..b13947a9da 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -21,6 +21,14 @@
 #include <user_interface.h>
 #include <coredecls.h> // g_pcont - only needed for this debug demo
 
+#ifndef STASSID
+#define STASSID "your-ssid"
+#define STAPSK  "your-password"
+#endif
+
+const char* ssid = STASSID;
+const char* password = STAPSK;
+
 void setup(void) {
   WiFi.persistent(false); // w/o this a flash write occurs at every boot
   WiFi.mode(WIFI_OFF);
@@ -28,6 +36,17 @@ void setup(void) {
   delay(20);    // This delay helps when using the 'Modified Serial monitor' otherwise it is not needed.
   Serial.println();
   Serial.println();
+  Serial.println(F("The Hardware Watchdog Timer Demo is starting ..."));
+  Serial.println();
+
+  // We don't need this for this example; however, starting WiFi uses a little
+  // more of the SYS stack and during development a crash serves as a quick
+  // indicator that DEBUG_ESP_HWDT_ROM_STACK_SIZE was set too high. This is not
+  // something you need to be concerned about.
+  WiFi.mode(WIFI_STA);
+  WiFi.begin(ssid, password);
+  Serial.println(F("A WiFi connection attmpt has been started."));
+  Serial.println();
 
   // #define DEMO_NOEXTRA4K
 #ifdef DEMO_NOEXTRA4K

From fd1131d718d67a602011938867adca4840c80536 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sat, 17 Oct 2020 14:48:54 -0700
Subject: [PATCH 30/35] Add replacement aes_unwrap for the debug HWDT option.
 Improves the SYS stack space available when using the extra 4K Heap option in
 conjunction with HWDT. Replaces the ROM AES buffer at 0x3FFFEA80 with one
 provided by malloc().

---
 cores/esp8266/aes_unwrap.cpp                  | 152 ++++++++++++++++++
 cores/esp8266/hwdt_app_entry.cpp              |  31 ++--
 .../examples/HwdtStackDump/HwdtStackDump.ino  |   4 +-
 3 files changed, 170 insertions(+), 17 deletions(-)
 create mode 100644 cores/esp8266/aes_unwrap.cpp

diff --git a/cores/esp8266/aes_unwrap.cpp b/cores/esp8266/aes_unwrap.cpp
new file mode 100644
index 0000000000..49ec89fe59
--- /dev/null
+++ b/cores/esp8266/aes_unwrap.cpp
@@ -0,0 +1,152 @@
+/*
+ *  Replacement for the ROM aes_unwrap() function. It uses the heap instead of
+ *  the static DRAM address at 0x3FFFEA80, which may step on the SYS stack in
+ *  special circumstances such as HWDT Stack Dump.
+ *
+ *  When not using WPS, the address space 0x3FFFE000 up to 0x40000000 is mostly
+ *  available for the stacks. The one known exception is the ROM AES APIs. When
+ *  `aes_decrypt_init` is called, it uses memory at 0x3FFFEA80 up to 0x3FFFEB30
+ *  for a buffer. At the finish, `aes_decrypt_deinit` zeros out the buffer.
+ *
+ *  The NONOS SDK appears to have replacements for most of the ROM's AES APIs.
+ *  However, the SDK still calls on the ROM's aes_unwrap function, which uses
+ *  the ROM's AES APIs to operate. These calls can overwrite some of the stack
+ *  space. To resolve the problem, this module replaces `aes_unwrap`.
+ *
+ *  Final note, as far as I can tell, this is not a problem when using the extra
+ *  4K heap option without debug HWDT. It is when combined with the HWDT Stack
+ *  Dump that a problem shows. This combination pushes up the stacks to create a
+ *  Boot ROM stack space. Then the problem shows.
+ */
+
+#if (!defined(DEBUG_ESP_HWDT_NOEXTRA4K) && defined(DEBUG_ESP_HWDT)) || REPLACE_ROM_AES_UNWRAP
+#include "umm_malloc/umm_malloc.h"
+
+extern "C" {
+
+// This function is in the Boot ROM
+void rijndaelKeySetupDec(u32 rk[], const u8 cipherKey[]);
+
+// This replaces the Boot ROM version just for this module
+static void *aes_decrypt_init(const u8 *key, size_t len) {
+  if (16u != len) {
+    return 0;
+  }
+  u32 *rk = (u32 *)malloc(16*11);
+  // u32 *rk = (u32 *)0x3FFFEA80u;    // This is what the ROM would have used.
+  if (rk) {
+    rijndaelKeySetupDec(rk, key);
+  }
+  return (void *)rk;
+}
+
+// This replaces the Boot ROM version just for this module
+static void aes_decrypt_deinit(void *ctx) {
+  if (ctx) {
+    ets_memset(ctx, 0, 16*11);
+    if ((uint32_t)ctx != 0x3FFFEA80ul) {
+      free(ctx);
+    }
+  }
+  return;
+}
+
+/*
+ * The NONOS SDK has an override on this function. To replace the aes_wrap
+ * without changing its behavior too much. We need access to the ROM version of
+ * the AES APIs to make our aes_unwrap functionally equal to the current
+ * environment except for the AES Buffer.
+ */
+#ifndef ROM_aes_decrypt
+#define ROM_aes_decrypt         0x400092d4
+#endif
+
+typedef void  (*fp_aes_decrypt_t)(void *ctx, const u8 *crypt, u8 *plain);
+#define AES_DECRYPT (reinterpret_cast<fp_aes_decrypt_t>(ROM_aes_decrypt))
+
+///////////////////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////////////////
+///////////////////////////////////////////////////////////////////////////////
+/*
+ * This aes_unwrap() function overrides/replaces the Boot ROM version.
+ *
+ * It was adapted from aes_unwrap() found in the ESP8266 RTOS SDK
+ *   .../components/wap_supplicant/src/crypto/aes-unwrap.c
+ *
+ */
+///////////////////////////////////////////////////////////////////////////////
+/*
+ * AES key unwrap (128-bit KEK, RFC3394)
+ *
+ * Copyright (c) 2003-2007, Jouni Malinen <j@w1.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Alternatively, this software may be distributed under the terms of BSD
+ * license.
+ *
+ * See README and COPYING for more details.
+ */
+
+/**  based on RTOS SDK
+ * aes_unwrap - Unwrap key with AES Key Wrap Algorithm (128-bit KEK) (RFC3394)
+ * @kek: Key encryption key (KEK)
+ * @n: Length of the plaintext key in 64-bit units; e.g., 2 = 128-bit = 16
+ * bytes
+ * @cipher: Wrapped key to be unwrapped, (n + 1) * 64 bits
+ * @plain: Plaintext key, n * 64 bits
+ * Returns: 0 on success, -1 on failure (e.g., integrity verification failed)
+ */
+int aes_unwrap(const u8 *kek, int n, const u8 *cipher, u8 *plain)
+{
+	u8 a[8], *r, b[16];
+	int i, j;
+	void *ctx;
+
+	/* 1) Initialize variables. */
+	ets_memcpy(a, cipher, 8);
+	r = plain;
+	ets_memcpy(r, cipher + 8, 8 * n);
+
+	ctx = aes_decrypt_init(kek, 16);
+	if (ctx == NULL)
+		return -1;
+
+	/* 2) Compute intermediate values.
+	 * For j = 5 to 0
+	 *     For i = n to 1
+	 *         B = AES-1(K, (A ^ t) | R[i]) where t = n*j+i
+	 *         A = MSB(64, B)
+	 *         R[i] = LSB(64, B)
+	 */
+	for (j = 5; j >= 0; j--) {
+		r = plain + (n - 1) * 8;
+		for (i = n; i >= 1; i--) {
+			ets_memcpy(b, a, 8);
+			b[7] ^= n * j + i;
+
+			ets_memcpy(b + 8, r, 8);
+			AES_DECRYPT(ctx, b, b);
+			ets_memcpy(a, b, 8);
+			ets_memcpy(r, b + 8, 8);
+			r -= 8;
+		}
+	}
+	aes_decrypt_deinit(ctx);
+
+	/* 3) Output results.
+	 *
+	 * These are already in @plain due to the location of temporary
+	 * variables. Just verify that the IV matches with the expected value.
+	 */
+	for (i = 0; i < 8; i++) {
+		if (a[i] != 0xa6)
+			return -1;
+	}
+
+	return 0;
+}
+};
+#endif
diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index ca509768c2..bbe699b20d 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -70,13 +70,18 @@
  * your way up. At this time, I have not had a lot of practice using this tool.
  * TODO: Update description with more details when available.
  *
+ * SYS Stack Issue with Extra 4K Heap option:
+ *     During WiFi Connect, Reconnect, and about every hour a block of memory
+ *     0x3FFFEA80 - 0x3FFFEB30 (176 bytes) is zeroed by the Boot ROM function
+ *     aes_decrypt_init. All other painted memory in the area was untouched
+ *     after starting WiFi. See `core/esp8266/aes_unwrap.cpp` for more details.
  *
  *
  * Possible Issues/Thoughts/Improvements:
  *
  * On reboot after an OTA download, eboot requires a lot of stack and DRAM
- * space. For routine loads from flash, the stack and DRAM usage are small,
- * leaving us valid data to print a stack dump.
+ * space. On the other hand, for routine loads from flash, the stack and DRAM
+ * usage is small, leaving us valid data to print a stack dump.
  *
  * If a problem should arise with some data elements being corrupted during
  * reboot, would it be possible to move their DRAM location higher in memory?
@@ -194,21 +199,19 @@
  *   2) this stack dump code
  *   3) SDK, Core, and Sketch
  *
- * ~With this, we can recover a complete stack trace of our failed sketch. To be
- * safe, I am leaving this at 1024; however, I think there is room to lower it
- * without loss of information.~
+ * For the "NO extra 4K Heap" case, we use a ROM stack size of 1024. However,
+ * without `aes_unwrap.cpp`, 1024 is not safe for the "extra 4K of heap" case.
+ * Bad crashes happen with the 1024 and the "extra 4K of Heap". For now, leave
+ * this case with 720 bytes for ROM Stack since it also gives more SYS stack for
+ * dumping. See comment in aes_unwrap.cpp for AES buffer clash with SYS stack
+ * space description.
  *
- * Edited: 1024 is not safe for the "extra 4K of heap" case. This case now uses
- * 720 bytes. Really bad crashes happend with the 1024 and the "extra 4K of
- * heap" case. This is so tight. I am a concerned about the robustness of using
- * this option, "extra 4K of heap" and Debug Level: HWDT.
- *
- * If or when eboot.elf uses more than 720 there will be a  little over-writing
- * of the cont stack that we report. (When retesting, 752 was the max I got away
- * with crashing the SYS stack.)
+ * If or when eboot.elf uses more than 720 there will be a little over-writing
+ * of the cont stack that we report. Then 720 can be increased as long as the
+ * replacement aes_unwrap is used.
  *
  * If possible, use the no-extra 4K heap option. This is the optimum choice for
- * debugging HWDT crashes.
+ * debugging HWDT crashes. It has the content of SYS stack fully exposed.
  *
  */
 #ifndef DEBUG_ESP_HWDT_ROM_STACK_SIZE
diff --git a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
index b13947a9da..ec74760803 100644
--- a/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
+++ b/libraries/esp8266/examples/HwdtStackDump/HwdtStackDump.ino
@@ -40,9 +40,7 @@ void setup(void) {
   Serial.println();
 
   // We don't need this for this example; however, starting WiFi uses a little
-  // more of the SYS stack and during development a crash serves as a quick
-  // indicator that DEBUG_ESP_HWDT_ROM_STACK_SIZE was set too high. This is not
-  // something you need to be concerned about.
+  // more of the SYS stack.
   WiFi.mode(WIFI_STA);
   WiFi.begin(ssid, password);
   Serial.println(F("A WiFi connection attmpt has been started."));

From ea1f384f73fc5315518aa2d4e7d5317785e82446 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Mon, 26 Oct 2020 17:39:12 -0700
Subject: [PATCH 31/35] Update umm_info_safe_printf_P to support default of
 unaligned PROGMEM strings.

---
 cores/esp8266/umm_malloc/umm_local.c | 9 ++-------
 cores/esp8266/umm_malloc/umm_local.h | 3 +--
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/cores/esp8266/umm_malloc/umm_local.c b/cores/esp8266/umm_malloc/umm_local.c
index 392ef13c8f..2ee5517e0d 100644
--- a/cores/esp8266/umm_malloc/umm_local.c
+++ b/cores/esp8266/umm_malloc/umm_local.c
@@ -201,13 +201,8 @@ void print_stats(int force) {
 #endif
 
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
-    /*
-      To use ets_strlen() and ets_strcpy() safely with PROGMEM, flash storage,
-      the PROGMEM address must be word (4 bytes) aligned. The destination
-      address for ets_memcpy must also be word-aligned.
-    */
-    char ram_buf[ets_strlen(fmt) + 1] __attribute__((aligned(4)));
-    ets_strcpy(ram_buf, fmt);
+    char ram_buf[strlen_P(fmt) + 1];
+    strcpy_P(ram_buf, fmt);
     va_list argPtr;
     va_start(argPtr, fmt);
     int result = ets_vprintf(ets_uart_putc1, ram_buf, argPtr);
diff --git a/cores/esp8266/umm_malloc/umm_local.h b/cores/esp8266/umm_malloc/umm_local.h
index bb9f0bd4e3..f6e7b7b41b 100644
--- a/cores/esp8266/umm_malloc/umm_local.h
+++ b/cores/esp8266/umm_malloc/umm_local.h
@@ -48,7 +48,6 @@ void ICACHE_FLASH_ATTR print_stats(int force);
 
 
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) __attribute__((format(printf, 1, 2)));
-#define UMM_INFO_PRINTF(fmt, ...) umm_info_safe_printf_P(PSTR4(fmt), ##__VA_ARGS__)
-// use PSTR4() instead of PSTR() to ensure 4-bytes alignment in Flash, whatever the default alignment of PSTR_ALIGN
+#define UMM_INFO_PRINTF(fmt, ...) umm_info_safe_printf_P(PSTR(fmt), ##__VA_ARGS__)
 
 #endif

From a1ab73d39a43d420826086953698f39d7fcf7d4d Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Mon, 26 Oct 2020 18:36:09 -0700
Subject: [PATCH 32/35] Improve cont stack trace for yielding case. Check if
 cont stack is yielding to SYS, use g_pcont->sp_yield to limit the amount of
 the cont stack dumped.

Generalized dev logic path to create a generalized debug function hwdt_pre_sdk_init_icache.
---
 cores/esp8266/hwdt_app_entry.cpp | 40 ++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/cores/esp8266/hwdt_app_entry.cpp b/cores/esp8266/hwdt_app_entry.cpp
index bbe699b20d..deec894ede 100644
--- a/cores/esp8266/hwdt_app_entry.cpp
+++ b/cores/esp8266/hwdt_app_entry.cpp
@@ -464,13 +464,8 @@ static void IRAM_MAYBE set__sys_stack_first(void) {
  */
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) __attribute__((weak));
 int ICACHE_FLASH_ATTR umm_info_safe_printf_P(const char *fmt, ...) {
-    /*
-     * To use ets_strlen() and ets_strcpy() safely with PROGMEM, flash storage,
-     * the PROGMEM address must be word (4 bytes) aligned. The destination
-     * address for ets_memcpy must also be word-aligned.
-     */
-    char ram_buf[ets_strlen(fmt) + 1] __attribute__((aligned(4)));
-    ets_strcpy(ram_buf, fmt);
+    char ram_buf[strlen_P(fmt) + 1];
+    strcpy_P(ram_buf, fmt);
     va_list argPtr;
     va_start(argPtr, fmt);
     int result = ets_vprintf(ets_uart_putc1, ram_buf, argPtr);
@@ -953,10 +948,18 @@ STATIC void IRAM_MAYBE handle_hwdt(void) {
 #endif
             /* Print context SYS */
             print_stack((uintptr_t)ctx_sys_ptr, (uintptr_t)ROM_STACK, PRINT_STACK::SYS);
-
             if (get_noextra4k_g_pcont()) {
                 /* Print separate ctx: cont stack */
+
+                /* Check if cont stack is yielding to SYS */
+                if (0 == hwdt_info.cont_integrity && 0 != g_pcont->pc_yield) {
+                    ctx_cont_ptr = (const uint32_t *)((uintptr_t)g_pcont->sp_yield - 8u);
+                }
                 print_stack((uintptr_t)ctx_cont_ptr, (uintptr_t)g_pcont->stack_end, PRINT_STACK::CONT);
+            } else {
+                if (0 == hwdt_info.cont_integrity && 0 != g_pcont->pc_yield) {
+                    ETS_PRINTF("\nCont stack is yielding. Active stack starts at 0x%08X.\n", (uint32_t)g_pcont->sp_yield - 8u);
+                }
             }
 
             if (hwdt_info.cont_integrity) {
@@ -1043,14 +1046,24 @@ static void printSanityCheck() {
   ETS_PRINTF(    "g_rom_stack:             %p\n", g_rom_stack);
   ETS_PRINTF(    "g_rom_stack_A16_sz:      0x%08X\n\n", g_rom_stack_A16_sz);
 }
+#endif //DEBUG_ESP_HWDT_DEV_DEBUG
 
-static void ICACHE_RAM_ATTR __attribute__((noinline)) print_sanity_check_icache(void) __attribute__((used));
-void print_sanity_check_icache(void) {
+void hwdt_pre_sdk_init(void) __attribute__((weak));
+void hwdt_pre_sdk_init(void) {
+#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) && !defined(USE_IRAM)
+  printSanityCheck();
+#endif
+}
+
+static void ICACHE_RAM_ATTR __attribute__((noinline)) hwdt_pre_sdk_init_icache(void) __attribute__((used));
+void hwdt_pre_sdk_init_icache(void) {
   Cache_Read_Enable(0, 0, ICACHE_SIZE_16);
 #ifdef DEBUG_ESP_HWDT_UART_SPEED
   const uint32_t uart_divisor = set_uart_speed(0, DEBUG_ESP_HWDT_UART_SPEED);
 #endif
-  printSanityCheck();
+
+  hwdt_pre_sdk_init();
+
 #ifdef DEBUG_ESP_HWDT_UART_SPEED
   if (uart_divisor) {
       adjust_uart_speed(uart_divisor);
@@ -1058,7 +1071,6 @@ void print_sanity_check_icache(void) {
 #endif
   Cache_Read_Disable();
 }
-#endif //DEBUG_ESP_HWDT_DEV_DEBUG
 
 
 #if 1
@@ -1129,9 +1141,7 @@ asm  (
     "moveqz   a2, a13, a2\n\t"
     "s32i.n   a2, a14, 0\n\t"
 
-#if defined(DEBUG_ESP_HWDT_DEV_DEBUG) && !defined(USE_IRAM)
-    "call0    print_sanity_check_icache\n\t"
-#endif
+    "call0    hwdt_pre_sdk_init_icache\n\t"
 
     "movi     a2, 0x3FFFE000\n\t" // ROM BSS Area
     "movi     a3, 0x0b30\n\t"     // ROM BSS Size

From 761d736b537ec1097db048551c8c81f624e51f04 Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Wed, 25 Nov 2020 09:14:27 -0800
Subject: [PATCH 33/35] Added missed update to heap.cpp for change to use PSTR
 instead of PSTR4

---
 cores/esp8266/heap.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cores/esp8266/heap.cpp b/cores/esp8266/heap.cpp
index 3f549716f4..fef138d0f1 100644
--- a/cores/esp8266/heap.cpp
+++ b/cores/esp8266/heap.cpp
@@ -164,8 +164,8 @@ void ICACHE_RAM_ATTR print_loc(size_t size, const char* file, int line)
         if (inISR && (uint32_t)file >= 0x40200000) {
             DEBUG_HEAP_PRINTF("File: %p", file);
         } else if (!inISR && (uint32_t)file >= 0x40200000) {
-            char buf[ets_strlen(file) + 1] __attribute__((aligned(4)));
-            ets_strcpy(buf, file);
+            char buf[strlen_P(file) + 1];
+            strcpy_P(buf, file);
             DEBUG_HEAP_PRINTF(buf);
         } else {
             DEBUG_HEAP_PRINTF(file);

From 5b161db2a9e3925987e6e86e9cc9ad19b4e4b89b Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Wed, 16 Dec 2020 22:18:26 -0800
Subject: [PATCH 34/35] Updated comments and #if in aes_unwrap.

---
 cores/esp8266/aes_unwrap.cpp | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/cores/esp8266/aes_unwrap.cpp b/cores/esp8266/aes_unwrap.cpp
index 49ec89fe59..a6bf7cd3b2 100644
--- a/cores/esp8266/aes_unwrap.cpp
+++ b/cores/esp8266/aes_unwrap.cpp
@@ -13,21 +13,34 @@
  *  the ROM's AES APIs to operate. These calls can overwrite some of the stack
  *  space. To resolve the problem, this module replaces `aes_unwrap`.
  *
- *  Final note, as far as I can tell, this is not a problem when using the extra
- *  4K heap option without debug HWDT. It is when combined with the HWDT Stack
- *  Dump that a problem shows. This combination pushes up the stacks to create a
- *  Boot ROM stack space. Then the problem shows.
+ *  Final note, so far, I have not seen a problem when using the extra 4K heap
+ *  option without the "debug HWDT". It is when combined with the HWDT Stack
+ *  Dump that a problem shows. This combination adds a Boot ROM stack, which
+ *  pushes up the SYS and CONT stacks into the AES Buffer space. Then the
+ *  problem shows.
+ *
+ *  While debugging with painted stack space, during WiFi Connect, Reconnect,
+ *  and about every hour, a block of memory 0x3FFFEA80 - 0x3FFFEB30 (176 bytes)
+ *  was zeroed by the Boot ROM function aes_decrypt_init. All other painted
+ *  memory in the area was untouched after starting WiFi.
  */
 
-#if (!defined(DEBUG_ESP_HWDT_NOEXTRA4K) && defined(DEBUG_ESP_HWDT)) || REPLACE_ROM_AES_UNWRAP
+#if (defined(DEBUG_ESP_HWDT_NOEXTRA4K) && !defined(DEBUG_ESP_HWDT)) || KEEP_ROM_AES_UNWRAP
+// Using the ROM version of aes_unwrap should be fine for the no extra 4K case
+// which is usually used in conjunction with WPS.
+
+#else
+// This is required for DEBUG_ESP_HWDT.
+// The need is unconfirmed for the extra 4K heap case.
 #include "umm_malloc/umm_malloc.h"
 
 extern "C" {
 
-// This function is in the Boot ROM
+// Uses this function from the Boot ROM
 void rijndaelKeySetupDec(u32 rk[], const u8 cipherKey[]);
 
 // This replaces the Boot ROM version just for this module
+// Uses a malloc-ed buffer instead of the static buffer in stack address space.
 static void *aes_decrypt_init(const u8 *key, size_t len) {
   if (16u != len) {
     return 0;
@@ -52,7 +65,7 @@ static void aes_decrypt_deinit(void *ctx) {
 }
 
 /*
- * The NONOS SDK has an override on this function. To replace the aes_wrap
+ * The NONOS SDK has an override on this function. To replace the aes_unwrap
  * without changing its behavior too much. We need access to the ROM version of
  * the AES APIs to make our aes_unwrap functionally equal to the current
  * environment except for the AES Buffer.

From 37efba85ee11f8638c2868d39817a9230143374a Mon Sep 17 00:00:00 2001
From: M Hightower <27247790+mhightower83@users.noreply.github.com>
Date: Sun, 28 Mar 2021 17:40:33 -0700
Subject: [PATCH 35/35] Update boards.txt

---
 boards.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/boards.txt b/boards.txt
index 2d56a22cd1..efc1325e5a 100644
--- a/boards.txt
+++ b/boards.txt
@@ -5062,10 +5062,22 @@ agruminolemon.menu.lvl.OOM=OOM
 agruminolemon.menu.lvl.OOM.build.debug_level= -DDEBUG_ESP_OOM
 agruminolemon.menu.lvl.MDNS=MDNS
 agruminolemon.menu.lvl.MDNS.build.debug_level= -DDEBUG_ESP_MDNS
+agruminolemon.menu.lvl.HWDT=HWDT
+agruminolemon.menu.lvl.HWDT.build.debug_level= -DDEBUG_ESP_HWDT
+agruminolemon.menu.lvl.HWDT_NOEXTRA4K=HWDT_NOEXTRA4K
+agruminolemon.menu.lvl.HWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_HWDT_NOEXTRA4K
 agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+agruminolemon.menu.lvl.COREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS
 agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNS.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS
+agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT
+agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT
+agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K=SSL+TLS_MEM+HTTP_CLIENT+HTTP_SERVER+CORE+WIFI+HTTP_UPDATE+UPDATER+OTA+OOM+MDNS+HWDT_NOEXTRA4K
+agruminolemon.menu.lvl.SSLTLS_MEMHTTP_CLIENTHTTP_SERVERCOREWIFIHTTP_UPDATEUPDATEROTAOOMMDNSHWDT_NOEXTRA4K.build.debug_level= -DDEBUG_ESP_SSL -DDEBUG_ESP_TLS_MEM -DDEBUG_ESP_HTTP_CLIENT -DDEBUG_ESP_HTTP_SERVER -DDEBUG_ESP_CORE -DDEBUG_ESP_WIFI -DDEBUG_ESP_HTTP_UPDATE -DDEBUG_ESP_UPDATER -DDEBUG_ESP_OTA -DDEBUG_ESP_OOM -DDEBUG_ESP_MDNS -DDEBUG_ESP_HWDT_NOEXTRA4K
 agruminolemon.menu.lvl.NoAssert-NDEBUG=NoAssert-NDEBUG
 agruminolemon.menu.lvl.NoAssert-NDEBUG.build.debug_level= -DNDEBUG
 agruminolemon.menu.wipe.none=Only Sketch