From a86ceae9e409a094f4930b83eed54c8e8559debf Mon Sep 17 00:00:00 2001 From: devyte Date: Fri, 9 Nov 2018 12:33:32 -0300 Subject: [PATCH 1/4] deprecate RTC_REG macros in favor of TIMER_REG macros (old typo in macro names) --- tools/sdk/include/eagle_soc.h | 177 ++++++++++++++++++---------------- 1 file changed, 93 insertions(+), 84 deletions(-) diff --git a/tools/sdk/include/eagle_soc.h b/tools/sdk/include/eagle_soc.h index 3cff370f1c..5909dc6ee1 100644 --- a/tools/sdk/include/eagle_soc.h +++ b/tools/sdk/include/eagle_soc.h @@ -65,19 +65,19 @@ #define ETS_CACHED_ADDR(addr) (addr) -#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) -#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val) -#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))) -#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) -#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)) +#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) +#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val) +#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))) +#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))) +#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)) #define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|((value)<<(shift)) )) //}} //Periheral Clock {{ -#define CPU_CLK_FREQ 80*1000000 //unit: Hz -#define APB_CLK_FREQ CPU_CLK_FREQ -#define UART_CLK_FREQ APB_CLK_FREQ -#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256 +#define CPU_CLK_FREQ 80*1000000 //unit: Hz +#define APB_CLK_FREQ CPU_CLK_FREQ +#define UART_CLK_FREQ APB_CLK_FREQ +#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256 //}} //Peripheral device base address define{{ @@ -85,110 +85,119 @@ #define PERIPHS_GPIO_BASEADDR 0x60000300 #define PERIPHS_TIMER_BASEDDR 0x60000600 #define PERIPHS_RTC_BASEADDR 0x60000700 -#define PERIPHS_IO_MUX 0x60000800 +#define PERIPHS_IO_MUX 0x60000800 //}} //Interrupt remap control registers define{{ -#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04) -#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) -#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) +#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04) +#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) +#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) //}} //GPIO reg {{ -#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg)) -#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg), val) -#define GPIO_OUT_ADDRESS 0x00 -#define GPIO_OUT_W1TS_ADDRESS 0x04 -#define GPIO_OUT_W1TC_ADDRESS 0x08 - -#define GPIO_ENABLE_ADDRESS 0x0c -#define GPIO_ENABLE_W1TS_ADDRESS 0x10 -#define GPIO_ENABLE_W1TC_ADDRESS 0x14 -#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff - -#define GPIO_IN_ADDRESS 0x18 - -#define GPIO_STATUS_ADDRESS 0x1c -#define GPIO_STATUS_W1TS_ADDRESS 0x20 -#define GPIO_STATUS_W1TC_ADDRESS 0x24 -#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff - -#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c -#define RTC_CALIB_START BIT31 //first write to zero, then to one to start -#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms +#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg)) +#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + (reg), val) +#define GPIO_OUT_ADDRESS 0x00 +#define GPIO_OUT_W1TS_ADDRESS 0x04 +#define GPIO_OUT_W1TC_ADDRESS 0x08 + +#define GPIO_ENABLE_ADDRESS 0x0c +#define GPIO_ENABLE_W1TS_ADDRESS 0x10 +#define GPIO_ENABLE_W1TC_ADDRESS 0x14 +#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff + +#define GPIO_IN_ADDRESS 0x18 + +#define GPIO_STATUS_ADDRESS 0x1c +#define GPIO_STATUS_W1TS_ADDRESS 0x20 +#define GPIO_STATUS_W1TC_ADDRESS 0x24 +#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff + +#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c +#define RTC_CALIB_START BIT31 //first write to zero, then to one to start +#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms #define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70 -#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero -#define RTC_CALIB_VALUE_MASK 0xfffff +#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero +#define RTC_CALIB_VALUE_MASK 0xfffff -#define GPIO_PIN0_ADDRESS 0x28 +#define GPIO_PIN0_ADDRESS 0x28 -#define GPIO_ID_PIN0 0 -#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) -#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15) -#define GPIO_ID_NONE 0xffffffff +#define GPIO_ID_PIN0 0 +#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n)) +#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15) +#define GPIO_ID_NONE 0xffffffff -#define GPIO_PIN_COUNT 16 +#define GPIO_PIN_COUNT 16 -#define GPIO_PIN_CONFIG_MSB 12 -#define GPIO_PIN_CONFIG_LSB 11 -#define GPIO_PIN_CONFIG_MASK 0x00001800 -#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB) -#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK) +#define GPIO_PIN_CONFIG_MSB 12 +#define GPIO_PIN_CONFIG_LSB 11 +#define GPIO_PIN_CONFIG_MASK 0x00001800 +#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB) +#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK) -#define GPIO_WAKEUP_ENABLE 1 -#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE) -#define GPIO_PIN_WAKEUP_ENABLE_MSB 10 -#define GPIO_PIN_WAKEUP_ENABLE_LSB 10 -#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400 -#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB) -#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK) +#define GPIO_WAKEUP_ENABLE 1 +#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE) +#define GPIO_PIN_WAKEUP_ENABLE_MSB 10 +#define GPIO_PIN_WAKEUP_ENABLE_LSB 10 +#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400 +#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB) +#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK) #define GPIO_PIN_INT_TYPE_MASK 0x380 -#define GPIO_PIN_INT_TYPE_MSB 9 -#define GPIO_PIN_INT_TYPE_LSB 7 -#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB) -#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK) +#define GPIO_PIN_INT_TYPE_MSB 9 +#define GPIO_PIN_INT_TYPE_LSB 7 +#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB) +#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK) #define GPIO_PAD_DRIVER_ENABLE 1 #define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE) #define GPIO_PIN_PAD_DRIVER_MSB 2 -#define GPIO_PIN_PAD_DRIVER_LSB 2 -#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004 +#define GPIO_PIN_PAD_DRIVER_LSB 2 +#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004 #define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB) -#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK) - -#define GPIO_AS_PIN_SOURCE 0 -#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE) -#define GPIO_PIN_SOURCE_MSB 0 -#define GPIO_PIN_SOURCE_LSB 0 -#define GPIO_PIN_SOURCE_MASK 0x00000001 -#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB) -#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK) +#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK) + +#define GPIO_AS_PIN_SOURCE 0 +#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE) +#define GPIO_PIN_SOURCE_MSB 0 +#define GPIO_PIN_SOURCE_LSB 0 +#define GPIO_PIN_SOURCE_MASK 0x00000001 +#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB) +#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK) // }} // TIMER reg {{ -#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr) -#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val) -#define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask) -/* Returns the current time according to the timer timer. */ -#define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS) +#define TIMER_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr) +#define TIMER_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val) +#define TIMER_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask) + + +//Previous definitions of the above, kept for a while for possible compatibility, but deprecated +#define RTC_REG_READ(addr) _Pragma("GCC warning \"'RTC_REG_READ' macro is deprecated\"") TIMER_REG_READ(addr) +#define RTC_REG_WRITE(addr, val) _Pragma("GCC warning \"'RTC_REG_WRITE' macro is deprecated\"") TIMER_REG_WRITE(addr, val) +#define RTC_CLR_REG_MASK(reg, mask) _Pragma("GCC warning \"'RTC_CLR_REG_MASK' macro is deprecated\"") TIMER_CLR_REG_MASK(reg, mask) + + //load initial_value to timer1 -#define FRC1_LOAD_ADDRESS 0x00 +#define FRC1_LOAD_ADDRESS 0x00 //timer1's counter value(count from initial_value to 0) #define FRC1_COUNT_ADDRESS 0x04 -#define FRC1_CTRL_ADDRESS 0x08 +#define FRC1_CTRL_ADDRESS 0x08 //clear timer1's interrupt when write this address -#define FRC1_INT_ADDRESS 0x0c -#define FRC1_INT_CLR_MASK 0x00000001 +#define FRC1_INT_ADDRESS 0x0c +#define FRC1_INT_CLR_MASK 0x00000001 //timer2's counter value(count from initial_value to 0) -#define FRC2_COUNT_ADDRESS 0x24 +#define FRC2_COUNT_ADDRESS 0x24 // }} +/* Returns the current time according to the timer timer. */ +#define NOW() TIMER_REG_READ(FRC2_COUNT_ADDRESS) + //RTC reg {{ #define REG_RTC_BASE PERIPHS_RTC_BASEADDR @@ -226,11 +235,11 @@ #define FUNC_UART0_DTR 4 #define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08) -#define FUNC_MTCK 0 -#define FUNC_I2SI_BCK 1 -#define FUNC_HSPID_MOSI 2 -#define FUNC_GPIO13 3 -#define FUNC_UART0_CTS 4 +#define FUNC_MTCK 0 +#define FUNC_I2SI_BCK 1 +#define FUNC_HSPID_MOSI 2 +#define FUNC_GPIO13 3 +#define FUNC_UART0_CTS 4 #define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C) #define FUNC_MTMS 0 From ab1ddb45eefa115cc902f6dafb3d6aded728a660 Mon Sep 17 00:00:00 2001 From: devyte Date: Fri, 9 Nov 2018 14:51:04 -0300 Subject: [PATCH 2/4] cleanup/unify sector size define value --- cores/esp8266/flash_utils.h | 4 +++- tools/sdk/include/spi_flash.h | 4 ++-- tools/sdk/include/spi_flash_sec_size.h | 8 ++++++++ 3 files changed, 13 insertions(+), 3 deletions(-) create mode 100644 tools/sdk/include/spi_flash_sec_size.h diff --git a/cores/esp8266/flash_utils.h b/cores/esp8266/flash_utils.h index 67dc6ebadd..932a2c7c54 100644 --- a/cores/esp8266/flash_utils.h +++ b/cores/esp8266/flash_utils.h @@ -21,6 +21,8 @@ #ifndef FLASH_UTILS_H #define FLASH_UTILS_H +#include "spi_flash_sec_size.h" + #ifdef __cplusplus extern "C" { #endif @@ -31,7 +33,7 @@ int SPIRead(uint32_t addr, void *dest, size_t size); int SPIWrite(uint32_t addr, void *src, size_t size); int SPIEraseAreaEx(const uint32_t start, const uint32_t size); -#define FLASH_SECTOR_SIZE 0x1000 +#define FLASH_SECTOR_SIZE SPI_FLASH_SEC_SIZE #define FLASH_BLOCK_SIZE 0x10000 #define APP_START_OFFSET 0x1000 diff --git a/tools/sdk/include/spi_flash.h b/tools/sdk/include/spi_flash.h index 00f8a08b79..d5c7e9a348 100644 --- a/tools/sdk/include/spi_flash.h +++ b/tools/sdk/include/spi_flash.h @@ -25,6 +25,8 @@ #ifndef SPI_FLASH_H #define SPI_FLASH_H +#include "spi_flash_sec_size.h" + #ifdef __cplusplus extern "C" { #endif @@ -44,8 +46,6 @@ typedef struct{ uint32 status_mask; } SpiFlashChip; -#define SPI_FLASH_SEC_SIZE 4096 - extern SpiFlashChip * flashchip; // in ram ROM-BIOS uint32 spi_flash_get_id(void); diff --git a/tools/sdk/include/spi_flash_sec_size.h b/tools/sdk/include/spi_flash_sec_size.h new file mode 100644 index 0000000000..48724d0df2 --- /dev/null +++ b/tools/sdk/include/spi_flash_sec_size.h @@ -0,0 +1,8 @@ +#ifndef SPI_FLASH_SEC_SIZE_H +#define SPI_FLASH_SEC_SIZE_H + +//pulled this define from spi_flash.h for reuse in the Arduino core without pulling in a bunch of other stuff +#define SPI_FLASH_SEC_SIZE 4096 + + +#endif From d793ed21e53ccc860a537056ab8ef147407c0d1e Mon Sep 17 00:00:00 2001 From: devyte Date: Fri, 9 Nov 2018 16:49:01 -0300 Subject: [PATCH 3/4] replicate spi_flash_sec_size.h file for host tests --- tests/host/common/spi_flash_sec_size.h | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 tests/host/common/spi_flash_sec_size.h diff --git a/tests/host/common/spi_flash_sec_size.h b/tests/host/common/spi_flash_sec_size.h new file mode 100644 index 0000000000..a4096f7a65 --- /dev/null +++ b/tests/host/common/spi_flash_sec_size.h @@ -0,0 +1,8 @@ +#ifndef SPI_FLASH_SEC_SIZE_H +#define SPI_FLASH_SEC_SIZE_H + +//pulled this define from tools/sdk/include/spi_flash.h for reuse in the Arduino core without pulling in a bunch of other stuff +#define SPI_FLASH_SEC_SIZE 4096 + + +#endif From 708c572d247b08039925c8fcfaca7cdab5808613 Mon Sep 17 00:00:00 2001 From: devyte Date: Tue, 20 Nov 2018 18:13:43 -0300 Subject: [PATCH 4/4] further flash geometry cleanup, remove host test duplicate file --- bootloaders/eboot/Makefile | 4 ++- bootloaders/eboot/eboot.elf | Bin 10352 -> 10376 bytes bootloaders/eboot/flash.h | 12 ++++++--- cores/esp8266/flash_utils.h | 34 ++++--------------------- tests/host/common/spi_flash_sec_size.h | 8 ------ tools/sdk/include/spi_flash.h | 2 +- tools/sdk/include/spi_flash_geometry.h | 15 +++++++++++ tools/sdk/include/spi_flash_sec_size.h | 8 ------ tools/sdk/include/upgrade.h | 2 +- 9 files changed, 33 insertions(+), 52 deletions(-) delete mode 100644 tests/host/common/spi_flash_sec_size.h create mode 100644 tools/sdk/include/spi_flash_geometry.h delete mode 100644 tools/sdk/include/spi_flash_sec_size.h diff --git a/bootloaders/eboot/Makefile b/bootloaders/eboot/Makefile index e078263caa..3e25eb139e 100644 --- a/bootloaders/eboot/Makefile +++ b/bootloaders/eboot/Makefile @@ -17,11 +17,13 @@ AR := $(XTENSA_TOOLCHAIN)xtensa-lx106-elf-ar LD := $(XTENSA_TOOLCHAIN)xtensa-lx106-elf-gcc OBJDUMP := $(XTENSA_TOOLCHAIN)xtensa-lx106-elf-objdump - +INC += -I../../tools/sdk/include CFLAGS += -std=gnu99 CFLAGS += -O0 -g -Wpointer-arith -Wno-implicit-function-declaration -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mno-text-section-literals +CFLAGS += $(INC) + LDFLAGS += -nostdlib -Wl,--no-check-sections -umain LD_SCRIPT := -Teboot.ld diff --git a/bootloaders/eboot/eboot.elf b/bootloaders/eboot/eboot.elf index 1ccbe25fc312cfa70690fa91a8737c38c2aa678f..da0f8452785eb278f8a32f0ed05a0b8a67627195 100755 GIT binary patch delta 745 zcmb7AO=uHQ5Pt7%Hg7l0wi}z8#>9;_ZDNge(}*<(CA9}dQPfaDBS;#vnAqypCbfDf zUR9`npu!CNn~w;ZIP_SAz14+bh&EP{tXp@$ppLu z(eXFCmpNOZ@Qr6!m_fgixf`q#Liji(MA~r*Dd9Q6LxNKtK$Hx@86Ok8PjHFH1@`9< zUBs0XhJk0;xD{!Sj2)jB`k>GW-zNCpzq^-2lh{C1x*58IF5eIu)C>Yu$8hu;zb@j* z!cQft#l%kd8j1?9K|&3OWSr2R0SvgXsgItxkypx$O!*3=U;4>3=Qr5NNq zC6-|D-qZ9wMe7Q#zTDDBm#{WqwId?_L!)DO@CJ&~r^}cpw+?gp7LmJKce(%H#j|kS z`|qyLxS=RDnDa(y9TvT@u4QqZbP>bZlcLsykKSYS6$G>t-GGx?jNXTvT8P$QK|4r4 zz&ouEC*QR+opmCeHO7CSosrk@RqsiZ?CX|Uv~F2bwmE0dOjf2Ru2|;Pa9b2c6G|0C|WZW z)4~QCfiuozZ_@?Eooh4)M~$d_U^^kdpln3xFf15xIU6J-4eLfXtQtCf0AGwaeGYOY SPT#^1;u4%kJnYOzwv<1El)iHS delta 724 zcmeAO{17lffzf88;sJIhVW!EC+3lI`GEP?Eu&)=r$-uzC9>U1Lz%1qiWHPWvf!N|8 zHY2+@kYttuv6o0(l5L@Go9Nfrhc1CR#ADL@Vz2eS$*kjGvNl2--EGq4MR z*lJL<(IAfc6ClZP1*nikl0{G#NORf)2}Vw4CI*K8K)}zyhcfSTkQ$jRAj!eL zYO*$`jPx;(LQz$q0TCYr9DIQ^w$!c6iOrIGiM{#8^ zykEP}IvY&NjF z*bwewcbe?Z19R66pb8F-Rg=qklo?M>p3S4izX50pBXcCsaHfeVyw4|J;BjM|G+CV2 zi1Er~FJ3jq%E^Vi(u}Jn_wt%DZk>FXR|zQcjMsuOb+bI*E++PeK zPAw|d&rC1M&(6p%$<8m+Pc1GeN-ZwVOw&&+N-53E%ipXZxQvM-9jr;5aq>d}5iLwz z1x5K;smUe9Ang`LW@a$WlNAIFwe?9-FR{5vq?~!Og@msj7LBPell7DG^GkB_6H`DQ zNCj~=w@Cb8nOr4%4;U|za>}flVhjxLCO66{Gm1}MDyPn9G5M^VI%|O>1B1Y1LpkBe lJn{mJ4U=W%)mfLwFfdF7i^TxNrcBP2S7%h&JXQWP2LOe`x + int SPIEraseBlock(uint32_t block); int SPIEraseSector(uint32_t sector); int SPIRead(uint32_t addr, void *dest, size_t size); int SPIWrite(uint32_t addr, void *src, size_t size); int SPIEraseAreaEx(const uint32_t start, const uint32_t size); -#define FLASH_SECTOR_SIZE 0x1000 -#define FLASH_BLOCK_SIZE 0x10000 -#define APP_START_OFFSET 0x1000 typedef struct { unsigned char magic; @@ -25,7 +29,7 @@ typedef struct { /* SPI Flash Interface (0 = QIO, 1 = QOUT, 2 = DIO, 0x3 = DOUT) */ unsigned char flash_mode; - /* High four bits: 0 = 512K, 1 = 256K, 2 = 1M, 3 = 2M, 4 = 4M, + /* High four bits: 0 = 512K, 1 = 256K, 2 = 1M, 3 = 2M, 4 = 4M, 8 = 8M, 9 = 16M Low four bits: 0 = 40MHz, 1= 26MHz, 2 = 20MHz, 0xf = 80MHz */ unsigned char flash_size_freq; diff --git a/cores/esp8266/flash_utils.h b/cores/esp8266/flash_utils.h index 932a2c7c54..eade691a5b 100644 --- a/cores/esp8266/flash_utils.h +++ b/cores/esp8266/flash_utils.h @@ -21,41 +21,17 @@ #ifndef FLASH_UTILS_H #define FLASH_UTILS_H -#include "spi_flash_sec_size.h" #ifdef __cplusplus extern "C" { #endif -int SPIEraseBlock(uint32_t block); -int SPIEraseSector(uint32_t sector); -int SPIRead(uint32_t addr, void *dest, size_t size); -int SPIWrite(uint32_t addr, void *src, size_t size); -int SPIEraseAreaEx(const uint32_t start, const uint32_t size); +/* Definitions are placed in eboot. Include them here rather than duplicate them. + * Also, prefer to have eboot standalone as much as possible and have the core depend on it + * rather than have eboot depend on the core. + */ +#include <../../bootloaders/eboot/flash.h> -#define FLASH_SECTOR_SIZE SPI_FLASH_SEC_SIZE -#define FLASH_BLOCK_SIZE 0x10000 -#define APP_START_OFFSET 0x1000 - -typedef struct { - unsigned char magic; - unsigned char num_segments; - - /* SPI Flash Interface (0 = QIO, 1 = QOUT, 2 = DIO, 0x3 = DOUT) */ - unsigned char flash_mode; - - /* High four bits: 0 = 512K, 1 = 256K, 2 = 1M, 3 = 2M, 4 = 4M, 8 = 8M, 9 = 16M - Low four bits: 0 = 40MHz, 1= 26MHz, 2 = 20MHz, 0xf = 80MHz */ - unsigned char flash_size_freq; - - uint32_t entry; -} image_header_t; - - -typedef struct { - uint32_t address; - uint32_t size; -} section_header_t; #ifdef __cplusplus } diff --git a/tests/host/common/spi_flash_sec_size.h b/tests/host/common/spi_flash_sec_size.h deleted file mode 100644 index a4096f7a65..0000000000 --- a/tests/host/common/spi_flash_sec_size.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef SPI_FLASH_SEC_SIZE_H -#define SPI_FLASH_SEC_SIZE_H - -//pulled this define from tools/sdk/include/spi_flash.h for reuse in the Arduino core without pulling in a bunch of other stuff -#define SPI_FLASH_SEC_SIZE 4096 - - -#endif diff --git a/tools/sdk/include/spi_flash.h b/tools/sdk/include/spi_flash.h index d5c7e9a348..4e5a94f831 100644 --- a/tools/sdk/include/spi_flash.h +++ b/tools/sdk/include/spi_flash.h @@ -25,7 +25,7 @@ #ifndef SPI_FLASH_H #define SPI_FLASH_H -#include "spi_flash_sec_size.h" +#include #ifdef __cplusplus extern "C" { diff --git a/tools/sdk/include/spi_flash_geometry.h b/tools/sdk/include/spi_flash_geometry.h new file mode 100644 index 0000000000..bb8c0ea22f --- /dev/null +++ b/tools/sdk/include/spi_flash_geometry.h @@ -0,0 +1,15 @@ +#ifndef SPI_FLASH_GEOMETRY_H +#define SPI_FLASH_GEOMETRY_H + +/* The flash geometry is meant to be unified here. This header file should be included wherever needed. + * Beware: this file is needed by eboot as well as the Arduino core. + */ + +#define FLASH_SECTOR_SIZE 0x1000 +#define FLASH_BLOCK_SIZE 0x10000 +#define APP_START_OFFSET 0x1000 + +//pulled this define from spi_flash.h for reuse in the Arduino core without pulling in a bunch of other stuff +#define SPI_FLASH_SEC_SIZE FLASH_SECTOR_SIZE + +#endif diff --git a/tools/sdk/include/spi_flash_sec_size.h b/tools/sdk/include/spi_flash_sec_size.h deleted file mode 100644 index 48724d0df2..0000000000 --- a/tools/sdk/include/spi_flash_sec_size.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef SPI_FLASH_SEC_SIZE_H -#define SPI_FLASH_SEC_SIZE_H - -//pulled this define from spi_flash.h for reuse in the Arduino core without pulling in a bunch of other stuff -#define SPI_FLASH_SEC_SIZE 4096 - - -#endif diff --git a/tools/sdk/include/upgrade.h b/tools/sdk/include/upgrade.h index 6c88f9a043..8d5f6cd7cf 100644 --- a/tools/sdk/include/upgrade.h +++ b/tools/sdk/include/upgrade.h @@ -29,8 +29,8 @@ extern "C" { #endif +#include -#define SPI_FLASH_SEC_SIZE 4096 #define LIMIT_ERASE_SIZE 0x10000 #define USER_BIN1 0x00