From 23144aee1fe3623147c9beefe6fe46cd4519c25e Mon Sep 17 00:00:00 2001 From: Makuna Date: Wed, 6 May 2015 08:42:38 -0700 Subject: [PATCH 1/3] true interrupt enable and disable plus expose cycle count for bit bang timing --- hardware/esp8266com/esp8266/cores/esp8266/Arduino.h | 7 +++++-- hardware/esp8266com/esp8266/cores/esp8266/Esp.h | 8 ++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h b/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h index 6d039683ba..430cf6f02c 100644 --- a/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h +++ b/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h @@ -124,8 +124,11 @@ void timer1_write(uint32_t ticks); //maximum ticks 8388607 void ets_intr_lock(); void ets_intr_unlock(); -#define interrupts() ets_intr_unlock(); -#define noInterrupts() ets_intr_lock(); +void xt_enable_interrupts(); +void xt_disable_interrupts(); + +#define interrupts() xt_enable_interrupts(); +#define noInterrupts() xt_disable_interrupts(); #define clockCyclesPerMicrosecond() ( F_CPU / 1000000L ) #define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() ) diff --git a/hardware/esp8266com/esp8266/cores/esp8266/Esp.h b/hardware/esp8266com/esp8266/cores/esp8266/Esp.h index b3d836c798..9750dd312f 100644 --- a/hardware/esp8266com/esp8266/cores/esp8266/Esp.h +++ b/hardware/esp8266com/esp8266/cores/esp8266/Esp.h @@ -95,8 +95,16 @@ class EspClass { FlashMode_t getFlashChipMode(void); uint32_t getFlashChipSizeByChipId(void); + inline uint32_t getCycleCount(void); }; +uint32_t EspClass::getCycleCount(void) +{ + uint32_t ccount; + __asm__ __volatile__("rsr %0,ccount":"=a" (ccount)); + return ccount; +} + extern EspClass ESP; #endif //ESP_H From b5dd07a53c0e27c1489d962bba737e73daea12c8 Mon Sep 17 00:00:00 2001 From: Makuna Date: Wed, 6 May 2015 09:02:14 -0700 Subject: [PATCH 2/3] xt disable and enable functions --- .../cores/esp8266/core_esp8266_wiring_digital.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c b/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c index 0e673549bb..7cdfa3fbc7 100644 --- a/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c +++ b/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c @@ -139,6 +139,21 @@ extern void __detachInterrupt(uint8_t pin) { } } +static uint32_t interruptState = 0; + +void xt_disable_interrupts() +{ + __asm__ __volatile__("rsil %0,15":"=a" (interruptState)); + __asm__("esync"); + __asm__("isync"); + __asm__("dsync"); +} +void xt_enable_interrupts() +{ + __asm__ __volatile__("wsr %0,ps"::"a" (interruptState) : "memory"); + __asm__("esync"); +} + void initPins() { //Disable UART interrupts system_set_os_print(0); From 4643cd173ddd7d18826907e7616dbfff890c9daa Mon Sep 17 00:00:00 2001 From: Makuna Date: Thu, 7 May 2015 12:29:37 -0700 Subject: [PATCH 3/3] refactored xt_disable_intterupts to accept level due to the rsil requirement that the level be a constant, the method was moved into a macro --- .../esp8266com/esp8266/cores/esp8266/Arduino.h | 14 ++++++++++---- .../cores/esp8266/core_esp8266_wiring_digital.c | 16 ++-------------- 2 files changed, 12 insertions(+), 18 deletions(-) diff --git a/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h b/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h index 430cf6f02c..51aa65602c 100644 --- a/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h +++ b/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h @@ -124,11 +124,17 @@ void timer1_write(uint32_t ticks); //maximum ticks 8388607 void ets_intr_lock(); void ets_intr_unlock(); -void xt_enable_interrupts(); -void xt_disable_interrupts(); +// level (0-15), +// level 15 will disable ALL interrupts, +// level 0 will disable most software interrupts +// +#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state)) +#define xt_enable_interrupts(state) __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory") -#define interrupts() xt_enable_interrupts(); -#define noInterrupts() xt_disable_interrupts(); +extern uint32_t interruptsState; + +#define interrupts() xt_enable_interrupts(interruptsState) +#define noInterrupts() xt_disable_interrupts(interruptsState, 15) #define clockCyclesPerMicrosecond() ( F_CPU / 1000000L ) #define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() ) diff --git a/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c b/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c index 7cdfa3fbc7..54c2b557b1 100644 --- a/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c +++ b/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c @@ -139,20 +139,8 @@ extern void __detachInterrupt(uint8_t pin) { } } -static uint32_t interruptState = 0; - -void xt_disable_interrupts() -{ - __asm__ __volatile__("rsil %0,15":"=a" (interruptState)); - __asm__("esync"); - __asm__("isync"); - __asm__("dsync"); -} -void xt_enable_interrupts() -{ - __asm__ __volatile__("wsr %0,ps"::"a" (interruptState) : "memory"); - __asm__("esync"); -} +// stored state for the noInterrupts/interrupts methods +uint32_t interruptsState = 0; void initPins() { //Disable UART interrupts