|
| 1 | +/* This linker script generated from xt-genldscripts.tpp for LSP . */ |
| 2 | +/* Linker Script for ld -N */ |
| 3 | + |
| 4 | +PHDRS |
| 5 | +{ |
| 6 | + dport0_0_phdr PT_LOAD; |
| 7 | + dram0_0_phdr PT_LOAD; |
| 8 | + dram0_0_bss_phdr PT_LOAD; |
| 9 | + iram1_0_phdr PT_LOAD; |
| 10 | + irom0_0_phdr PT_LOAD; |
| 11 | +} |
| 12 | + |
| 13 | + |
| 14 | +/* Default entry point: */ |
| 15 | +ENTRY(call_user_start) |
| 16 | +EXTERN(_DebugExceptionVector) |
| 17 | +EXTERN(_DoubleExceptionVector) |
| 18 | +EXTERN(_KernelExceptionVector) |
| 19 | +EXTERN(_NMIExceptionVector) |
| 20 | +EXTERN(_UserExceptionVector) |
| 21 | +EXTERN(core_version) |
| 22 | +PROVIDE(_memmap_vecbase_reset = 0x40000000); |
| 23 | +/* Various memory-map dependent cache attribute settings: */ |
| 24 | +_memmap_cacheattr_wb_base = 0x00000110; |
| 25 | +_memmap_cacheattr_wt_base = 0x00000110; |
| 26 | +_memmap_cacheattr_bp_base = 0x00000220; |
| 27 | +_memmap_cacheattr_unused_mask = 0xFFFFF00F; |
| 28 | +_memmap_cacheattr_wb_trapnull = 0x2222211F; |
| 29 | +_memmap_cacheattr_wba_trapnull = 0x2222211F; |
| 30 | +_memmap_cacheattr_wbna_trapnull = 0x2222211F; |
| 31 | +_memmap_cacheattr_wt_trapnull = 0x2222211F; |
| 32 | +_memmap_cacheattr_bp_trapnull = 0x2222222F; |
| 33 | +_memmap_cacheattr_wb_strict = 0xFFFFF11F; |
| 34 | +_memmap_cacheattr_wt_strict = 0xFFFFF11F; |
| 35 | +_memmap_cacheattr_bp_strict = 0xFFFFF22F; |
| 36 | +_memmap_cacheattr_wb_allvalid = 0x22222112; |
| 37 | +_memmap_cacheattr_wt_allvalid = 0x22222112; |
| 38 | +_memmap_cacheattr_bp_allvalid = 0x22222222; |
| 39 | +PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); |
| 40 | + |
| 41 | +SECTIONS |
| 42 | +{ |
| 43 | + |
| 44 | + .dport0.rodata : ALIGN(4) |
| 45 | + { |
| 46 | + _dport0_rodata_start = ABSOLUTE(.); |
| 47 | + *(.dport0.rodata) |
| 48 | + *(.dport.rodata) |
| 49 | + _dport0_rodata_end = ABSOLUTE(.); |
| 50 | + } >dport0_0_seg :dport0_0_phdr |
| 51 | + |
| 52 | + .dport0.literal : ALIGN(4) |
| 53 | + { |
| 54 | + _dport0_literal_start = ABSOLUTE(.); |
| 55 | + *(.dport0.literal) |
| 56 | + *(.dport.literal) |
| 57 | + _dport0_literal_end = ABSOLUTE(.); |
| 58 | + } >dport0_0_seg :dport0_0_phdr |
| 59 | + |
| 60 | + .dport0.data : ALIGN(4) |
| 61 | + { |
| 62 | + _dport0_data_start = ABSOLUTE(.); |
| 63 | + *(.dport0.data) |
| 64 | + *(.dport.data) |
| 65 | + _dport0_data_end = ABSOLUTE(.); |
| 66 | + } >dport0_0_seg :dport0_0_phdr |
| 67 | + |
| 68 | + .data : ALIGN(4) |
| 69 | + { |
| 70 | + _data_start = ABSOLUTE(.); |
| 71 | + *(.data) |
| 72 | + *(.data.*) |
| 73 | + *(.gnu.linkonce.d.*) |
| 74 | + *(.data1) |
| 75 | + *(.sdata) |
| 76 | + *(.sdata.*) |
| 77 | + *(.gnu.linkonce.s.*) |
| 78 | + *(.sdata2) |
| 79 | + *(.sdata2.*) |
| 80 | + *(.gnu.linkonce.s2.*) |
| 81 | + *(.jcr) |
| 82 | + . = ALIGN(4); |
| 83 | + _Pri_3_HandlerAddress = ABSOLUTE(.); |
| 84 | + _data_end = ABSOLUTE(.); |
| 85 | + } >dram0_0_seg :dram0_0_phdr |
| 86 | + |
| 87 | +#ifdef VTABLES_IN_DRAM |
| 88 | +#include "eagle.app.v6.common.ld.vtables.h" |
| 89 | +#endif |
| 90 | + |
| 91 | + .irom0.text : ALIGN(4) |
| 92 | + { |
| 93 | + _irom0_text_start = ABSOLUTE(.); |
| 94 | + *(.ver_number) |
| 95 | + *.c.o( EXCLUDE_FILE (umm_malloc.c.o) .literal*, EXCLUDE_FILE (umm_malloc.c.o) .text* ) |
| 96 | + *.cpp.o(.literal*, .text*) |
| 97 | + *libc.a:(.literal .text .literal.* .text.*) |
| 98 | + *libm.a:(.literal .text .literal.* .text.*) |
| 99 | + *libgcc.a:_umoddi3.o(.literal .text) |
| 100 | + *libgcc.a:_udivdi3.o(.literal .text) |
| 101 | + *libsmartconfig.a:(.literal .text .literal.* .text.*) |
| 102 | + *libstdc++.a:(.literal .text .literal.* .text.*) |
| 103 | + *liblwip_gcc.a:(.literal .text .literal.* .text.*) |
| 104 | + *liblwip_src.a:(.literal .text .literal.* .text.*) |
| 105 | + *liblwip2.a:(.literal .text .literal.* .text.*) |
| 106 | + *liblwip2_1460.a:(.literal .text .literal.* .text.*) |
| 107 | + *libaxtls.a:(.literal .text .literal.* .text.*) |
| 108 | + *libat.a:(.literal.* .text.*) |
| 109 | + *libcrypto.a:(.literal.* .text.*) |
| 110 | + *libespnow.a:(.literal.* .text.*) |
| 111 | + *libjson.a:(.literal.* .text.*) |
| 112 | + *liblwip.a:(.literal.* .text.*) |
| 113 | + *libmesh.a:(.literal.* .text.*) |
| 114 | + *libnet80211.a:(.literal.* .text.*) |
| 115 | + *libsmartconfig.a:(.literal.* .text.*) |
| 116 | + *libssl.a:(.literal.* .text.*) |
| 117 | + *libupgrade.a:(.literal.* .text.*) |
| 118 | + *libwpa.a:(.literal.* .text.*) |
| 119 | + *libwpa2.a:(.literal.* .text.*) |
| 120 | + *libwps.a:(.literal.* .text.*) |
| 121 | + *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text .irom.text.*) |
| 122 | + _irom0_text_end = ABSOLUTE(.); |
| 123 | + _flash_code_end = ABSOLUTE(.); |
| 124 | + } >irom0_0_seg :irom0_0_phdr |
| 125 | + |
| 126 | + .text : ALIGN(4) |
| 127 | + { |
| 128 | + _stext = .; |
| 129 | + _text_start = ABSOLUTE(.); |
| 130 | + *(.UserEnter.text) |
| 131 | + . = ALIGN(16); |
| 132 | + *(.DebugExceptionVector.text) |
| 133 | + . = ALIGN(16); |
| 134 | + *(.NMIExceptionVector.text) |
| 135 | + . = ALIGN(16); |
| 136 | + *(.KernelExceptionVector.text) |
| 137 | + LONG(0) |
| 138 | + LONG(0) |
| 139 | + LONG(0) |
| 140 | + LONG(0) |
| 141 | + . = ALIGN(16); |
| 142 | + *(.UserExceptionVector.text) |
| 143 | + LONG(0) |
| 144 | + LONG(0) |
| 145 | + LONG(0) |
| 146 | + LONG(0) |
| 147 | + . = ALIGN(16); |
| 148 | + *(.DoubleExceptionVector.text) |
| 149 | + LONG(0) |
| 150 | + LONG(0) |
| 151 | + LONG(0) |
| 152 | + LONG(0) |
| 153 | + . = ALIGN (16); |
| 154 | + *(.entry.text) |
| 155 | + *(.init.literal) |
| 156 | + *(.init) |
| 157 | + *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) |
| 158 | + *.cpp.o(.iram.text) |
| 159 | + *.c.o(.iram.text) |
| 160 | +#ifdef VTABLES_IN_IRAM |
| 161 | + *(.rodata._ZTV*) /* C++ vtables */ |
| 162 | +#endif |
| 163 | + *(.fini.literal) |
| 164 | + *(.fini) |
| 165 | + *(.gnu.version) |
| 166 | + _text_end = ABSOLUTE(.); |
| 167 | + _etext = .; |
| 168 | + } >iram1_0_seg :iram1_0_phdr |
| 169 | + |
| 170 | +#ifdef VTABLES_IN_IRAM |
| 171 | +#include "eagle.app.v6.common.ld.vtables.h" |
| 172 | +#endif |
| 173 | + |
| 174 | + .lit4 : ALIGN(4) |
| 175 | + { |
| 176 | + _lit4_start = ABSOLUTE(.); |
| 177 | + *(*.lit4) |
| 178 | + *(.lit4.*) |
| 179 | + *(.gnu.linkonce.lit4.*) |
| 180 | + _lit4_end = ABSOLUTE(.); |
| 181 | + } >iram1_0_seg :iram1_0_phdr |
| 182 | + |
| 183 | + |
| 184 | +} |
| 185 | + |
| 186 | +/* get ROM code address */ |
| 187 | +INCLUDE "../ld/eagle.rom.addr.v6.ld" |
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