Skip to content

Commit 9a466e8

Browse files
igrrigrr
committed
small clean up of HardwareSerial
1 parent 264aa8c commit 9a466e8

File tree

2 files changed

+71
-65
lines changed

2 files changed

+71
-65
lines changed

‎hardware/esp8266com/esp8266/cores/esp8266/HardwareSerial.cpp

+66-50
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,20 @@ extern "C" {
4141

4242
#define UART_TX_FIFO_SIZE 0x80
4343

44+
struct uart_ {
45+
int uart_nr;
46+
int baud_rate;
47+
bool rxEnabled;
48+
bool txEnabled;
49+
uint8_t rxPin;
50+
uint8_t txPin;
51+
};
52+
53+
static const int UART0 = 0;
54+
static const int UART1 = 1;
55+
static const int UART_NO = -1;
56+
57+
4458
/**
4559
* UART GPIOs
4660
*
@@ -86,16 +100,16 @@ void uart_disarm_tx_interrupt(uart_t* uart);
86100
void uart_set_baudrate(uart_t* uart, int baud_rate);
87101
int uart_get_baudrate(uart_t* uart);
88102

89-
uart_t* uart_init(UARTnr_t uart_nr, int baudrate, byte config);
103+
uart_t* uart_init(int uart_nr, int baudrate, byte config);
90104
void uart_uninit(uart_t* uart);
91105
void uart_swap(uart_t* uart);
92106

93107
void uart_ignore_char(char c);
94108
void uart0_write_char(char c);
95109
void uart1_write_char(char c);
96110

97-
void uart_set_debug(UARTnr_t uart_nr);
98-
UARTnr_t uart_get_debug();
111+
void uart_set_debug(int uart_nr);
112+
int uart_get_debug();
99113

100114
// ####################################################################################################
101115
// ####################################################################################################
@@ -108,12 +122,12 @@ void ICACHE_RAM_ATTR uart_interrupt_handler(uart_t* uart) {
108122
if(Serial.isRxEnabled()) {
109123
if(status & (1 << UIFF)) {
110124
while(true) {
111-
int rx_count = (U0S >> USTXC) & 0xFF;
125+
int rx_count = (U0S >> USTXC) & 0xff;
112126
if(!rx_count)
113127
break;
114128

115129
while(rx_count--) {
116-
char c = U0F & 0xFF;
130+
char c = U0F & 0xff;
117131
Serial._rx_complete_irq(c);
118132
}
119133
}
@@ -133,12 +147,12 @@ void ICACHE_RAM_ATTR uart_interrupt_handler(uart_t* uart) {
133147
if(Serial1.isRxEnabled()) {
134148
if(status & (1 << UIFF)) {
135149
while(true) {
136-
int rx_count = (U1S >> USTXC) & 0xFF;
150+
int rx_count = (U1S >> USTXC) & 0xff;
137151
if(!rx_count)
138152
break;
139153

140154
while(rx_count--) {
141-
char c = U1F & 0xFF;
155+
char c = U1F & 0xff;
142156
Serial1._rx_complete_irq(c);
143157
}
144158
}
@@ -156,44 +170,44 @@ void ICACHE_RAM_ATTR uart_interrupt_handler(uart_t* uart) {
156170

157171
// ####################################################################################################
158172

159-
void ICACHE_FLASH_ATTR uart_wait_for_tx_fifo(uart_t* uart, size_t size_needed) {
173+
void uart_wait_for_tx_fifo(uart_t* uart, size_t size_needed) {
160174
if(uart == 0)
161175
return;
162176
if(uart->txEnabled) {
163177
while(true) {
164-
size_t tx_count = (USS(uart->uart_nr) >> USTXC) & 0xFF;
178+
size_t tx_count = (USS(uart->uart_nr) >> USTXC) & 0xff;
165179
if(tx_count <= (UART_TX_FIFO_SIZE - size_needed))
166180
break;
167181
}
168182
}
169183
}
170184

171-
size_t ICACHE_FLASH_ATTR uart_get_tx_fifo_room(uart_t* uart) {
185+
size_t uart_get_tx_fifo_room(uart_t* uart) {
172186
if(uart == 0)
173187
return 0;
174188
if(uart->txEnabled) {
175-
return UART_TX_FIFO_SIZE - ((USS(uart->uart_nr) >> USTXC) & 0xFF);
189+
return UART_TX_FIFO_SIZE - ((USS(uart->uart_nr) >> USTXC) & 0xff);
176190
}
177191
return 0;
178192
}
179193

180-
void ICACHE_FLASH_ATTR uart_wait_for_transmit(uart_t* uart) {
194+
void uart_wait_for_transmit(uart_t* uart) {
181195
if(uart == 0)
182196
return;
183197
if(uart->txEnabled) {
184198
uart_wait_for_tx_fifo(uart, UART_TX_FIFO_SIZE);
185199
}
186200
}
187201

188-
void ICACHE_FLASH_ATTR uart_transmit_char(uart_t* uart, char c) {
202+
void uart_transmit_char(uart_t* uart, char c) {
189203
if(uart == 0)
190204
return;
191205
if(uart->txEnabled) {
192206
USF(uart->uart_nr) = c;
193207
}
194208
}
195209

196-
void ICACHE_FLASH_ATTR uart_transmit(uart_t* uart, const char* buf, size_t size) {
210+
void uart_transmit(uart_t* uart, const char* buf, size_t size) {
197211
if(uart == 0)
198212
return;
199213
if(uart->txEnabled) {
@@ -208,7 +222,7 @@ void ICACHE_FLASH_ATTR uart_transmit(uart_t* uart, const char* buf, size_t size)
208222
}
209223
}
210224

211-
void ICACHE_FLASH_ATTR uart_flush(uart_t* uart) {
225+
void uart_flush(uart_t* uart) {
212226
uint32_t tmp = 0x00000000;
213227

214228
if(uart == 0)
@@ -226,7 +240,7 @@ void ICACHE_FLASH_ATTR uart_flush(uart_t* uart) {
226240
USC0(uart->uart_nr) &= ~(tmp);
227241
}
228242

229-
void ICACHE_FLASH_ATTR uart_interrupt_enable(uart_t* uart) {
243+
void uart_interrupt_enable(uart_t* uart) {
230244
if(uart == 0)
231245
return;
232246
USIC(uart->uart_nr) = 0x1ff;
@@ -237,7 +251,7 @@ void ICACHE_FLASH_ATTR uart_interrupt_enable(uart_t* uart) {
237251
ETS_UART_INTR_ENABLE();
238252
}
239253

240-
void ICACHE_FLASH_ATTR uart_interrupt_disable(uart_t* uart) {
254+
void uart_interrupt_disable(uart_t* uart) {
241255
if(uart == 0)
242256
return;
243257
if(uart->rxEnabled) {
@@ -249,36 +263,36 @@ void ICACHE_FLASH_ATTR uart_interrupt_disable(uart_t* uart) {
249263
//ETS_UART_INTR_DISABLE(); // never disable irq complete may its needed by the other Serial Interface!
250264
}
251265

252-
void ICACHE_FLASH_ATTR uart_arm_tx_interrupt(uart_t* uart) {
266+
void uart_arm_tx_interrupt(uart_t* uart) {
253267
if(uart == 0)
254268
return;
255269
if(uart->txEnabled) {
256270
USIE(uart->uart_nr) |= (1 << UIFE);
257271
}
258272
}
259273

260-
void ICACHE_FLASH_ATTR uart_disarm_tx_interrupt(uart_t* uart) {
274+
void uart_disarm_tx_interrupt(uart_t* uart) {
261275
if(uart == 0)
262276
return;
263277
if(uart->txEnabled) {
264278
USIE(uart->uart_nr) &= ~(1 << UIFE);
265279
}
266280
}
267281

268-
void ICACHE_FLASH_ATTR uart_set_baudrate(uart_t* uart, int baud_rate) {
282+
void uart_set_baudrate(uart_t* uart, int baud_rate) {
269283
if(uart == 0)
270284
return;
271285
uart->baud_rate = baud_rate;
272286
USD(uart->uart_nr) = (80000000UL / uart->baud_rate);
273287
}
274288

275-
int ICACHE_FLASH_ATTR uart_get_baudrate(uart_t* uart) {
289+
int uart_get_baudrate(uart_t* uart) {
276290
if(uart == 0)
277291
return 0;
278292
return uart->baud_rate;
279293
}
280294

281-
uart_t* ICACHE_FLASH_ATTR uart_init(UARTnr_t uart_nr, int baudrate, byte config) {
295+
uart_t* uart_init(int uart_nr, int baudrate, byte config) {
282296

283297
uint32_t conf1 = 0x00000000;
284298
uart_t* uart = (uart_t*) os_malloc(sizeof(uart_t));
@@ -329,7 +343,7 @@ uart_t* ICACHE_FLASH_ATTR uart_init(UARTnr_t uart_nr, int baudrate, byte config)
329343
return uart;
330344
}
331345

332-
void ICACHE_FLASH_ATTR uart_uninit(uart_t* uart) {
346+
void uart_uninit(uart_t* uart) {
333347
if(uart == 0)
334348
return;
335349
uart_interrupt_disable(uart);
@@ -358,7 +372,7 @@ void ICACHE_FLASH_ATTR uart_uninit(uart_t* uart) {
358372
os_free(uart);
359373
}
360374

361-
void ICACHE_FLASH_ATTR uart_swap(uart_t* uart) {
375+
void uart_swap(uart_t* uart) {
362376
if(uart == 0)
363377
return;
364378
switch(uart->uart_nr) {
@@ -394,10 +408,10 @@ void ICACHE_FLASH_ATTR uart_swap(uart_t* uart) {
394408
// ####################################################################################################
395409
// ####################################################################################################
396410

397-
void ICACHE_FLASH_ATTR uart_ignore_char(char c) {
411+
void uart_ignore_char(char c) {
398412
}
399413

400-
void ICACHE_FLASH_ATTR uart0_write_char(char c) {
414+
void uart0_write_char(char c) {
401415
if(&Serial != NULL && Serial.isTxEnabled()) {
402416
if(c == '\n') {
403417
Serial.write('\r');
@@ -411,7 +425,7 @@ void ICACHE_FLASH_ATTR uart0_write_char(char c) {
411425
}
412426
}
413427

414-
void ICACHE_FLASH_ATTR uart1_write_char(char c) {
428+
void uart1_write_char(char c) {
415429
if(&Serial1 != NULL && Serial1.isTxEnabled()) {
416430
if(c == '\n') {
417431
Serial1.write('\r');
@@ -425,8 +439,9 @@ void ICACHE_FLASH_ATTR uart1_write_char(char c) {
425439
}
426440
}
427441

428-
static UARTnr_t s_uart_debug_nr = UART0;
429-
void ICACHE_FLASH_ATTR uart_set_debug(UARTnr_t uart_nr) {
442+
static int s_uart_debug_nr = UART0;
443+
444+
void uart_set_debug(int uart_nr) {
430445
s_uart_debug_nr = uart_nr;
431446
switch(s_uart_debug_nr) {
432447
case UART0:
@@ -445,20 +460,19 @@ void ICACHE_FLASH_ATTR uart_set_debug(UARTnr_t uart_nr) {
445460
}
446461
}
447462

448-
UARTnr_t ICACHE_FLASH_ATTR uart_get_debug() {
463+
int uart_get_debug() {
449464
return s_uart_debug_nr;
450465
}
451466

452467
// ####################################################################################################
453468
// ####################################################################################################
454469
// ####################################################################################################
455470

456-
ICACHE_FLASH_ATTR HardwareSerial::HardwareSerial(UARTnr_t uart_nr) :
457-
_uart(0), _tx_buffer(0), _rx_buffer(0), _written(false) {
458-
_uart_nr = uart_nr;
471+
HardwareSerial::HardwareSerial(int uart_nr) :
472+
_uart_nr(uart_nr), _uart(0), _tx_buffer(0), _rx_buffer(0), _written(false) {
459473
}
460474

461-
void ICACHE_FLASH_ATTR HardwareSerial::begin(unsigned long baud, byte config) {
475+
void HardwareSerial::begin(unsigned long baud, byte config) {
462476

463477
// disable debug for this interface
464478
if(uart_get_debug() == _uart_nr) {
@@ -472,16 +486,18 @@ void ICACHE_FLASH_ATTR HardwareSerial::begin(unsigned long baud, byte config) {
472486
}
473487

474488
if(_uart->rxEnabled) {
475-
_rx_buffer = new cbuf(SERIAL_RX_BUFFER_SIZE);
489+
if (!_rx_buffer)
490+
_rx_buffer = new cbuf(SERIAL_RX_BUFFER_SIZE);
476491
}
477492
if(_uart->txEnabled) {
478-
_tx_buffer = new cbuf(SERIAL_TX_BUFFER_SIZE);
493+
if (!_tx_buffer)
494+
_tx_buffer = new cbuf(SERIAL_TX_BUFFER_SIZE);
479495
}
480496
_written = false;
481497
delay(1);
482498
}
483499

484-
void ICACHE_FLASH_ATTR HardwareSerial::end() {
500+
void HardwareSerial::end() {
485501
if(uart_get_debug() == _uart_nr) {
486502
uart_set_debug(UART_NO);
487503
}
@@ -493,13 +509,13 @@ void ICACHE_FLASH_ATTR HardwareSerial::end() {
493509
_tx_buffer = 0;
494510
}
495511

496-
void ICACHE_FLASH_ATTR HardwareSerial::swap() {
512+
void HardwareSerial::swap() {
497513
if(_uart == 0)
498514
return;
499515
uart_swap(_uart);
500516
}
501517

502-
void ICACHE_FLASH_ATTR HardwareSerial::setDebugOutput(bool en) {
518+
void HardwareSerial::setDebugOutput(bool en) {
503519
if(_uart == 0)
504520
return;
505521
if(en) {
@@ -512,19 +528,19 @@ void ICACHE_FLASH_ATTR HardwareSerial::setDebugOutput(bool en) {
512528
}
513529
}
514530

515-
bool ICACHE_FLASH_ATTR HardwareSerial::isTxEnabled(void) {
531+
bool HardwareSerial::isTxEnabled(void) {
516532
if(_uart == 0)
517533
return false;
518534
return _uart->txEnabled;
519535
}
520536

521-
bool ICACHE_FLASH_ATTR HardwareSerial::isRxEnabled(void) {
537+
bool HardwareSerial::isRxEnabled(void) {
522538
if(_uart == 0)
523539
return false;
524540
return _uart->rxEnabled;
525541
}
526542

527-
int ICACHE_FLASH_ATTR HardwareSerial::available(void) {
543+
int HardwareSerial::available(void) {
528544
if(_uart == 0)
529545
return 0;
530546
if(_uart->rxEnabled) {
@@ -534,7 +550,7 @@ int ICACHE_FLASH_ATTR HardwareSerial::available(void) {
534550
}
535551
}
536552

537-
int ICACHE_FLASH_ATTR HardwareSerial::peek(void) {
553+
int HardwareSerial::peek(void) {
538554
if(_uart == 0)
539555
return -1;
540556
if(_uart->rxEnabled) {
@@ -544,7 +560,7 @@ int ICACHE_FLASH_ATTR HardwareSerial::peek(void) {
544560
}
545561
}
546562

547-
int ICACHE_FLASH_ATTR HardwareSerial::read(void) {
563+
int HardwareSerial::read(void) {
548564
if(_uart == 0)
549565
return -1;
550566
if(_uart->rxEnabled) {
@@ -554,7 +570,7 @@ int ICACHE_FLASH_ATTR HardwareSerial::read(void) {
554570
}
555571
}
556572

557-
int ICACHE_FLASH_ATTR HardwareSerial::availableForWrite(void) {
573+
int HardwareSerial::availableForWrite(void) {
558574
if(_uart == 0)
559575
return 0;
560576
if(_uart->txEnabled) {
@@ -564,7 +580,7 @@ int ICACHE_FLASH_ATTR HardwareSerial::availableForWrite(void) {
564580
}
565581
}
566582

567-
void ICACHE_FLASH_ATTR HardwareSerial::flush() {
583+
void HardwareSerial::flush() {
568584
if(_uart == 0)
569585
return;
570586
if(!_uart->txEnabled)
@@ -578,7 +594,7 @@ void ICACHE_FLASH_ATTR HardwareSerial::flush() {
578594
_written = false;
579595
}
580596

581-
size_t ICACHE_FLASH_ATTR HardwareSerial::write(uint8_t c) {
597+
size_t HardwareSerial::write(uint8_t c) {
582598
if(_uart == 0 || !_uart->txEnabled)
583599
return 0;
584600
_written = true;
@@ -599,17 +615,17 @@ size_t ICACHE_FLASH_ATTR HardwareSerial::write(uint8_t c) {
599615
return 1;
600616
}
601617

602-
ICACHE_FLASH_ATTR HardwareSerial::operator bool() const {
618+
HardwareSerial::operator bool() const {
603619
return _uart != 0;
604620
}
605621

606-
void ICACHE_FLASH_ATTR HardwareSerial::_rx_complete_irq(char c) {
622+
void HardwareSerial::_rx_complete_irq(char c) {
607623
if(_rx_buffer) {
608624
_rx_buffer->write(c);
609625
}
610626
}
611627

612-
void ICACHE_FLASH_ATTR HardwareSerial::_tx_empty_irq(void) {
628+
void HardwareSerial::_tx_empty_irq(void) {
613629
if(_uart == 0)
614630
return;
615631
if(_tx_buffer == 0)

0 commit comments

Comments
 (0)