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ficetoficeto
ficeto
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ficeto
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fix uart receive
1 parent 5c3508f commit 9436222

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+6
-27
lines changed

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+6
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hardware/esp8266com/esp8266/cores/esp8266/HardwareSerial.cpp

+6-27
Original file line numberDiff line numberDiff line change
@@ -118,50 +118,29 @@ int uart_get_debug();
118118
void ICACHE_RAM_ATTR uart_interrupt_handler(uart_t* uart) {
119119

120120
// -------------- UART 0 --------------
121-
uint32_t status = U0IS;
122121
if(Serial.isRxEnabled()) {
123-
if(status & (1 << UIFF)) {
124-
while(true) {
125-
int rx_count = (U0S >> USTXC) & 0xff;
126-
if(!rx_count)
127-
break;
128-
129-
while(rx_count--) {
130-
char c = U0F & 0xff;
131-
Serial._rx_complete_irq(c);
132-
}
133-
}
122+
while(U0IS & (1 << UIFF)) {
123+
Serial._rx_complete_irq((char)(U0F & 0xff));
134124
U0IC = (1 << UIFF);
135125
}
136126
}
137127
if(Serial.isTxEnabled()) {
138-
if(status & (1 << UIFE)) {
128+
if(U0IS & (1 << UIFE)) {
139129
U0IC = (1 << UIFE);
140130
Serial._tx_empty_irq();
141131
}
142132
}
143133

144134
// -------------- UART 1 --------------
145135

146-
status = U1IS;
147136
if(Serial1.isRxEnabled()) {
148-
if(status & (1 << UIFF)) {
149-
while(true) {
150-
int rx_count = (U1S >> USTXC) & 0xff;
151-
if(!rx_count)
152-
break;
153-
154-
while(rx_count--) {
155-
char c = U1F & 0xff;
156-
Serial1._rx_complete_irq(c);
157-
}
158-
}
137+
while(U1IS & (1 << UIFF)) {
138+
Serial1._rx_complete_irq((char)(U1F & 0xff));
159139
U1IC = (1 << UIFF);
160140
}
161141
}
162142
if(Serial1.isTxEnabled()) {
163-
status = U1IS;
164-
if(status & (1 << UIFE)) {
143+
if(U1IS & (1 << UIFE)) {
165144
U1IC = (1 << UIFE);
166145
Serial1._tx_empty_irq();
167146
}

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