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Add eboot
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Copyright (c) 2015 Ivan Grokhotkov
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. The name of the authors may not be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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Authors: Ivan Grokhotkov
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XTENSA_TOOCHAIN ?=
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BIN_DIR := ./
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TARGET_DIR := ./
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TARGET_OBJ_FILES := \
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eboot_debug.o \
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TARGET_OBJ_PATHS := $(addprefix $(TARGET_DIR)/,$(TARGET_OBJ_FILES))
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CC := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-gcc
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CXX := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-g++
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AR := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-ar
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LD := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-gcc
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OBJDUMP := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-objdump
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CFLAGS += -std=gnu99
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CFLAGS += -O0 -g -Wpointer-arith -Wno-implicit-function-declaration -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mno-text-section-literals
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LDFLAGS += -nostdlib -Wl,--no-check-sections -umain
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LD_SCRIPT := -Teboot.ld
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APP_OUT:= eboot.elf
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APP_AR := eboot.a
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APP_FW := eboot.bin
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all: $(APP_FW)
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$(APP_AR): $(TARGET_OBJ_PATHS)
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$(AR) cru $@ $^
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$(APP_OUT): $(APP_AR)
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$(LD) $(LD_SCRIPT) $(LDFLAGS) -Wl,--start-group -Wl,--whole-archive $(APP_AR) -Wl,--end-group -o $@
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$(APP_FW): $(APP_OUT)
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$(ESPTOOL) -vvv -eo $(APP_OUT) -bo $@ -bs .text -bs .data -bs .rodata -bc -ec || true
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clean:
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rm -f *.o
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rm -f $(APP_AR)
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rm -f $(APP_OUT)
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.PHONY: all clean default
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/* Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
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* This file is part of eboot bootloader.
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*
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* Redistribution and use is permitted according to the conditions of the
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* 3-clause BSD license to be found in the LICENSE file.
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "eboot.h"
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extern void* flashchip;
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#define SWRST do { (*((volatile uint32_t*) 0x60000700)) |= 0x80000000; } while(0);
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int load_app_from_flash_raw(const uint32_t flash_addr)
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{
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image_header_t image_header;
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uint32_t pos = flash_addr + APP_START_OFFSET;
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if (SPIRead(pos, &image_header, sizeof(image_header))) {
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return 1;
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}
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pos += sizeof(image_header);
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for (uint32_t section_index = 0;
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section_index < image_header.num_segments;
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++section_index)
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{
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section_header_t section_header = {0};
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if (SPIRead(pos, &section_header, sizeof(section_header))) {
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return 2;
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}
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pos += sizeof(section_header);
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const uint32_t address = section_header.address;
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bool load = false;
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if (address < 0x40000000) {
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load = true;
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}
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if (address >= 0x40100000 && address < 0x40108000) {
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load = true;
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}
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if (address >= 0x60000000) {
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load = true;
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}
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if (!load) {
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pos += section_header.size;
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continue;
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}
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if (SPIRead(pos, (void*)address, section_header.size))
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return 3;
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pos += section_header.size;
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}
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register uint32_t sp asm("a1") = 0x3ffffff0;
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register uint32_t pc asm("a3") = image_header.entry;
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__asm__ __volatile__ ("jx a3");
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return 0;
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}
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void main()
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{
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int res = load_app_from_flash_raw(0);
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if (res) {
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ets_putc('\n');
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ets_putc('#');
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ets_putc('0' + res);
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ets_putc('\n');
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SWRST;
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}
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while(true){}
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}
Binary file not shown.
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/* Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
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* This file is part of eboot bootloader.
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*
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* Redistribution and use is permitted according to the conditions of the
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* 3-clause BSD license to be found in the LICENSE file.
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*/
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#ifndef EBOOT_H
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#define EBOOT_H
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int SPIEraseBlock(uint32_t block);
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int SPIEraseSector(uint32_t sector);
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int SPIRead(uint32_t addr, void *dest, size_t size);
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int SPIWrite(uint32_t addr, void *src, size_t size);
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#define APP_START_OFFSET 0x1000
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typedef struct {
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unsigned char magic;
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unsigned char num_segments;
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/* SPI Flash Interface (0 = QIO, 1 = QOUT, 2 = DIO, 0x3 = DOUT) */
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unsigned char flash_mode;
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/* High four bits: 0 = 512K, 1 = 256K, 2 = 1M, 3 = 2M, 4 = 4M,
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Low four bits: 0 = 40MHz, 1= 26MHz, 2 = 20MHz, 0xf = 80MHz */
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unsigned char flash_size_freq;
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uint32_t entry;
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} image_header_t;
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typedef struct {
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uint32_t address;
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uint32_t size;
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} section_header_t;
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#endif //EBOOT_H
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/* This linker script generated from xt-genldscripts.tpp for LSP . */
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/* Linker Script for ld -N */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x4010f800, len = 0x800
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irom0_0_seg : org = 0x40240000, len = 0x32000
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}
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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dram0_0_bss_phdr PT_LOAD;
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iram1_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(main)
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PROVIDE(_memmap_vecbase_reset = 0x40000000);
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x00000110;
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_memmap_cacheattr_wt_base = 0x00000110;
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_memmap_cacheattr_bp_base = 0x00000220;
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_memmap_cacheattr_unused_mask = 0xFFFFF00F;
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_memmap_cacheattr_wb_trapnull = 0x2222211F;
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_memmap_cacheattr_wba_trapnull = 0x2222211F;
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_memmap_cacheattr_wbna_trapnull = 0x2222211F;
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_memmap_cacheattr_wt_trapnull = 0x2222211F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0xFFFFF11F;
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_memmap_cacheattr_wt_strict = 0xFFFFF11F;
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_memmap_cacheattr_bp_strict = 0xFFFFF22F;
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_memmap_cacheattr_wb_allvalid = 0x22222112;
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_memmap_cacheattr_wt_allvalid = 0x22222112;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
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SECTIONS
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{
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.dport0.rodata : ALIGN(4)
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{
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_dport0_rodata_start = ABSOLUTE(.);
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*(.dport0.rodata)
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*(.dport.rodata)
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_dport0_rodata_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.literal : ALIGN(4)
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{
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_dport0_literal_start = ABSOLUTE(.);
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*(.dport0.literal)
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*(.dport.literal)
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_dport0_literal_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.data : ALIGN(4)
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{
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_dport0_data_start = ABSOLUTE(.);
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*(.dport0.data)
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*(.dport.data)
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_dport0_data_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.data : ALIGN(4)
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{
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_heap_start = ABSOLUTE(.);
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/* _stack_sentry = ALIGN(0x8); */
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} >dram0_0_seg :dram0_0_bss_phdr
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/* __stack = 0x3ffc8000; */
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.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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. = ALIGN (8);
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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. = ALIGN (8);
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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/* C++ constructor and destructor tables, properly ordered: */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4); /* this table MUST be 4-byte aligned */
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_bss_table_start = ABSOLUTE(.);
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LONG(_bss_start)
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LONG(_bss_end)
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_bss_table_end = ABSOLUTE(.);
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_rodata_end = ABSOLUTE(.);
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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.lit4 : ALIGN(4)
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{
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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.irom0.text : ALIGN(4)
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{
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_irom0_text_start = ABSOLUTE(.);
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*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
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_irom0_text_end = ABSOLUTE(.);
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} >irom0_0_seg :irom0_0_phdr
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}
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/* get ROM code address */
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INCLUDE "rom.ld"

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