We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
1 parent f4f58e9 commit 8286545Copy full SHA for 8286545
cores/esp8266/core_esp8266_waveform_phase.cpp
@@ -122,6 +122,7 @@ static void initTimer() {
122
ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt);
123
timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE);
124
waveform.timer1Running = true;
125
+ waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS;
126
timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste
127
}
128
@@ -229,6 +230,7 @@ IRAM_ATTR int stopWaveform_weak(uint8_t pin) {
229
230
std::atomic_thread_fence(std::memory_order_release);
231
// Must not interfere if Timer is due shortly
232
if (T1V > IRQLATENCYCCYS) {
233
234
timer1_write(IRQLATENCYCCYS);
235
236
while (waveform.toDisableBits) {
0 commit comments