Merge branch 'ficeto-esp8266' into esp8266

* ficeto-esp8266:
  fix location change
  add SPIFS support to up to 16MB flash chips

Author: igrr

boards.txt

@@ -85,6 +85,16 @@ generic.menu.FlashSize.4M.build.flash_size=4M
 generic.menu.FlashSize.4M.build.flash_ld=eagle.flash.4m.ld
 generic.menu.FlashSize.4M.build.spiffs_start=0x100000
 generic.menu.FlashSize.4M.build.spiffs_end=0x3FB000
+generic.menu.FlashSize.8M=8M (7M SPIFFS)
+generic.menu.FlashSize.8M.build.flash_size=1M
+generic.menu.FlashSize.8M.build.flash_ld=eagle.flash.8m.ld
+generic.menu.FlashSize.8M.build.spiffs_start=0x100000
+generic.menu.FlashSize.8M.build.spiffs_end=0x800000
+generic.menu.FlashSize.16M=16M (15M SPIFFS)
+generic.menu.FlashSize.16M.build.flash_size=1M
+generic.menu.FlashSize.16M.build.flash_ld=eagle.flash.16m.ld
+generic.menu.FlashSize.16M.build.spiffs_start=0x100000
+generic.menu.FlashSize.16M.build.spiffs_end=0x1000000
 
 # generic.menu.FlashFreq.40=40MHz
 # generic.menu.FlashFreq.40.build.flash_freq=40

cores/esp8266/spiffs/spiffs_esp8266.c

@@ -11,7 +11,10 @@
 bool flashmem_erase_sector( uint32_t sector_id ){
   WDT_RESET();
   noInterrupts();
+  uint32_t chip_size = flashchip->chip_size;
+  flashchip->chip_size = 0x01000000;
   bool erased = spi_flash_erase_sector( sector_id ) == SPI_FLASH_RESULT_OK;
+  flashchip->chip_size = chip_size;
   interrupts();
   return erased;
 }
@@ -30,7 +33,10 @@ uint32_t flashmem_write_internal( const void *from, uint32_t toaddr, uint32_t si
   }
   WDT_RESET();
   noInterrupts();
+  uint32_t chip_size = flashchip->chip_size;
+  flashchip->chip_size = 0x01000000;
   r = spi_flash_write(toaddr, apbuf?(uint32 *)apbuf:(uint32 *)from, size);
+  flashchip->chip_size = chip_size;
   interrupts();
   if(apbuf)
     os_free(apbuf);
@@ -48,7 +54,10 @@ uint32_t flashmem_read_internal( void *to, uint32_t fromaddr, uint32_t size ){
   SpiFlashOpResult r;
   WDT_RESET();
   noInterrupts();
+  uint32_t chip_size = flashchip->chip_size;
+  flashchip->chip_size = 0x01000000;
   r = spi_flash_read(fromaddr, (uint32 *)to, size);
+  flashchip->chip_size = chip_size;
   interrupts();
   if(SPI_FLASH_RESULT_OK == r)
     return size;

tools/sdk/include/spi_flash.h

@@ -23,6 +23,8 @@ typedef struct{
 
 #define SPI_FLASH_SEC_SIZE      4096
 
+extern SpiFlashChip * flashchip; // in ram ROM-BIOS
+
 uint32 spi_flash_get_id(void);
 SpiFlashOpResult spi_flash_erase_sector(uint16 sec);
 SpiFlashOpResult spi_flash_write(uint32 des_addr, uint32 *src_addr, uint32 size);

tools/sdk/ld/eagle.flash.16m.ld

@@ -0,0 +1,17 @@
+/* Flash Split for 8M chips */
+/* irom0  940KB */
+/* eeprom 20KB */
+/* spiffs 7MB */
+
+MEMORY
+{
+  dport0_0_seg :                        org = 0x3FF00000, len = 0x10
+  dram0_0_seg :                         org = 0x3FFE8000, len = 0x14000
+  iram1_0_seg :                         org = 0x40100000, len = 0x8000
+  irom0_0_seg :                         org = 0x40210000, len = 0xEB000
+}
+
+PROVIDE ( _SPIFFS_start = 0x40300000 );
+PROVIDE ( _SPIFFS_end = 0x40A00000 );
+
+INCLUDE "../ld/eagle.app.v6.common.ld"

tools/sdk/ld/eagle.flash.8m.ld

@@ -0,0 +1,17 @@
+/* Flash Split for 16M chips */
+/* irom0  940KB */
+/* eeprom 20KB */
+/* spiffs 15MB */
+
+MEMORY
+{
+  dport0_0_seg :                        org = 0x3FF00000, len = 0x10
+  dram0_0_seg :                         org = 0x3FFE8000, len = 0x14000
+  iram1_0_seg :                         org = 0x40100000, len = 0x8000
+  irom0_0_seg :                         org = 0x40210000, len = 0xEB000
+}
+
+PROVIDE ( _SPIFFS_start = 0x40300000 );
+PROVIDE ( _SPIFFS_end = 0x41200000 );
+
+INCLUDE "../ld/eagle.app.v6.common.ld"