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Revert "Expose Chip CCompare0 timer"
This reverts commit 17b29fc.
1 parent a5a7872 commit 5d34317

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4 files changed

+3
-77
lines changed

4 files changed

+3
-77
lines changed

hardware/esp8266com/esp8266/cores/esp8266/Arduino.h

+2-16
Original file line numberDiff line numberDiff line change
@@ -107,20 +107,6 @@ void timer1_attachInterrupt(void (*userFunc)(void));
107107
void timer1_detachInterrupt(void);
108108
void timer1_write(uint32_t ticks); //maximum ticks 8388607
109109

110-
// timer0 is a special CPU timer that has very high resolution but with
111-
// limited control.
112-
// it uses CCOUNT (ESP.GetCycleCount()) as the non-resetable timer counter
113-
// it does not support divide, type, or reload flags
114-
// it is auto-disabled when the compare value matches CCOUNT
115-
// it is auto-enabled when the compare value changes
116-
#define timer0_interrupted() (ETS_INTR_PENDING() & (_BV(ETS_COMPARE0_INUM)))
117-
#define timer0_read() (ESP.getCycleCompare0())
118-
#define timer0_write(ticks) (ESP.setCycleCompare0(ticks))
119-
120-
void timer0_isr_init(void);
121-
void timer0_attachInterrupt(void(*userFunc)(void));
122-
void timer0_detachInterrupt(void);
123-
124110
// undefine stdlib's abs if encountered
125111
#ifdef abs
126112
#undef abs
@@ -140,13 +126,13 @@ void ets_intr_unlock();
140126
// level 15 will disable ALL interrupts,
141127
// level 0 will disable most software interrupts
142128
//
143-
#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state))
129+
#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state))
144130
#define xt_enable_interrupts(state) __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
145131

146132
extern uint32_t interruptsState;
147133

148134
#define interrupts() xt_enable_interrupts(interruptsState)
149-
#define noInterrupts() __asm__ __volatile__("rsil %0,15" : "=a" (interruptsState))
135+
#define noInterrupts() __asm__ __volatile__("rsil %0,15; esync; isync; dsync" : "=a" (interruptsState))
150136

151137
#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
152138
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )

hardware/esp8266com/esp8266/cores/esp8266/Esp.h

+1-17
Original file line numberDiff line numberDiff line change
@@ -99,31 +99,15 @@ class EspClass {
9999
uint32_t getFlashChipSizeByChipId(void);
100100

101101
inline uint32_t getCycleCount(void);
102-
inline uint32_t getCycleCompare0(void);
103-
inline void setCycleCompare0(uint32_t count);
104102
};
105103

106104
uint32_t EspClass::getCycleCount(void)
107105
{
108106
uint32_t ccount;
109-
__asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount));
107+
__asm__ __volatile__("rsr %0,ccount":"=a" (ccount));
110108
return ccount;
111109
}
112110

113-
// this returns a value in the range of (0 - 2^32)
114-
uint32_t EspClass::getCycleCompare0(void)
115-
{
116-
uint32_t count;
117-
__asm__ __volatile__("esync; rsr %0,ccompare0":"=a" (count));
118-
return count;
119-
}
120-
121-
// this takes a value in the range of (0 - 2^32)
122-
void EspClass::setCycleCompare0(uint32_t count)
123-
{
124-
__asm__ __volatile__("wsr %0,ccompare0; esync"::"a" (count) : "memory");
125-
}
126-
127111
extern EspClass ESP;
128112

129113
#endif //ESP_H

hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_timer.c

-22
Original file line numberDiff line numberDiff line change
@@ -59,25 +59,3 @@ void timer1_disable(){
5959
T1C = 0;
6060
T1I = 0;
6161
}
62-
63-
void(*timer0_user_cb)(void);
64-
65-
void timer0_isr_handler(void *para){
66-
if (timer0_user_cb) {
67-
timer0_user_cb();
68-
}
69-
}
70-
71-
void timer0_isr_init(){
72-
ETS_CCOMPARE0_INTR_ATTACH(timer0_isr_handler, NULL);
73-
}
74-
75-
void timer0_attachInterrupt(void(*userFunc)(void)) {
76-
timer1_user_cb = userFunc;
77-
ETS_CCOMPARE0_ENABLE();
78-
}
79-
80-
void timer0_detachInterrupt() {
81-
timer1_user_cb = NULL;
82-
ETS_CCOMPARE0_DISABLE();
83-
}

hardware/esp8266com/esp8266/tools/sdk/include/ets_sys.h

-22
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,6 @@ typedef void (*int_handler_t)(void*);
4343
#define ETS_GPIO_INUM 4
4444
#define ETS_UART_INUM 5
4545
#define ETS_UART1_INUM 5
46-
#define ETS_CCOMPARE0_INUM 6
4746
#define ETS_FRC_TIMER1_INUM 9 /* use edge*/
4847

4948
#define ETS_INTR_LOCK() \
@@ -52,9 +51,6 @@ typedef void (*int_handler_t)(void*);
5251
#define ETS_INTR_UNLOCK() \
5352
ets_intr_unlock()
5453

55-
#define ETS_CCOMPARE0_INTR_ATTACH(func, arg) \
56-
ets_isr_attach(ETS_CCOMPARE0_INUM, (int_handler_t)(func), (void *)(arg))
57-
5854
#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
5955
ets_isr_attach(ETS_FRC_TIMER1_INUM, (int_handler_t)(func), (void *)(arg))
6056

@@ -73,18 +69,6 @@ typedef void (*int_handler_t)(void*);
7369
#define ETS_INTR_DISABLE(inum) \
7470
ets_isr_mask((1<<inum))
7571

76-
{
77-
uint32_t enabled;
78-
__asm__ __volatile__("esync; rsr %0,intenable":"=a" (enabled));
79-
return enabled;
80-
}
81-
82-
{
83-
uint32_t pending;
84-
__asm__ __volatile__("esync; rsr %0,interrupt":"=a" (pending));
85-
return pending;
86-
}
87-
8872
#define ETS_SPI_INTR_ENABLE() \
8973
ETS_INTR_ENABLE(ETS_SPI_INUM)
9074

@@ -94,12 +78,6 @@ typedef void (*int_handler_t)(void*);
9478
#define ETS_UART_INTR_DISABLE() \
9579
ETS_INTR_DISABLE(ETS_UART_INUM)
9680

97-
#define ETS_CCOMPARE0_ENABLE() \
98-
ETS_INTR_ENABLE(ETS_CCOMPARE0_INUM)
99-
100-
#define ETS_CCOMPARE0_DISABLE() \
101-
ETS_INTR_DISABLE(ETS_CCOMPARE0_INUM)
102-
10381
#define ETS_FRC1_INTR_ENABLE() \
10482
ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
10583

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