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1 parent 2bc7239 commit a7b757bCopy full SHA for a7b757b
regression/cbmc-incr-smt2/bitvector-bitwise-operators/bitwise.desc
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+CORE
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+bitwise_ops.c
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+--incremental-smt2-solver 'z3 --smt2 -in' --slice-formula
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+\[main\.assertion\.1\] line \d+ A and B should be satisfiable: FAILURE
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+\[main\.assertion\.2\] line \d+ A or B should be satisfiable: SUCCESS
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+\[main\.assertion\.3\] line \d+ Not A equals B should be satisfiable: FAILURE
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+^EXIT=10$
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+^SIGNAL=0$
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+--
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regression/cbmc-incr-smt2/bitvector-bitwise-operators/bitwise_ops.c
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+int main()
+{
+ int a;
+ int b;
+
+ __CPROVER_assume(a != 0);
+ __CPROVER_assert(a & b, "A and B should be satisfiable");
+ __CPROVER_assert(a | b, "A or B should be satisfiable");
+ // __CRPOVER_assert(a ^ b, "A xor B should be satisfiable");
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+ __CPROVER_assert(~a == b, "Not A equals B should be satisfiable");
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+}
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