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Merge pull request #4087 from xbauch/docu/partial_order_concurrency
Document partial_order_concurrency [DOC-140]
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src/goto-symex/README.md

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@@ -276,3 +276,10 @@ digraph G {
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2 -> 3 [label="counter-examples"];
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}
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\enddot
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\section Concurrency
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\subsection Partial Order Concurrency
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The class \ref partial_order_concurrencyt provides an interface for
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implementing ordering of concurrent events.

src/goto-symex/partial_order_concurrency.h

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@@ -16,6 +16,9 @@ Author: Michael Tautschnig, [email protected]
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#include "symex_target_equation.h"
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/// Base class for implementing memory models via additional constraints for
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/// SSA equations. Provides methods for encoding ordering of shared read/write
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/// events.
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class partial_order_concurrencyt:public messaget
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{
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public:
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AX_PROPAGATION=8
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};
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/// Build identifier for the read/write clock variable
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/// \param e: either shared read or shared write event
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/// \param axiom: the clock variable to be used (as part of the identifier)
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/// \return identifier representing the clock variable of the event
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static irep_idt rw_clock_id(
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event_it e,
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axiomt axiom=AX_PROPAGATION);
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typedef std::map<irep_idt, a_rect> address_mapt;
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address_mapt address_map;
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/// First call \ref add_init_writes then for each shared read/write (or
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/// spawn) populate:
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/// 1) the _address_map_ (with a list of reads/writes for the address of each
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/// event)
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/// 2) the _numbering_ map (with per-thread unique number of every event)
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/// \param equation: the target equation (containing the events to be
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/// processed)
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void build_event_lists(symex_target_equationt &);
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/// For each shared read event and for each shared write event that appears
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/// after spawn or has false _guard_ prepend a shared write SSA step with
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/// non-deterministic value.
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/// \param equation: the target equation to be modified
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void add_init_writes(symex_target_equationt &);
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// a per-thread numbering of the events
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typedef std::map<event_it, unsigned> numberingt;
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numberingt numbering;
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// produces the symbol ID for an event
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/// Produce the symbol ID for an event
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/// \param event: SSA step for the event
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/// \return identifier
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static inline irep_idt id(event_it event)
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{
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return event->ssa_lhs.get_identifier();
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}
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// produces an address ID for an event
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/// Produce an address ID for an event
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/// \param event: SSA step for the event
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/// \return L1-renamed identifier
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irep_idt address(event_it event) const
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{
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ssa_exprt tmp=event->ssa_lhs;
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tmp.remove_level_2();
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return tmp.get_identifier();
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}
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// produce a clock symbol for some event
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typet clock_type;
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/// Produce a clock symbol for some event
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/// \param e: event is either shared read/write or spawn
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/// \param axiom: clock variable
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/// \return symbol of type _clock_type_ with id from \ref rw_clock_id
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symbol_exprt clock(event_it e, axiomt axiom);
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/// Initialize the __clock_type__ so that it can be used to number events
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void build_clock_type();
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// preprocess and add a constraint to equation
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/// Simplify and add a constraint to equation
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/// \param equation: target equation to be constrained with the \p cond
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/// \param cond: condition expressing the constraint
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/// \param msg: message for the constraint
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/// \param source: the location of the constraint
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void add_constraint(
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symex_target_equationt &equation,
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const exprt &cond,
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const std::string &msg,
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const symex_targett::sourcet &source) const;
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// the partial order constraint for two events
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/// Build the partial order constraint for two events:
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/// if \p e1 and \p e2 are in the same atomic section then constrain with
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/// equality between their clocks
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/// otherwise constrain with \p e1 clock being less than \p e2 clock
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/// \param e1: preceding event
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/// \param e2: succeeding event
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/// \param axioms: clocks to be included in the resulting constraint
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/// \return conjunction of constraints (one of each clock)
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exprt before(event_it e1, event_it e2, unsigned axioms);
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virtual exprt before(event_it e1, event_it e2)=0;
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};

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