Add implemenetation of division operator bvdiv.

Along with tests of its conversion and the function application factory integrity.

Author: NlightNFotis

src/solvers/smt2_incremental/convert_expr_to_smt.cpp

@@ -343,8 +343,10 @@ static smt_termt convert_expr_to_smt(const minus_exprt &minus)
 
 static smt_termt convert_expr_to_smt(const div_exprt &divide)
 {
-  UNIMPLEMENTED_FEATURE(
-    "Generation of SMT formula for divide expression: " + divide.pretty());
+  PRECONDITION(can_cast_type<bitvector_typet>(divide.lhs().type()));
+  PRECONDITION(can_cast_type<bitvector_typet>(divide.rhs().type()));
+  return smt_bit_vector_theoryt::division(
+    convert_expr_to_smt(divide.lhs()), convert_expr_to_smt(divide.rhs()));
 }
 
 static smt_termt convert_expr_to_smt(const ieee_float_op_exprt &float_operation)

src/solvers/smt2_incremental/smt_bit_vector_theory.cpp

@@ -120,3 +120,29 @@ void smt_bit_vector_theoryt::multiplicationt::validate(
 const smt_function_application_termt::factoryt<
   smt_bit_vector_theoryt::multiplicationt>
   smt_bit_vector_theoryt::multiplication{};
+
+const char *smt_bit_vector_theoryt::divisiont::identifier()
+{
+  return "bvdiv";
+}
+
+smt_sortt smt_bit_vector_theoryt::divisiont::return_sort(
+  const smt_termt &lhs,
+  const smt_termt &rhs)
+{
+  // For now, make sure that they have the same bit-width
+  divisiont::validate(lhs, rhs);
+  const auto width = lhs.get_sort().cast<smt_bit_vector_sortt>()->bit_width();
+  return smt_bit_vector_sortt{width};
+}
+
+void smt_bit_vector_theoryt::divisiont::validate(
+  const smt_termt &lhs,
+  const smt_termt &rhs)
+{
+  validate_bit_vector_predicate_arguments(lhs, rhs);
+}
+
+const smt_function_application_termt::factoryt<
+  smt_bit_vector_theoryt::divisiont>
+  smt_bit_vector_theoryt::division{};

src/solvers/smt2_incremental/smt_bit_vector_theory.h

@@ -46,6 +46,14 @@ class smt_bit_vector_theoryt
   };
   static const smt_function_application_termt::factoryt<multiplicationt>
     multiplication;
+
+  struct divisiont final
+  {
+    static const char *identifier();
+    static smt_sortt return_sort(const smt_termt &lhs, const smt_termt &rhs);
+    static void validate(const smt_termt &lhs, const smt_termt &rhs);
+  };
+  static const smt_function_application_termt::factoryt<divisiont> division;
 };
 
 #endif // CPROVER_SOLVERS_SMT2_INCREMENTAL_SMT_BIT_VECTOR_THEORY_H

unit/solvers/smt2_incremental/convert_expr_to_smt.cpp

@@ -328,4 +328,23 @@ TEST_CASE(
     const cbmc_invariants_should_throwt invariants_throw;
     REQUIRE_THROWS(convert_expr_to_smt(mult_exprt{one_bvint, false_exprt{}}));
   }
+
+  // Division is defined over unsigned numbers only (theory notes say it
+  // truncates over zero)
+  SECTION("Division of two constant size bit-vectors")
+  {
+    const auto constructed_term =
+      convert_expr_to_smt(div_exprt{one_bvint_unsigned, two_bvint_unsigned});
+    const auto expected_term =
+      smt_bit_vector_theoryt::division(smt_term_one, smt_term_two);
+    CHECK(constructed_term == expected_term);
+  }
+
+  SECTION(
+    "Ensure that division node conversion fails if the operands are not "
+    "bit-vector based")
+  {
+    const cbmc_invariants_should_throwt invariants_throw;
+    REQUIRE_THROWS(convert_expr_to_smt(div_exprt{one_bvint, false_exprt{}}));
+  }
 }

unit/solvers/smt2_incremental/smt_bit_vector_theory.cpp

@@ -212,4 +212,17 @@ TEST_CASE(
     REQUIRE(function_application.arguments()[0].get() == two);
     REQUIRE(function_application.arguments()[1].get() == three);
   }
+
+  SECTION("Division")
+  {
+    const auto function_application =
+      smt_bit_vector_theoryt::division(two, three);
+    REQUIRE(
+      function_application.function_identifier() ==
+      smt_identifier_termt("bvdiv", smt_bit_vector_sortt{8}));
+    REQUIRE(function_application.get_sort() == smt_bit_vector_sortt{8});
+    REQUIRE(function_application.arguments().size() == 2);
+    REQUIRE(function_application.arguments()[0].get() == two);
+    REQUIRE(function_application.arguments()[1].get() == three);
+  }
 }