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Adding documentation links for arm crc32 intrinsics (rust-lang#1316)
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crates/core_arch/src/aarch64/crc.rs

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@@ -10,6 +10,8 @@ extern "unadjusted" {
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use stdarch_test::assert_instr;
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/// CRC32 single round checksum for quad words (64 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32d)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(test, assert_instr(crc32x))]
@@ -18,6 +20,8 @@ pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 {
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}
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/// CRC32-C single round checksum for quad words (64 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cd)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(test, assert_instr(crc32cx))]

crates/core_arch/src/arm_shared/crc.rs

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@@ -24,6 +24,8 @@ extern "unadjusted" {
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use stdarch_test::assert_instr;
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/// CRC32 single round checksum for bytes (8 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32b)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
@@ -33,6 +35,8 @@ pub unsafe fn __crc32b(crc: u32, data: u8) -> u32 {
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}
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/// CRC32 single round checksum for half words (16 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32h)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
@@ -42,6 +46,8 @@ pub unsafe fn __crc32h(crc: u32, data: u16) -> u32 {
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}
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/// CRC32 single round checksum for words (32 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32w)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
@@ -51,6 +57,8 @@ pub unsafe fn __crc32w(crc: u32, data: u32) -> u32 {
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}
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/// CRC32-C single round checksum for bytes (8 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cb)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
@@ -60,6 +68,8 @@ pub unsafe fn __crc32cb(crc: u32, data: u8) -> u32 {
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}
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/// CRC32-C single round checksum for half words (16 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32ch)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
@@ -69,6 +79,8 @@ pub unsafe fn __crc32ch(crc: u32, data: u16) -> u32 {
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}
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/// CRC32-C single round checksum for words (32 bits).
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///
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/// [Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cw)
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#[inline]
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#[target_feature(enable = "crc")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]

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