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Merge pull request esp8266#12 from esp8266/master
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2 parents 49ed9aa + 5ca0bde commit 6ddf777

27 files changed

+883
-401
lines changed

boards.txt

Lines changed: 180 additions & 120 deletions
Large diffs are not rendered by default.

cores/esp8266/AddrList.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,7 @@ struct netifWrapper
128128
const char* ifmac () const { return (const char*)_netif->hwaddr; }
129129
int ifnumber () const { return _netif->num; }
130130
bool ifUp () const { return !!(_netif->flags & NETIF_FLAG_UP); }
131+
CONST netif* interface () const { return _netif; }
131132

132133
const ip_addr_t* ipFromNetifNum () const
133134
{

cores/esp8266/Esp.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -201,9 +201,10 @@ class EspClass {
201201
bool eraseConfig();
202202

203203
#ifndef CORE_MOCK
204-
inline
205-
#endif
204+
inline uint32_t getCycleCount() __attribute__((always_inline));
205+
#else
206206
uint32_t getCycleCount();
207+
#endif
207208
};
208209

209210
#ifndef CORE_MOCK

cores/esp8266/core_esp8266_eboot_command.cpp

Lines changed: 3 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -21,36 +21,15 @@
2121

2222
#include <stddef.h>
2323
#include <stdbool.h>
24+
#include "coredecls.h"
2425
#include "eboot_command.h"
2526

26-
extern "C" {
2727

28-
static uint32_t crc_update(uint32_t crc, const uint8_t *data, size_t length)
29-
{
30-
uint32_t i;
31-
bool bit;
32-
uint8_t c;
33-
34-
while (length--) {
35-
c = *data++;
36-
for (i = 0x80; i > 0; i >>= 1) {
37-
bit = crc & 0x80000000;
38-
if (c & i) {
39-
bit = !bit;
40-
}
41-
crc <<= 1;
42-
if (bit) {
43-
crc ^= 0x04c11db7;
44-
}
45-
}
46-
}
47-
return crc;
48-
}
28+
extern "C" {
4929

5030
static uint32_t eboot_command_calculate_crc32(const struct eboot_command* cmd)
5131
{
52-
return crc_update(0xffffffff, (const uint8_t*) cmd,
53-
offsetof(struct eboot_command, crc32));
32+
return crc32((const uint8_t*) cmd, offsetof(struct eboot_command, crc32));
5433
}
5534

5635
int eboot_command_read(struct eboot_command* cmd)

cores/esp8266/core_esp8266_features.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,8 @@ namespace arduino
8585
#define xt_rsil(level) (__extension__({uint32_t state; __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state) :: "memory"); state;}))
8686
#define xt_wsr_ps(state) __asm__ __volatile__("wsr %0,ps; isync" :: "a" (state) : "memory")
8787

88-
inline uint32_t esp_get_cycle_count() {
88+
inline uint32_t esp_get_cycle_count() __attribute__((always_inline));
89+
inline uint32_t esp_get_cycle_count() {
8990
uint32_t ccount;
9091
__asm__ __volatile__("rsr %0,ccount":"=a"(ccount));
9192
return ccount;

cores/esp8266/core_esp8266_timer.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ void ICACHE_RAM_ATTR timer1_isr_init(){
4848
ETS_FRC_TIMER1_INTR_ATTACH(timer1_isr_handler, NULL);
4949
}
5050

51-
void timer1_attachInterrupt(timercallback userFunc) {
51+
void ICACHE_RAM_ATTR timer1_attachInterrupt(timercallback userFunc) {
5252
timer1_user_cb = userFunc;
5353
ETS_FRC1_INTR_ENABLE();
5454
}
@@ -59,7 +59,7 @@ void ICACHE_RAM_ATTR timer1_detachInterrupt() {
5959
ETS_FRC1_INTR_DISABLE();
6060
}
6161

62-
void timer1_enable(uint8_t divider, uint8_t int_type, uint8_t reload){
62+
void ICACHE_RAM_ATTR timer1_enable(uint8_t divider, uint8_t int_type, uint8_t reload){
6363
T1C = (1 << TCTE) | ((divider & 3) << TCPD) | ((int_type & 1) << TCIT) | ((reload & 1) << TCAR);
6464
T1I = 0;
6565
}
@@ -90,11 +90,11 @@ void ICACHE_RAM_ATTR timer0_isr_handler(void* para){
9090
}
9191
}
9292

93-
void timer0_isr_init(){
93+
void ICACHE_RAM_ATTR timer0_isr_init(){
9494
ETS_CCOMPARE0_INTR_ATTACH(timer0_isr_handler, NULL);
9595
}
9696

97-
void timer0_attachInterrupt(timercallback userFunc) {
97+
void ICACHE_RAM_ATTR timer0_attachInterrupt(timercallback userFunc) {
9898
timer0_user_cb = userFunc;
9999
ETS_CCOMPARE0_ENABLE();
100100
}

cores/esp8266/coredecls.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ extern "C" {
88

99
// TODO: put declarations here, get rid of -Wno-implicit-function-declaration
1010

11+
#include <stddef.h>
1112
#include <stdint.h>
1213
#include <cont.h> // g_pcont declaration
1314

@@ -20,6 +21,7 @@ void settimeofday_cb (void (*cb)(void));
2021
void disable_extra4k_at_link_time (void) __attribute__((noinline));
2122

2223
uint32_t sqrt32 (uint32_t n);
24+
uint32_t crc32 (const void* data, size_t length, uint32_t crc = 0xffffffff);
2325

2426
#ifdef __cplusplus
2527
}

cores/esp8266/crc32.cpp

Lines changed: 42 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,42 @@
1+
/*
2+
crc32.cpp
3+
4+
Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
5+
This file is part of the esp8266 core for Arduino environment.
6+
7+
This library is free software; you can redistribute it and/or
8+
modify it under the terms of the GNU Lesser General Public
9+
License as published by the Free Software Foundation; either
10+
version 2.1 of the License, or (at your option) any later version.
11+
12+
This library is distributed in the hope that it will be useful,
13+
but WITHOUT ANY WARRANTY; without even the implied warranty of
14+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15+
Lesser General Public License for more details.
16+
17+
You should have received a copy of the GNU Lesser General Public
18+
License along with this library; if not, write to the Free Software
19+
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20+
*/
21+
22+
#include "coredecls.h"
23+
24+
// moved from core_esp8266_eboot_command.cpp
25+
uint32_t crc32 (const void* data, size_t length, uint32_t crc /*= 0xffffffff*/)
26+
{
27+
const uint8_t* ldata = (const uint8_t*)data;
28+
while (length--)
29+
{
30+
uint8_t c = *ldata++;
31+
for (uint32_t i = 0x80; i > 0; i >>= 1)
32+
{
33+
bool bit = crc & 0x80000000;
34+
if (c & i)
35+
bit = !bit;
36+
crc <<= 1;
37+
if (bit)
38+
crc ^= 0x04c11db7;
39+
}
40+
}
41+
return crc;
42+
}

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