stm32h7: adc: use CLKP as clock source

Fixes analogRead() interferring with DSI/SDRAM

Author: facchinm

Diff for: targets/TARGET_STM/TARGET_STM32H7/analogin_device.c

@@ -36,30 +36,7 @@ void analogin_pll_configuration(void)
 
     RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
     PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
-    if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI) {
-        PeriphClkInitStruct.PLL2.PLL2M = 16;
-        PeriphClkInitStruct.PLL2.PLL2N = 120;
-    } else {
-        #if HSE_VALUE==8000000
-        PeriphClkInitStruct.PLL2.PLL2M = 2;
-        PeriphClkInitStruct.PLL2.PLL2N = 120;
-        #elif HSE_VALUE==16000000
-        PeriphClkInitStruct.PLL2.PLL2M = 2;
-        PeriphClkInitStruct.PLL2.PLL2N = 60;
-        #elif HSE_VALUE==25000000
-        PeriphClkInitStruct.PLL2.PLL2M = 5;
-        PeriphClkInitStruct.PLL2.PLL2N = 96;
-        #else
-        error("HSE not configured properly");
-        #endif
-    }
-    PeriphClkInitStruct.PLL2.PLL2P = 3;
-    PeriphClkInitStruct.PLL2.PLL2Q = 4;
-    PeriphClkInitStruct.PLL2.PLL2R = 2;
-    PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_1;
-    PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
-    PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
-    PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
+    PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_CLKP;
     if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
         error("analogin_init HAL_RCCEx_PeriphCLKConfig");
     }