|
66 | 66 | #define CONFIG_DT_HAS_ARM_V7M_NVIC_ENABLED 1
|
67 | 67 | #define CONFIG_DT_HAS_FIXED_CLOCK_ENABLED 1
|
68 | 68 | #define CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED 1
|
| 69 | +#define CONFIG_DT_HAS_GALAXYCORE_GC2145_ENABLED 1 |
69 | 70 | #define CONFIG_DT_HAS_GPIO_KEYS_ENABLED 1
|
70 | 71 | #define CONFIG_DT_HAS_GPIO_LEDS_ENABLED 1
|
71 | 72 | #define CONFIG_DT_HAS_INFINEON_CYW43XXX_BT_HCI_ENABLED 1
|
72 | 73 | #define CONFIG_DT_HAS_MMIO_SRAM_ENABLED 1
|
73 |
| -#define CONFIG_DT_HAS_OVTI_OV7670_ENABLED 1 |
74 | 74 | #define CONFIG_DT_HAS_PWM_CLOCK_ENABLED 1
|
75 | 75 | #define CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED 1
|
76 | 76 | #define CONFIG_DT_HAS_ST_MBOX_STM32_HSEM_ENABLED 1
|
|
111 | 111 | #define CONFIG_DT_HAS_ZEPHYR_BT_HCI_UART_ENABLED 1
|
112 | 112 | #define CONFIG_DT_HAS_ZEPHYR_CDC_ACM_UART_ENABLED 1
|
113 | 113 | #define CONFIG_DT_HAS_ZEPHYR_MEMORY_REGION_ENABLED 1
|
114 |
| -#define CONFIG_TAINT_BLOBS 1 |
115 | 114 | #define CONFIG_ZEPHYR_ARDUINO_API_MODULE 1
|
116 | 115 | #define CONFIG_ZEPHYR_CMSIS_MODULE 1
|
117 | 116 | #define CONFIG_HAS_CMSIS_CORE 1
|
|
124 | 123 | #define CONFIG_ZEPHYR_HAL_INTEL_MODULE 1
|
125 | 124 | #define CONFIG_ZEPHYR_HAL_NORDIC_MODULE 1
|
126 | 125 | #define CONFIG_ZEPHYR_HAL_NXP_MODULE 1
|
127 |
| -#define CONFIG_ZEPHYR_HAL_NXP_MODULE_BLOBS 1 |
128 | 126 | #define CONFIG_ZEPHYR_HAL_RENESAS_MODULE 1
|
129 | 127 | #define CONFIG_ZEPHYR_HAL_RPI_PICO_MODULE 1
|
130 | 128 | #define CONFIG_ZEPHYR_HAL_SILABS_MODULE 1
|
|
138 | 136 | #define CONFIG_ZEPHYR_TINYCRYPT_MODULE 1
|
139 | 137 | #define CONFIG_HAS_STM32CUBE 1
|
140 | 138 | #define CONFIG_USE_STM32_HAL_CORTEX 1
|
| 139 | +#define CONFIG_USE_STM32_HAL_DCMI 1 |
| 140 | +#define CONFIG_USE_STM32_HAL_DMA 1 |
| 141 | +#define CONFIG_USE_STM32_HAL_DMA_EX 1 |
141 | 142 | #define CONFIG_USE_STM32_HAL_MDMA 1
|
142 | 143 | #define CONFIG_USE_STM32_HAL_PCD 1
|
143 | 144 | #define CONFIG_USE_STM32_HAL_PCD_EX 1
|
|
373 | 374 | #define CONFIG_NRF_USBD_COMMON_LOG_LEVEL 3
|
374 | 375 | #define CONFIG_USBC_LOG_LEVEL_DEFAULT 1
|
375 | 376 | #define CONFIG_USBC_LOG_LEVEL 3
|
| 377 | +#define CONFIG_VIDEO 1 |
| 378 | +#define CONFIG_VIDEO_LOG_LEVEL_DBG 1 |
| 379 | +#define CONFIG_VIDEO_LOG_LEVEL 4 |
| 380 | +#define CONFIG_VIDEO_INIT_PRIORITY 60 |
| 381 | +#define CONFIG_VIDEO_BUFFER_POOL_SZ_MAX 160000 |
| 382 | +#define CONFIG_VIDEO_BUFFER_POOL_NUM_MAX 1 |
| 383 | +#define CONFIG_VIDEO_BUFFER_POOL_ALIGN 32 |
| 384 | +#define CONFIG_VIDEO_STM32_DCMI 1 |
| 385 | +#define CONFIG_VIDEO_GC2145 1 |
| 386 | +#define CONFIG_VIDEO_EMUL_IMAGER_FRAMEBUFFER_SIZE 4096 |
376 | 387 | #define CONFIG_SHELL_STACK_SIZE 2048
|
377 | 388 | #define CONFIG_FULL_LIBC_SUPPORTED 1
|
378 | 389 | #define CONFIG_MINIMAL_LIBC_SUPPORTED 1
|
|
558 | 569 | #define CONFIG_CHECK_INIT_PRIORITIES 1
|
559 | 570 | #define CONFIG_WARN_DEPRECATED 1
|
560 | 571 | #define CONFIG_EXPERIMENTAL 1
|
561 |
| -#define CONFIG_TAINT 1 |
562 | 572 | #define CONFIG_ENFORCE_ZEPHYR_STDINT 1
|
563 | 573 | #define CONFIG_LEGACY_GENERATED_INCLUDE_PATH 1
|
0 commit comments