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lines changed Original file line number Diff line number Diff line change 27
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* - OSC8M clock source is enabled with a divider by 8 (1MHz).
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* - Generic Clock Generator 0 (GCLKMAIN) is using OSC8M as source.
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* We need to:
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- * 1) Enable XOSC32K clock (External on-board 32.768Hz oscillator), will be used as DFLL48M reference.
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+ * 1) Enable XOSC32K clock (External on-board 32.768KHz oscillator), will be used as DFLL48M reference.
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* 2) Put XOSC32K as source of Generic Clock Generator 1
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* 3) Put Generic Clock Generator 1 as source for Generic Clock Multiplexer 0 (DFLL48M reference)
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* 4) Enable DFLL48M clock
@@ -56,7 +56,7 @@ void SystemInit( void )
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#if defined(CRYSTALLESS )
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/* ----------------------------------------------------------------------------------------------
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- * 1) Enable OSC32K clock (Internal 32.768Hz oscillator)
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+ * 1) Enable OSC32K clock (Internal 32.768KHz oscillator)
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*/
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uint32_t calib = (* ((uint32_t * ) FUSES_OSC32K_CAL_ADDR ) & FUSES_OSC32K_CAL_Msk ) >> FUSES_OSC32K_CAL_Pos ;
@@ -71,7 +71,7 @@ void SystemInit( void )
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#else // has crystal
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/* ----------------------------------------------------------------------------------------------
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- * 1) Enable XOSC32K clock (External on-board 32.768Hz oscillator)
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+ * 1) Enable XOSC32K clock (External on-board 32.768KHz oscillator)
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*/
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SYSCTRL -> XOSC32K .reg = SYSCTRL_XOSC32K_STARTUP ( 0x6u ) | /* cf table 15.10 of product datasheet in chapter 15.8.6 */
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SYSCTRL_XOSC32K_XTALEN | SYSCTRL_XOSC32K_EN32K ;
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