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Merge branch 'main' into wific3_new_buildscript
2 parents abc3929 + d0c5148 commit d521ebd

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59 files changed

+188126
-196
lines changed

Diff for: ‎.gitignore

+3
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,7 @@
11
.idea
2+
compile_commands.json
3+
.clangd
4+
.cache/
25
cores/arduino/mydebug.cpp
36
libraries/Storage/.development
47
cores/arduino/mydebug.cpp.donotuse

Diff for: ‎boards.txt

+16
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,12 @@ portenta_c33.upload.native_usb=true
4646
portenta_c33.upload.maximum_size=2097152
4747
portenta_c33.upload.maximum_data_size=523624
4848

49+
portenta_c33.debug.server.openocd.scripts.0=interface/{programmer.protocol}.cfg
50+
portenta_c33.debug.server.openocd.scripts.1={programmer.transport_script}
51+
portenta_c33.debug.server.openocd.scripts.2={runtime.platform.path}/debugger/R7FA6M5BH.cfg
52+
portenta_c33.debug.svd_file={runtime.platform.path}/svd/R7FA6M5BH.svd
53+
54+
4955
##############################################################
5056

5157
minima.name=Arduino UNO R4 Minima
@@ -94,6 +100,11 @@ minima.upload.native_usb=true
94100
minima.upload.maximum_size=262144
95101
minima.upload.maximum_data_size=32768
96102

103+
minima.debug.server.openocd.scripts.0=interface/{programmer.protocol}.cfg
104+
minima.debug.server.openocd.scripts.1={programmer.transport_script}
105+
minima.debug.server.openocd.scripts.2={runtime.platform.path}/debugger/R7FA4M1AB.cfg
106+
minima.debug.svd_file={runtime.platform.path}/svd/R7FA4M1AB.svd
107+
97108
##############################################################
98109

99110
unor4wifi.name=Arduino UNO R4 WiFi
@@ -140,6 +151,11 @@ unor4wifi.upload.native_usb=true
140151
unor4wifi.upload.maximum_size=262144
141152
unor4wifi.upload.maximum_data_size=32768
142153

154+
unor4wifi.debug.server.openocd.scripts.0=interface/{programmer.protocol}.cfg
155+
unor4wifi.debug.server.openocd.scripts.1={programmer.transport_script}
156+
unor4wifi.debug.server.openocd.scripts.2={runtime.platform.path}/debugger/R7FA4M1AB.cfg
157+
unor4wifi.debug.svd_file={runtime.platform.path}/svd/R7FA4M1AB.svd
158+
143159
##############################################################
144160

145161
muxto.name=Science Kit R3 Audio Module

Diff for: ‎cores/arduino/IRQManager.cpp

+53-40
Original file line numberDiff line numberDiff line change
@@ -556,79 +556,85 @@ bool IRQManager::addPeripheral(Peripheral_t p, void *cfg) {
556556
#endif
557557

558558
#if WIRE_HOWMANY > 0
559+
/* I2C true NOT SCI */
559560
else if(p == IRQ_I2C_MASTER && cfg != NULL) {
560-
I2CIrqMasterReq_t *p_cfg = (I2CIrqMasterReq_t *)cfg;
561-
//iic_master_instance_ctrl_t *ctrl = (iic_master_instance_ctrl_t *)p_cfg->ctrl;
562-
i2c_master_cfg_t *mcfg = (i2c_master_cfg_t *)p_cfg->cfg;
563-
uint8_t hw_channel = p_cfg->hw_channel;
561+
I2CIrqReq_t *p_cfg = (I2CIrqReq_t *)cfg;
562+
i2c_master_cfg_t *mcfg = (i2c_master_cfg_t *)p_cfg->mcfg;
563+
i2c_slave_cfg_t *scfg = (i2c_slave_cfg_t *)p_cfg->scfg;
564564
mcfg->ipl = I2C_MASTER_PRIORITY;
565+
565566
if (mcfg->txi_irq == FSP_INVALID_VECTOR) {
566567
/* TX interrupt */
567568
mcfg->txi_irq = (IRQn_Type)last_interrupt_index;
568-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_master_txi_isr;
569-
set_iic_tx_link_event(last_interrupt_index, hw_channel);
569+
scfg->txi_irq = (IRQn_Type)last_interrupt_index;
570+
set_iic_tx_link_event(last_interrupt_index, p_cfg->mcfg->channel);
570571
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
571572
last_interrupt_index++;
572573

573574
/* RX interrupt */
574575
mcfg->rxi_irq = (IRQn_Type)last_interrupt_index;
575-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_master_rxi_isr;
576-
set_iic_rx_link_event(last_interrupt_index, hw_channel);
576+
scfg->rxi_irq = (IRQn_Type)last_interrupt_index;
577+
set_iic_rx_link_event(last_interrupt_index, p_cfg->mcfg->channel);
577578
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
578579
last_interrupt_index++;
579580

580581
/* TX ERROR interrupt */
581582
mcfg->tei_irq = (IRQn_Type)last_interrupt_index;
582-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_master_tei_isr;
583-
set_iic_tei_link_event(last_interrupt_index, hw_channel);
583+
scfg->tei_irq = (IRQn_Type)last_interrupt_index;
584+
set_iic_tei_link_event(last_interrupt_index, p_cfg->mcfg->channel);
584585
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
585586
last_interrupt_index++;
586587

587588
/* RX ERROR interrupt */
588589
mcfg->eri_irq = (IRQn_Type)last_interrupt_index;
589-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_master_eri_isr;
590-
set_iic_eri_link_event(last_interrupt_index, hw_channel);
590+
scfg->eri_irq = (IRQn_Type)last_interrupt_index;
591+
set_iic_eri_link_event(last_interrupt_index, p_cfg->mcfg->channel);
591592
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
592593
last_interrupt_index++;
593594
}
595+
596+
*(irq_ptr + mcfg->txi_irq) = (uint32_t)iic_master_txi_isr;
597+
*(irq_ptr + mcfg->rxi_irq) = (uint32_t)iic_master_rxi_isr;
598+
*(irq_ptr + mcfg->tei_irq) = (uint32_t)iic_master_tei_isr;
599+
*(irq_ptr + mcfg->eri_irq) = (uint32_t)iic_master_eri_isr;
600+
594601
R_BSP_IrqEnable (mcfg->txi_irq);
595602
R_BSP_IrqEnable (mcfg->rxi_irq);
596603
R_BSP_IrqEnable (mcfg->tei_irq);
597604
R_BSP_IrqEnable (mcfg->eri_irq);
598605
}
606+
/* I2C SCI MASTER (only) */
599607
else if(p == IRQ_SCI_I2C_MASTER && cfg != NULL) {
600-
I2CIrqMasterReq_t *p_cfg = (I2CIrqMasterReq_t *)cfg;
601-
//iic_master_instance_ctrl_t *ctrl = (iic_master_instance_ctrl_t *)p_cfg->ctrl;
602-
i2c_master_cfg_t *mcfg = (i2c_master_cfg_t *)p_cfg->cfg;
603-
uint8_t hw_channel = p_cfg->hw_channel;
608+
I2CIrqReq_t *p_cfg = (I2CIrqReq_t *)cfg;
609+
i2c_master_cfg_t *mcfg = (i2c_master_cfg_t *)p_cfg->mcfg;
604610
mcfg->ipl = I2C_MASTER_PRIORITY;
605611
if (mcfg->txi_irq == FSP_INVALID_VECTOR) {
606612
/* TX interrupt */
607613
mcfg->txi_irq = (IRQn_Type)last_interrupt_index;
608614
*(irq_ptr + last_interrupt_index) = (uint32_t)sci_i2c_txi_isr;
609-
set_sci_tx_link_event(last_interrupt_index, hw_channel);
615+
set_sci_tx_link_event(last_interrupt_index, p_cfg->mcfg->channel);
610616
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
611617
last_interrupt_index++;
612618

613619
/* RX interrupt */
614620
mcfg->rxi_irq = (IRQn_Type)last_interrupt_index;
615621
*(irq_ptr + last_interrupt_index) = (uint32_t)sci_i2c_rxi_isr;
616-
set_sci_rx_link_event(last_interrupt_index, hw_channel);
622+
set_sci_rx_link_event(last_interrupt_index, p_cfg->mcfg->channel);
617623
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
618624
last_interrupt_index++;
619625

620626
/* TX ERROR interrupt */
621627
mcfg->tei_irq = (IRQn_Type)last_interrupt_index;
622628
*(irq_ptr + last_interrupt_index) = (uint32_t)sci_i2c_tei_isr;
623-
set_sci_tei_link_event(last_interrupt_index, hw_channel);
629+
set_sci_tei_link_event(last_interrupt_index, p_cfg->mcfg->channel);
624630
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
625631
last_interrupt_index++;
626632

627633
/* RX ERROR interrupt */
628634
#if 0
629635
mcfg->eri_irq = (IRQn_Type)last_interrupt_index;
630636
*(irq_ptr + last_interrupt_index) = (uint32_t)sci_i2c_eri_isr;
631-
set_sci_eri_link_event(last_interrupt_index, hw_channel);
637+
set_sci_eri_link_event(last_interrupt_index, p_cfg->mcfg->channel);
632638
R_BSP_IrqCfg((IRQn_Type)last_interrupt_index, I2C_MASTER_PRIORITY, mcfg);
633639
last_interrupt_index++;
634640
#endif
@@ -641,38 +647,45 @@ bool IRQManager::addPeripheral(Peripheral_t p, void *cfg) {
641647
#endif
642648
}
643649
else if(p == IRQ_I2C_SLAVE && cfg != NULL) {
644-
i2c_slave_cfg_t *p_cfg = (i2c_slave_cfg_t *)cfg;
645-
p_cfg->ipl = I2C_SLAVE_PRIORITY;
646-
p_cfg->eri_ipl = I2C_SLAVE_PRIORITY;
647-
if (p_cfg->txi_irq == FSP_INVALID_VECTOR) {
650+
I2CIrqReq_t *p_cfg = (I2CIrqReq_t *)cfg;
651+
i2c_master_cfg_t *mcfg = (i2c_master_cfg_t *)p_cfg->mcfg;
652+
i2c_slave_cfg_t *scfg = (i2c_slave_cfg_t *)p_cfg->scfg;
653+
scfg->ipl = I2C_SLAVE_PRIORITY;
654+
scfg->eri_ipl = I2C_SLAVE_PRIORITY;
655+
656+
if (scfg->txi_irq == FSP_INVALID_VECTOR) {
648657
/* TX interrupt */
649-
p_cfg->txi_irq = (IRQn_Type)last_interrupt_index;
650-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_slave_txi_isr;
651-
set_iic_tx_link_event(last_interrupt_index, p_cfg->channel);
658+
mcfg->txi_irq = (IRQn_Type)last_interrupt_index;
659+
scfg->txi_irq = (IRQn_Type)last_interrupt_index;
660+
set_iic_tx_link_event(last_interrupt_index, scfg->channel);
652661
last_interrupt_index++;
653662

654663
/* RX interrupt */
655-
p_cfg->rxi_irq = (IRQn_Type)last_interrupt_index;
656-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_slave_rxi_isr;
657-
set_iic_rx_link_event(last_interrupt_index, p_cfg->channel);
664+
scfg->rxi_irq = (IRQn_Type)last_interrupt_index;
665+
mcfg->rxi_irq = (IRQn_Type)last_interrupt_index;
666+
set_iic_rx_link_event(last_interrupt_index, scfg->channel);
658667
last_interrupt_index++;
659668

660669
/* TEI interrupt */
661-
p_cfg->tei_irq = (IRQn_Type)last_interrupt_index;
662-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_slave_tei_isr;
663-
set_iic_tei_link_event(last_interrupt_index, p_cfg->channel);
670+
scfg->tei_irq = (IRQn_Type)last_interrupt_index;
671+
mcfg->tei_irq = (IRQn_Type)last_interrupt_index;
672+
set_iic_tei_link_event(last_interrupt_index, scfg->channel);
664673
last_interrupt_index++;
665674

666675
/* ERI interrupt */
667-
p_cfg->eri_irq = (IRQn_Type)last_interrupt_index;
668-
*(irq_ptr + last_interrupt_index) = (uint32_t)iic_slave_eri_isr;
669-
set_iic_eri_link_event(last_interrupt_index, p_cfg->channel);
676+
scfg->eri_irq = (IRQn_Type)last_interrupt_index;
677+
mcfg->eri_irq = (IRQn_Type)last_interrupt_index;
678+
set_iic_eri_link_event(last_interrupt_index, scfg->channel);
670679
last_interrupt_index++;
671680
}
672-
R_BSP_IrqEnable (p_cfg->txi_irq);
673-
R_BSP_IrqEnable (p_cfg->rxi_irq);
674-
R_BSP_IrqEnable (p_cfg->tei_irq);
675-
R_BSP_IrqEnable (p_cfg->eri_irq);
681+
*(irq_ptr + scfg->txi_irq) = (uint32_t)iic_slave_txi_isr;
682+
*(irq_ptr + scfg->rxi_irq) = (uint32_t)iic_slave_rxi_isr;
683+
*(irq_ptr + scfg->tei_irq) = (uint32_t)iic_slave_tei_isr;
684+
*(irq_ptr + scfg->eri_irq) = (uint32_t)iic_slave_eri_isr;
685+
R_BSP_IrqEnable (scfg->txi_irq);
686+
R_BSP_IrqEnable (scfg->rxi_irq);
687+
R_BSP_IrqEnable (scfg->tei_irq);
688+
R_BSP_IrqEnable (scfg->eri_irq);
676689

677690
}
678691
#endif

Diff for: ‎cores/arduino/IRQManager.h

+4-12
Original file line numberDiff line numberDiff line change
@@ -74,18 +74,10 @@ typedef struct rtc_irq {
7474
#include "r_iic_master.h"
7575
#include "r_iic_slave.h"
7676

77-
typedef struct i2c_master_irq {
78-
iic_master_instance_ctrl_t *ctrl;
79-
i2c_master_cfg_t *cfg;
80-
uint8_t hw_channel;
81-
82-
} I2CIrqMasterReq_t;
83-
84-
typedef struct i2c_slave_irq {
85-
iic_slave_instance_ctrl_t *ctrl;
86-
i2c_slave_cfg_t *cfg;
87-
88-
} I2CIrqSlaveReq_t;
77+
typedef struct i2c_irq_req {
78+
i2c_master_cfg_t *mcfg;
79+
i2c_slave_cfg_t *scfg;
80+
} I2CIrqReq_t;
8981
#endif
9082

9183
#if SPI_HOWMANY > 0

Diff for: ‎cores/arduino/analog.cpp

+5-1
Original file line numberDiff line numberDiff line change
@@ -570,13 +570,17 @@ float analogReference() {
570570
case ADC_VREF_CONTROL_VREFH0_AVSS0:
571571
// the user must know the voltage he applies from outside
572572
return NAN;
573+
#ifdef AR_INTERNAL_VOLTAGE
574+
case ADC_VREF_CONTROL_IVREF_AVSS0:
575+
return AR_INTERNAL_VOLTAGE;
576+
#endif
573577
default:
574578
#if defined(AVCC_MEASURE_PIN)
575579
if (aref == 0) {
576580
analogReference(AR_INTERNAL);
577581
delayMicroseconds(5);
578582
for (int i = 0; i < 10; i++) {
579-
aref += analogRead(AVCC_MEASURE_PIN) * 1.43f * AVCC_MULTIPLY_FACTOR / (1 << _analogRequestedReadResolution);
583+
aref += analogRead(AVCC_MEASURE_PIN) * AR_INTERNAL_VOLTAGE * AVCC_MULTIPLY_FACTOR / (1 << _analogRequestedReadResolution);
580584
}
581585
aref = aref / 10;
582586
analogReference(AR_DEFAULT);

Diff for: ‎cores/arduino/pwm.cpp

+22
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,28 @@ bool PwmOut::begin(uint32_t period_width, uint32_t pulse_width, bool raw /*= fal
9090
return _enabled;
9191
}
9292

93+
/* -------------------------------------------------------------------------- */
94+
bool PwmOut::begin(float freq_hz, float duty_perc) {
95+
/* -------------------------------------------------------------------------- */
96+
_enabled = true;
97+
int max_index = PINS_COUNT;
98+
_enabled &= cfg_pin(max_index);
99+
100+
if(_enabled) {
101+
_enabled &= timer.begin(TIMER_MODE_PWM, (_is_agt) ? AGT_TIMER : GPT_TIMER, timer_channel, freq_hz, duty_perc);
102+
}
103+
104+
if(_enabled) {
105+
timer.add_pwm_extended_cfg();
106+
timer.enable_pwm_channel(_pwm_channel);
107+
108+
_enabled &= timer.open();
109+
_enabled &= timer.start();
110+
}
111+
112+
return _enabled;
113+
}
114+
93115
bool PwmOut::period(int ms) {
94116
return timer.set_period_ms((double)ms);
95117
}

Diff for: ‎cores/arduino/pwm.h

+1
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ class PwmOut {
2222
TIMER_SOURCE_DIV_256
2323
TIMER_SOURCE_DIV_1024 */
2424
bool begin(uint32_t period_usec, uint32_t pulse_usec, bool raw = false, timer_source_div_t sd = TIMER_SOURCE_DIV_1);
25+
bool begin(float freq_hz, float duty_perc);
2526
void end();
2627
bool period(int ms);
2728
bool pulseWidth(int ms);

Diff for: ‎cores/arduino/time.cpp

+5-2
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,11 @@
44

55
// this file implements the following public funcions: delay, delayMicroseconds, yield, millis, micros
66

7-
__attribute__((weak)) void delay(uint32_t ms) {
8-
R_BSP_SoftwareDelay(ms, BSP_DELAY_UNITS_MILLISECONDS);
7+
__attribute__((weak)) void delay(uint32_t ms)
8+
{
9+
auto const start = millis();
10+
auto const stop = start + ms;
11+
while(millis() < stop) yield();
912
}
1013

1114
void delayMicroseconds(unsigned int us) {

Diff for: ‎debugger/R7FA4M1AB.cfg

+51
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,51 @@
1+
#
2+
# Renesas RA4M1 w/ ARM Cortex-M4 @ 48 MHz
3+
#
4+
5+
if { [info exists CHIPNAME] } {
6+
set _CHIPNAME $CHIPNAME
7+
} else {
8+
set _CHIPNAME ra4m1
9+
}
10+
11+
if { [info exists CPU_JTAG_TAPID] } {
12+
set _CPU_JTAG_TAPID $CPU_JTAG_TAPID
13+
} else {
14+
set _CPU_JTAG_TAPID 0x5ba00477
15+
}
16+
17+
if { [info exists CPU_SWD_TAPID] } {
18+
set _CPU_SWD_TAPID $CPU_SWD_TAPID
19+
} else {
20+
set _CPU_SWD_TAPID 0x5ba02477
21+
}
22+
23+
source [find target/swj-dp.tcl]
24+
25+
if { [using_jtag] } {
26+
set _CPU_TAPID $_CPU_JTAG_TAPID
27+
} else {
28+
set _CPU_TAPID $_CPU_SWD_TAPID
29+
}
30+
31+
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_TAPID
32+
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
33+
34+
set _TARGETNAME $_CHIPNAME.cpu
35+
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
36+
37+
if { [info exists WORKAREASIZE] } {
38+
set _WORKAREASIZE $WORKAREASIZE
39+
} else {
40+
# 32 KB On-Chip SRAM
41+
set _WORKAREASIZE 0x8000
42+
}
43+
44+
$_TARGETNAME configure -work-area-phys 0x20000000 \
45+
-work-area-size $_WORKAREASIZE -work-area-backup 0
46+
47+
if { ![using_hla] } {
48+
cortex_m reset_config sysresetreq
49+
}
50+
51+
adapter speed 1000

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