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Hsubtnargpennam
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Serial: split uart events TX_COMPLETE from TX_DATA_EMPTY
Use UART_EVEN_TX_COMPLETE to determine when flush() should return
1 parent 04d998d commit 443a404

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2 files changed

+17
-12
lines changed

2 files changed

+17
-12
lines changed

Diff for: cores/arduino/Serial.cpp

+15-11
Original file line numberDiff line numberDiff line change
@@ -58,12 +58,14 @@ void UART::WrapperCallback(uart_callback_args_t *p_args) {
5858
{
5959
break;
6060
}
61-
case UART_EVENT_TX_COMPLETE:
62-
case UART_EVENT_TX_DATA_EMPTY:
61+
case UART_EVENT_TX_COMPLETE: // This is call when the transmission is complete
6362
{
64-
//uint8_t to_enqueue = uart_ptr->txBuffer.available() < uart_ptr->uart_ctrl.fifo_depth ? uart_ptr->txBuffer.available() : uart_ptr->uart_ctrl.fifo_depth;
65-
//while (to_enqueue) {
66-
uart_ptr->tx_done = true;
63+
uart_ptr->tx_complete = true;
64+
break;
65+
}
66+
case UART_EVENT_TX_DATA_EMPTY: // This is called when the buffer is empty
67+
{ // Last byte is transmitting, but ready for more data
68+
uart_ptr->tx_empty = true;
6769
break;
6870
}
6971
case UART_EVENT_RX_CHAR:
@@ -109,9 +111,10 @@ bool UART::setUpUartIrqs(uart_cfg_t &cfg) {
109111
size_t UART::write(uint8_t c) {
110112
/* -------------------------------------------------------------------------- */
111113
if(init_ok) {
112-
tx_done = false;
114+
tx_empty = false;
115+
tx_complete = false;
113116
R_SCI_UART_Write(&uart_ctrl, &c, 1);
114-
while (!tx_done) {}
117+
while (!tx_empty) {}
115118
return 1;
116119
}
117120
else {
@@ -121,9 +124,10 @@ size_t UART::write(uint8_t c) {
121124

122125
size_t UART::write(uint8_t* c, size_t len) {
123126
if(init_ok) {
124-
tx_done = false;
127+
tx_empty = false;
128+
tx_complete = false;
125129
R_SCI_UART_Write(&uart_ctrl, c, len);
126-
while (!tx_done) {}
130+
while (!tx_empty) {}
127131
return len;
128132
}
129133
else {
@@ -322,7 +326,7 @@ int UART::read() {
322326
/* -------------------------------------------------------------------------- */
323327
void UART::flush() {
324328
/* -------------------------------------------------------------------------- */
325-
while(txBuffer.available());
329+
while(!tx_complete);
326330
}
327331

328332
/* -------------------------------------------------------------------------- */
@@ -335,4 +339,4 @@ size_t UART::write_raw(uint8_t* c, size_t len) {
335339
i++;
336340
}
337341
return len;
338-
}
342+
}

Diff for: cores/arduino/Serial.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,8 @@ class UART : public arduino::HardwareSerial {
7878
arduino::SafeRingBufferN<SERIAL_BUFFER_SIZE> rxBuffer;
7979
arduino::SafeRingBufferN<SERIAL_BUFFER_SIZE> txBuffer;
8080

81-
volatile bool tx_done;
81+
volatile bool tx_empty;
82+
volatile bool tx_complete;
8283

8384
sci_uart_instance_ctrl_t uart_ctrl;
8485
uart_cfg_t uart_cfg;

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