Skip to content

Commit b18ad7a

Browse files
facchinmfacchinm
committed
Recompile variants
1 parent 32e855a commit b18ad7a

File tree

27 files changed

+47
-71
lines changed

27 files changed

+47
-71
lines changed

Diff for: ‎cores/arduino/mbed/connectivity/nanostack/sal-stack-nanostack/source/6LoWPAN/ws/ws_bootstrap_lfn.h

-43
This file was deleted.

Diff for: ‎variants/ARDUINO_NANO33BLE/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@
3434
-DFEATURE_STORAGE=1
3535
-D__FPU_PRESENT=1
3636
-D__MBED__=1
37-
-DMBED_BUILD_TIMESTAMP=1657634139.8909109
37+
-DMBED_BUILD_TIMESTAMP=1662124743.5782256
3838
-D__MBED_CMSIS_RTOS_CM
3939
-DMBED_MPU_CUSTOM
4040
-DMBED_TICKLESS
@@ -66,6 +66,6 @@
6666
-DWSF_MAX_HANDLERS=10
6767
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
6868
-DCORE_MAJOR=3
69-
-DCORE_MINOR=2
69+
-DCORE_MINOR=3
7070
-DCORE_PATCH=0
7171
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/ARDUINO_NANO33BLE/libs/libmbed.a

8.47 KB
Binary file not shown.

Diff for: ‎variants/EDGE_CONTROL/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@
3838
-DFEATURE_STORAGE=1
3939
-D__FPU_PRESENT=1
4040
-D__MBED__=1
41-
-DMBED_BUILD_TIMESTAMP=1657634299.426995
41+
-DMBED_BUILD_TIMESTAMP=1662124896.2555702
4242
-D__MBED_CMSIS_RTOS_CM
4343
-DMBED_MPU_CUSTOM
4444
-DMBED_TICKLESS
@@ -70,6 +70,6 @@
7070
-DWSF_MAX_HANDLERS=10
7171
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
7272
-DCORE_MAJOR=3
73-
-DCORE_MINOR=2
73+
-DCORE_MINOR=3
7474
-DCORE_PATCH=0
7575
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/EDGE_CONTROL/libs/libmbed.a

8.54 KB
Binary file not shown.

Diff for: ‎variants/NANO_RP2040_CONNECT/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
-DDEVICE_USTICKER=1
2121
-DDEVICE_WATCHDOG=1
2222
-D__MBED__=1
23-
-DMBED_BUILD_TIMESTAMP=1657634119.7651937
23+
-DMBED_BUILD_TIMESTAMP=1662124722.8055787
2424
-D__MBED_CMSIS_RTOS_CM
2525
-DMBED_MPU_CUSTOM
2626
-DMBEDTLS_ENTROPY_NV_SEED
@@ -45,6 +45,6 @@
4545
-DTOOLCHAIN_GCC_ARM
4646
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
4747
-DCORE_MAJOR=3
48-
-DCORE_MINOR=2
48+
-DCORE_MINOR=3
4949
-DCORE_PATCH=0
5050
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/NANO_RP2040_CONNECT/libs/libmbed.a

11.8 KB
Binary file not shown.

Diff for: ‎variants/NICLA/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
-DFEATURE_BLE=1
3434
-D__FPU_PRESENT=1
3535
-D__MBED__=1
36-
-DMBED_BUILD_TIMESTAMP=1657634333.4979331
36+
-DMBED_BUILD_TIMESTAMP=1662124928.8471718
3737
-D__MBED_CMSIS_RTOS_CM
3838
-DMBED_MPU_CUSTOM
3939
-DMBED_TICKLESS
@@ -76,6 +76,6 @@
7676
-DTOOLCHAIN_GCC_ARM
7777
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
7878
-DCORE_MAJOR=3
79-
-DCORE_MINOR=2
79+
-DCORE_MINOR=3
8080
-DCORE_PATCH=0
8181
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/NICLA/libs/libmbed.a

9.01 KB
Binary file not shown.

Diff for: ‎variants/NICLA_VISION/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
-DFLOW_SILENT
4646
-D__FPU_PRESENT=1
4747
-D__MBED__=1
48-
-DMBED_BUILD_TIMESTAMP=1657634365.6035068
48+
-DMBED_BUILD_TIMESTAMP=1662124959.407307
4949
-D__MBED_CMSIS_RTOS_CM
5050
-DMBED_TICKLESS
5151
-DMBEDTLS_FS_IO
@@ -84,6 +84,6 @@
8484
-DVIRTIO_MASTER_ONLY
8585
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
8686
-DCORE_MAJOR=3
87-
-DCORE_MINOR=2
87+
-DCORE_MINOR=3
8888
-DCORE_PATCH=0
8989
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/NICLA_VISION/libs/libmbed.a

11.1 KB
Binary file not shown.

Diff for: ‎variants/PORTENTA_H7_M4/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@
4444
-DFEATURE_BLE=1
4545
-D__FPU_PRESENT=1
4646
-D__MBED__=1
47-
-DMBED_BUILD_TIMESTAMP=1657634246.2822626
47+
-DMBED_BUILD_TIMESTAMP=1662124845.668187
4848
-D__MBED_CMSIS_RTOS_CM
4949
-DMBED_MPU_CUSTOM
5050
-DMBED_TICKLESS
@@ -83,6 +83,6 @@
8383
-DVIRTIO_SLAVE_ONLY
8484
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
8585
-DCORE_MAJOR=3
86-
-DCORE_MINOR=2
86+
-DCORE_MINOR=3
8787
-DCORE_PATCH=0
8888
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/PORTENTA_H7_M4/libs/libmbed.a

11.8 KB
Binary file not shown.

Diff for: ‎variants/PORTENTA_H7_M4/linker_script.ld

+7-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
MEMORY
22
{
3-
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = CM4_BINARY_END - CM4_BINARY_START
3+
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = 0x100000
44
RAM (rwx) : ORIGIN = 0x10000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 0x48000 - (((166 * 4) + 7) & 0xFFFFFFF8)
55
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
66
}
@@ -93,6 +93,12 @@ SECTIONS
9393
. = ABSOLUTE(0x3800FC00);
9494
*(.pdm_buffer)
9595
} > RAM_D3
96+
_dtcm_lma = __etext + SIZEOF(.data);
97+
.dtcm : AT(_dtcm_lma) {
98+
_sdtcm = .;
99+
*(.dtcm*)
100+
_edtcm = .;
101+
} > DTCMRAM
96102
.heap (COPY):
97103
{
98104
__end__ = .;

Diff for: ‎variants/PORTENTA_H7_M4/mbed_config.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -380,7 +380,7 @@
380380
#define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:MCU_STM32H7
381381
#define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32
382382
#define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1|USE_LPUART_CLK_PCLK3 // set by target:MCU_STM32
383-
#define MBED_CONF_TARGET_LSE_AVAILABLE 0 // set by target:PORTENTA_H7
383+
#define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:PORTENTA_H7
384384
#define MBED_CONF_TARGET_LSE_BYPASS 1 // set by target:PORTENTA_H7
385385
#define MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_LOW // set by target:MCU_STM32H7
386386
#define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target

Diff for: ‎variants/PORTENTA_H7_M7/cflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,12 @@
33
-DAPPLICATION_ADDR=0x8040000
44
-DAPPLICATION_RAM_ADDR=0x24000000
55
-DAPPLICATION_RAM_SIZE=0x80000
6-
-DAPPLICATION_SIZE=0xc0000
6+
-DAPPLICATION_SIZE=0x1c0000
77
-DMBED_RAM1_SIZE=0x80000
88
-DMBED_RAM1_START=0x24000000
99
-DMBED_RAM_SIZE=0x80000
1010
-DMBED_RAM_START=0x24000000
11-
-DMBED_ROM_SIZE=0x100000
11+
-DMBED_ROM_SIZE=0x200000
1212
-DMBED_ROM_START=0x8000000
1313
-DMBED_TRAP_ERRORS_ENABLED=1
1414
-Os

Diff for: ‎variants/PORTENTA_H7_M7/cxxflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,12 @@
55
-DAPPLICATION_ADDR=0x8040000
66
-DAPPLICATION_RAM_ADDR=0x24000000
77
-DAPPLICATION_RAM_SIZE=0x80000
8-
-DAPPLICATION_SIZE=0xc0000
8+
-DAPPLICATION_SIZE=0x1c0000
99
-DMBED_RAM1_SIZE=0x80000
1010
-DMBED_RAM1_START=0x24000000
1111
-DMBED_RAM_SIZE=0x80000
1212
-DMBED_RAM_START=0x24000000
13-
-DMBED_ROM_SIZE=0x100000
13+
-DMBED_ROM_SIZE=0x200000
1414
-DMBED_ROM_START=0x8000000
1515
-DMBED_TRAP_ERRORS_ENABLED=1
1616
-Os

Diff for: ‎variants/PORTENTA_H7_M7/defines.txt

+3-2
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,9 @@
4444
-DEXTRA_IDLE_STACK_REQUIRED
4545
-DFEATURE_BLE=1
4646
-D__FPU_PRESENT=1
47+
-DLSE_STARTUP_TIMEOUT=200
4748
-D__MBED__=1
48-
-DMBED_BUILD_TIMESTAMP=1657634193.764244
49+
-DMBED_BUILD_TIMESTAMP=1662124795.1873505
4950
-D__MBED_CMSIS_RTOS_CM
5051
-DMBED_TICKLESS
5152
-DMBEDTLS_FS_IO
@@ -83,6 +84,6 @@
8384
-DVIRTIO_MASTER_ONLY
8485
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
8586
-DCORE_MAJOR=3
86-
-DCORE_MINOR=2
87+
-DCORE_MINOR=3
8788
-DCORE_PATCH=0
8889
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/PORTENTA_H7_M7/ldflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
1-
-DMBED_APP_SIZE=0xc0000
1+
-DMBED_APP_SIZE=0x1c0000
22
-DMBED_APP_START=0x8040000
33
-DMBED_BOOT_STACK_SIZE=1024
44
-DMBED_RAM1_SIZE=0x80000
55
-DMBED_RAM1_START=0x24000000
66
-DMBED_RAM_SIZE=0x80000
77
-DMBED_RAM_START=0x24000000
8-
-DMBED_ROM_SIZE=0x100000
8+
-DMBED_ROM_SIZE=0x200000
99
-DMBED_ROM_START=0x8000000
1010
-DXIP_ENABLE=0
1111
-Wl,--gc-sections

Diff for: ‎variants/PORTENTA_H7_M7/libs/libmbed.a

11.8 KB
Binary file not shown.

Diff for: ‎variants/PORTENTA_H7_M7/linker_script.ld

+6
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,12 @@ SECTIONS
9696
. = ABSOLUTE(0x3800FC00);
9797
*(.pdm_buffer)
9898
} > RAM_D3
99+
_dtcm_lma = __etext + SIZEOF(.data);
100+
.dtcm : AT(_dtcm_lma) {
101+
_sdtcm = .;
102+
*(.dtcm*)
103+
_edtcm = .;
104+
} > DTCMRAM
99105
.heap (COPY):
100106
{
101107
__end__ = .;

Diff for: ‎variants/PORTENTA_H7_M7/mbed_config.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -382,7 +382,7 @@
382382
#define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:MCU_STM32H7
383383
#define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32
384384
#define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1|USE_LPUART_CLK_PCLK3 // set by target:MCU_STM32
385-
#define MBED_CONF_TARGET_LSE_AVAILABLE 0 // set by target:PORTENTA_H7
385+
#define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:PORTENTA_H7
386386
#define MBED_CONF_TARGET_LSE_BYPASS 1 // set by target:PORTENTA_H7
387387
#define MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_LOW // set by target:MCU_STM32H7
388388
#define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target

Diff for: ‎variants/PORTENTA_X8/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@
3434
-DEXTRA_IDLE_STACK_REQUIRED
3535
-D__FPU_PRESENT=1
3636
-D__MBED__=1
37-
-DMBED_BUILD_TIMESTAMP=1657634421.4872477
37+
-DMBED_BUILD_TIMESTAMP=1662125012.238662
3838
-D__MBED_CMSIS_RTOS_CM
3939
-DMBED_MPU_CUSTOM
4040
-DMBED_TICKLESS
@@ -71,6 +71,6 @@
7171
-DVIRTIO_SLAVE_ONLY
7272
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
7373
-DCORE_MAJOR=3
74-
-DCORE_MINOR=2
74+
-DCORE_MINOR=3
7575
-DCORE_PATCH=0
7676
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/PORTENTA_X8/libs/libmbed.a

14.9 KB
Binary file not shown.

Diff for: ‎variants/PORTENTA_X8/linker_script.ld

+7-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
MEMORY
22
{
3-
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = CM4_BINARY_END - CM4_BINARY_START
3+
FLASH (rx) : ORIGIN = CM4_BINARY_START, LENGTH = 0x100000
44
RAM (rwx) : ORIGIN = 0x10000000 + (((166 * 4) + 7) & 0xFFFFFFF8), LENGTH = 0x48000 - (((166 * 4) + 7) & 0xFFFFFFF8)
55
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
66
}
@@ -93,6 +93,12 @@ SECTIONS
9393
. = ABSOLUTE(0x3800FC00);
9494
*(.pdm_buffer)
9595
} > RAM_D3
96+
_dtcm_lma = __etext + SIZEOF(.data);
97+
.dtcm : AT(_dtcm_lma) {
98+
_sdtcm = .;
99+
*(.dtcm*)
100+
_edtcm = .;
101+
} > DTCMRAM
96102
.heap (COPY):
97103
{
98104
__end__ = .;

Diff for: ‎variants/RASPBERRY_PI_PICO/defines.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
-DDEVICE_USTICKER=1
2121
-DDEVICE_WATCHDOG=1
2222
-D__MBED__=1
23-
-DMBED_BUILD_TIMESTAMP=1657634171.1910558
23+
-DMBED_BUILD_TIMESTAMP=1662124773.2915711
2424
-D__MBED_CMSIS_RTOS_CM
2525
-DMBED_MPU_CUSTOM
2626
-DMBEDTLS_ENTROPY_NV_SEED
@@ -44,6 +44,6 @@
4444
-DTOOLCHAIN_GCC_ARM
4545
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
4646
-DCORE_MAJOR=3
47-
-DCORE_MINOR=2
47+
-DCORE_MINOR=3
4848
-DCORE_PATCH=0
4949
-DUSE_ARDUINO_PINOUT

Diff for: ‎variants/RASPBERRY_PI_PICO/libs/libmbed.a

11.8 KB
Binary file not shown.

0 commit comments

Comments
 (0)