@@ -148,6 +148,7 @@ void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
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hdma_dfsdm1_flt0 .Init .Mode = DMA_CIRCULAR ;
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hdma_dfsdm1_flt0 .Init .Priority = DMA_PRIORITY_LOW ;
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hdma_dfsdm1_flt0 .Init .FIFOMode = DMA_FIFOMODE_DISABLE ;
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+ HAL_DMA_DeInit (& hdma_dfsdm1_flt0 );
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if (HAL_DMA_Init (& hdma_dfsdm1_flt0 ) != HAL_OK )
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{
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Error_Handler ();
@@ -214,7 +215,10 @@ void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
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if (DFSDM1_Init == 0 )
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{
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/* Peripheral clock disable */
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- __HAL_RCC_DFSDM1_CLK_DISABLE ();
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+ if (HAL_RCC_DFSDM1_CLK_ENABLED > 0 ) {
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+ __HAL_RCC_DFSDM1_CLK_DISABLE ();
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+ HAL_RCC_DFSDM1_CLK_ENABLED -- ;
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+ }
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/**DFSDM1 GPIO Configuration
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PD10 ------> DFSDM1_CKOUT
@@ -245,7 +249,10 @@ void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
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if (DFSDM1_Init == 0 )
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{
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/* Peripheral clock disable */
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- __HAL_RCC_DFSDM1_CLK_DISABLE ();
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+ if (HAL_RCC_DFSDM1_CLK_ENABLED > 0 ) {
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+ __HAL_RCC_DFSDM1_CLK_DISABLE ();
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+ HAL_RCC_DFSDM1_CLK_ENABLED -- ;
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+ }
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/**DFSDM1 GPIO Configuration
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PD10 ------> DFSDM1_CKOUT
@@ -295,6 +302,7 @@ static int DFSDM_Init(uint32_t frequency)
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hdfsdm1_channel2 .Init .Awd .Oversampling = 2000000 /frequency ; /* 2MHz/125 = 16kHz */
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hdfsdm1_channel2 .Init .Offset = 0 ;
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hdfsdm1_channel2 .Init .RightBitShift = 0 ;
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+ HAL_DFSDM_ChannelDeInit (& hdfsdm1_channel2 );
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if (HAL_OK != HAL_DFSDM_ChannelInit (& hdfsdm1_channel2 ))
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{
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return 0 ;
@@ -313,6 +321,7 @@ static int DFSDM_Init(uint32_t frequency)
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hdfsdm1_filter0 .Init .FilterParam .SincOrder = DFSDM_FILTER_FASTSINC_ORDER ;
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hdfsdm1_filter0 .Init .FilterParam .Oversampling = 2000000 /frequency ; /* 2MHz/125 = 16kHz */
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hdfsdm1_filter0 .Init .FilterParam .IntOversampling = 1 ;
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+ HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
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if (HAL_OK != HAL_DFSDM_FilterInit (& hdfsdm1_filter0 ))
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{
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return 0 ;
@@ -357,6 +366,7 @@ int py_audio_init(size_t channels, uint32_t frequency)
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HAL_RCCEx_GetPeriphCLKConfig (& rcc_ex_clk_init_struct );
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+ rcc_ex_clk_init_struct .PeriphClockSelection = RCC_PERIPHCLK_DFSDM1 ;
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rcc_ex_clk_init_struct .Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_D2PCLK1 ;
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HAL_RCCEx_PeriphCLKConfig (& rcc_ex_clk_init_struct );
@@ -398,13 +408,29 @@ void py_audio_gain_set(int gain_db)
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void py_audio_deinit ()
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{
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- py_audio_stop_streaming ();
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- HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
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-
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// Disable IRQs
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+ HAL_NVIC_DisableIRQ (DFSDM1_FLT0_IRQn );
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+ HAL_NVIC_DisableIRQ (DFSDM1_FLT1_IRQn );
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HAL_NVIC_DisableIRQ (AUDIO_DFSDM1_DMA_IRQ );
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+ if (hdfsdm1_channel2 .Instance != NULL ) {
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+ HAL_DFSDM_ChannelDeInit (& hdfsdm1_channel2 );
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+ hdfsdm1_channel2 .Instance = NULL ;
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+ }
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+
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+ if (hdfsdm1_filter0 .Instance != NULL ) {
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+ //HAL_DFSDM_FilterRegularStop_DMA(&hdfsdm1_filter0);
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+ HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
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+ hdfsdm1_filter0 .Instance = NULL ;
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+ }
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+
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+ if (hdma_dfsdm1_flt0 .Instance != NULL ) {
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+ HAL_DMA_DeInit (& hdma_dfsdm1_flt0 );
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+ hdma_dfsdm1_flt0 .Instance = NULL ;
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+ }
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+
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//free(g_pcmbuf);
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+ xfer_status = 0 ;
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g_pcmbuf = NULL ;
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}
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