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Merge pull request #73 from arduino-libraries/dma_pool_api
misc: Update the library to use the API DMAPool.
2 parents ef8c648 + 01d33f9 commit 70a630e

13 files changed

+59
-386
lines changed

Diff for: ‎src/AdvancedADC.cpp

+9-12
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ struct adc_descr_t {
3030
IRQn_Type dma_irqn;
3131
TIM_HandleTypeDef tim;
3232
uint32_t tim_trig;
33-
DMABufferPool<Sample> *pool;
33+
DMAPool<Sample> *pool;
3434
DMABuffer<Sample> *dmabuf[2];
3535
};
3636

@@ -124,7 +124,7 @@ DMABuffer<Sample> &AdvancedADC::read() {
124124
while (!available()) {
125125
__WFI();
126126
}
127-
return *descr->pool->dequeue();
127+
return *descr->pool->alloc(DMA_BUFFER_READ);
128128
}
129129
return NULLBUF;
130130
}
@@ -200,14 +200,14 @@ int AdvancedADC::begin(uint32_t resolution, uint32_t sample_rate, size_t n_sampl
200200
}
201201

202202
// Allocate DMA buffer pool.
203-
descr->pool = new DMABufferPool<Sample>(n_samples, n_channels, n_buffers);
203+
descr->pool = new DMAPool<Sample>(n_samples, n_channels, n_buffers);
204204
if (descr->pool == nullptr) {
205205
return 0;
206206
}
207207

208208
// Allocate the two DMA buffers used for double buffering.
209-
descr->dmabuf[0] = descr->pool->allocate();
210-
descr->dmabuf[1] = descr->pool->allocate();
209+
descr->dmabuf[0] = descr->pool->alloc(DMA_BUFFER_WRITE);
210+
descr->dmabuf[1] = descr->pool->alloc(DMA_BUFFER_WRITE);
211211

212212
// Init and config DMA.
213213
if (hal_dma_config(&descr->dma, descr->dma_irqn, DMA_PERIPH_TO_MEMORY) < 0) {
@@ -325,19 +325,16 @@ void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *adc) {
325325
if (descr->pool->writable()) {
326326
// Make sure any cached data is discarded.
327327
descr->dmabuf[ct]->invalidate();
328-
329328
// Move current DMA buffer to ready queue.
330-
descr->pool->enqueue(descr->dmabuf[ct]);
331-
329+
descr->dmabuf[ct]->release();
332330
// Allocate a new free buffer.
333-
descr->dmabuf[ct] = descr->pool->allocate();
334-
331+
descr->dmabuf[ct] = descr->pool->alloc(DMA_BUFFER_WRITE);
335332
// Currently, all multi-channel buffers are interleaved.
336333
if (descr->dmabuf[ct]->channels() > 1) {
337-
descr->dmabuf[ct]->setflags(DMA_BUFFER_INTRLVD);
334+
descr->dmabuf[ct]->set_flags(DMA_BUFFER_INTRLVD);
338335
}
339336
} else {
340-
descr->dmabuf[ct]->setflags(DMA_BUFFER_DISCONT);
337+
descr->dmabuf[ct]->set_flags(DMA_BUFFER_DISCONT);
341338
}
342339

343340
// Update the next DMA target pointer.

Diff for: ‎src/AdvancedADC.h

+4-6
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,10 @@
1717
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
1818
*/
1919

20-
#include <array>
21-
#include "DMABuffer.h"
22-
#include "AdvancedAnalog.h"
20+
#ifndef __ADVANCED_ADC_H__
21+
#define __ADVANCED_ADC_H__
2322

24-
#ifndef ARDUINO_ADVANCED_ADC_H_
25-
#define ARDUINO_ADVANCED_ADC_H_
23+
#include "AdvancedAnalog.h"
2624

2725
struct adc_descr_t;
2826

@@ -96,4 +94,4 @@ class AdvancedADCDual {
9694
int stop();
9795
};
9896

99-
#endif /* ARDUINO_ADVANCED_ADC_H_ */
97+
#endif // __ADVANCED_ADC_H__

Diff for: ‎src/AdvancedAnalog.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
#define __ADVANCED_ANALOG_H__
2222

2323
#include "Arduino.h"
24-
#include "DMABuffer.h"
24+
#include "api/DMAPool.h"
2525
#include "pinDefinitions.h"
2626

2727
enum {

Diff for: ‎src/AdvancedDAC.cpp

+7-7
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ struct dac_descr_t {
3030
uint32_t tim_trig;
3131
uint32_t resolution;
3232
uint32_t dmaudr_flag;
33-
DMABufferPool<Sample> *pool;
33+
DMAPool<Sample> *pool;
3434
DMABuffer<Sample> *dmabuf[2];
3535
};
3636

@@ -114,7 +114,7 @@ DMABuffer<Sample> &AdvancedDAC::dequeue() {
114114
while (!available()) {
115115
__WFI();
116116
}
117-
return *descr->pool->allocate();
117+
return *descr->pool->alloc(DMA_BUFFER_WRITE);
118118
}
119119
return NULLBUF;
120120
}
@@ -128,11 +128,11 @@ void AdvancedDAC::write(DMABuffer<Sample> &dmabuf) {
128128

129129
// Make sure any cached data is flushed.
130130
dmabuf.flush();
131-
descr->pool->enqueue(&dmabuf);
131+
dmabuf.release();
132132

133133
if (descr->dmabuf[0] == nullptr && (++buf_count % 3) == 0) {
134-
descr->dmabuf[0] = descr->pool->dequeue();
135-
descr->dmabuf[1] = descr->pool->dequeue();
134+
descr->dmabuf[0] = descr->pool->alloc(DMA_BUFFER_READ);
135+
descr->dmabuf[1] = descr->pool->alloc(DMA_BUFFER_READ);
136136

137137
// Start DAC DMA.
138138
HAL_DAC_Start_DMA(descr->dac, descr->channel,
@@ -167,7 +167,7 @@ int AdvancedDAC::begin(uint32_t resolution, uint32_t frequency, size_t n_samples
167167
}
168168

169169
// Allocate DMA buffer pool.
170-
descr->pool = new DMABufferPool<Sample>(n_samples, n_channels, n_buffers);
170+
descr->pool = new DMAPool<Sample>(n_samples, n_channels, n_buffers);
171171
if (descr->pool == nullptr) {
172172
descr = nullptr;
173173
return 0;
@@ -226,7 +226,7 @@ void DAC_DMAConvCplt(DMA_HandleTypeDef *dma, uint32_t channel) {
226226
// NOTE: CT bit is inverted, to get the DMA buffer that's Not currently in use.
227227
size_t ct = ! hal_dma_get_ct(dma);
228228
descr->dmabuf[ct]->release();
229-
descr->dmabuf[ct] = descr->pool->dequeue();
229+
descr->dmabuf[ct] = descr->pool->alloc(DMA_BUFFER_READ);
230230
hal_dma_update_memory(dma, descr->dmabuf[ct]->data());
231231
} else {
232232
dac_descr_deinit(descr, false);

Diff for: ‎src/AdvancedDAC.h

+4-6
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,10 @@
1717
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
1818
*/
1919

20-
#include <vector>
21-
#include "DMABuffer.h"
22-
#include "AdvancedAnalog.h"
20+
#ifndef __ADVANCED_DAC_H__
21+
#define __ADVANCED_DAC_H__
2322

24-
#ifndef ARDUINO_ADVANCED_DAC_H_
25-
#define ARDUINO_ADVANCED_DAC_H_
23+
#include "AdvancedAnalog.h"
2624

2725
struct dac_descr_t;
2826

@@ -52,4 +50,4 @@ class AdvancedDAC {
5250
int frequency(uint32_t const frequency);
5351
};
5452

55-
#endif /* ARDUINO_ADVANCED_DAC_H_ */
53+
#endif // __ADVANCED_DAC_H__

Diff for: ‎src/AdvancedI2S.cpp

+18-17
Original file line numberDiff line numberDiff line change
@@ -25,11 +25,11 @@ struct i2s_descr_t {
2525
I2S_HandleTypeDef i2s;
2626
DMA_HandleTypeDef dmatx;
2727
IRQn_Type dmatx_irqn;
28-
DMABufferPool<Sample> *dmatx_pool;
28+
DMAPool<Sample> *dmatx_pool;
2929
DMABuffer<Sample> *dmatx_buf[2];
3030
DMA_HandleTypeDef dmarx;
3131
IRQn_Type dmarx_irqn;
32-
DMABufferPool<Sample> *dmarx_pool;
32+
DMAPool<Sample> *dmarx_pool;
3333
DMABuffer<Sample> *dmarx_buf[2];
3434
};
3535

@@ -154,16 +154,16 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
154154

155155
if (i2s_mode & AN_I2S_MODE_IN) {
156156
// Start I2S DMA.
157-
descr->dmarx_buf[0] = descr->dmarx_pool->allocate();
158-
descr->dmarx_buf[1] = descr->dmarx_pool->allocate();
157+
descr->dmarx_buf[0] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
158+
descr->dmarx_buf[1] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
159159
rx_buf = (uint16_t *) descr->dmarx_buf[0]->data();
160160
buf_size = descr->dmarx_buf[0]->size();
161161
HAL_NVIC_DisableIRQ(descr->dmarx_irqn);
162162
}
163163

164164
if (i2s_mode & AN_I2S_MODE_OUT) {
165-
descr->dmatx_buf[0] = descr->dmatx_pool->dequeue();
166-
descr->dmatx_buf[1] = descr->dmatx_pool->dequeue();
165+
descr->dmatx_buf[0] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
166+
descr->dmatx_buf[1] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
167167
tx_buf = (uint16_t *) descr->dmatx_buf[0]->data();
168168
buf_size = descr->dmatx_buf[0]->size();
169169
HAL_NVIC_DisableIRQ(descr->dmatx_irqn);
@@ -183,7 +183,7 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
183183
return 0;
184184
}
185185
}
186-
186+
HAL_I2S_DMAPause(&descr->i2s);
187187
// Re/enable DMA double buffer mode.
188188
if (i2s_mode & AN_I2S_MODE_IN) {
189189
hal_dma_enable_dbm(&descr->dmarx, descr->dmarx_buf[0]->data(), descr->dmarx_buf[1]->data());
@@ -194,6 +194,7 @@ static int i2s_start_dma_transfer(i2s_descr_t *descr, i2s_mode_t i2s_mode) {
194194
hal_dma_enable_dbm(&descr->dmatx, descr->dmatx_buf[0]->data(), descr->dmatx_buf[1]->data());
195195
HAL_NVIC_EnableIRQ(descr->dmatx_irqn);
196196
}
197+
HAL_I2S_DMAResume(&descr->i2s);
197198
return 1;
198199
}
199200

@@ -216,7 +217,7 @@ DMABuffer<Sample> &AdvancedI2S::read() {
216217
while (!descr->dmarx_pool->readable()) {
217218
__WFI();
218219
}
219-
return *descr->dmarx_pool->dequeue();
220+
return *descr->dmarx_pool->alloc(DMA_BUFFER_READ);
220221
}
221222
return NULLBUF;
222223
}
@@ -227,7 +228,7 @@ DMABuffer<Sample> &AdvancedI2S::dequeue() {
227228
while (!descr->dmatx_pool->writable()) {
228229
__WFI();
229230
}
230-
return *descr->dmatx_pool->allocate();
231+
return *descr->dmatx_pool->alloc(DMA_BUFFER_WRITE);
231232
}
232233
return NULLBUF;
233234
}
@@ -241,7 +242,7 @@ void AdvancedI2S::write(DMABuffer<Sample> &dmabuf) {
241242

242243
// Make sure any cached data is flushed.
243244
dmabuf.flush();
244-
descr->dmatx_pool->enqueue(&dmabuf);
245+
dmabuf.release();
245246

246247
if (descr->dmatx_buf[0] == nullptr && (++buf_count % 3) == 0) {
247248
i2s_start_dma_transfer(descr, i2s_mode);
@@ -285,7 +286,7 @@ int AdvancedI2S::begin(i2s_mode_t i2s_mode, uint32_t sample_rate, size_t n_sampl
285286

286287
if (i2s_mode & AN_I2S_MODE_IN) {
287288
// Allocate DMA buffer pool.
288-
descr->dmarx_pool = new DMABufferPool<Sample>(n_samples, 2, n_buffers);
289+
descr->dmarx_pool = new DMAPool<Sample>(n_samples, 2, n_buffers);
289290
if (descr->dmarx_pool == nullptr) {
290291
descr = nullptr;
291292
return 0;
@@ -299,7 +300,7 @@ int AdvancedI2S::begin(i2s_mode_t i2s_mode, uint32_t sample_rate, size_t n_sampl
299300

300301
if (i2s_mode & AN_I2S_MODE_OUT) {
301302
// Allocate DMA buffer pool.
302-
descr->dmatx_pool = new DMABufferPool<Sample>(n_samples, 2, n_buffers);
303+
descr->dmatx_pool = new DMAPool<Sample>(n_samples, 2, n_buffers);
303304
if (descr->dmatx_pool == nullptr) {
304305
descr = nullptr;
305306
return 0;
@@ -358,7 +359,7 @@ void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *i2s) {
358359
// the next DMA memory address target.
359360
if (descr->dmatx_pool->readable()) {
360361
descr->dmatx_buf[ct]->release();
361-
descr->dmatx_buf[ct] = descr->dmatx_pool->dequeue();
362+
descr->dmatx_buf[ct] = descr->dmatx_pool->alloc(DMA_BUFFER_READ);
362363
hal_dma_update_memory(&descr->dmatx, descr->dmatx_buf[ct]->data());
363364
} else {
364365
i2s_descr_deinit(descr, false);
@@ -384,15 +385,15 @@ void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *i2s) {
384385
// Make sure any cached data is discarded.
385386
descr->dmarx_buf[ct]->invalidate();
386387
// Move current DMA buffer to ready queue.
387-
descr->dmarx_pool->enqueue(descr->dmarx_buf[ct]);
388+
descr->dmarx_buf[ct]->release();
388389
// Allocate a new free buffer.
389-
descr->dmarx_buf[ct] = descr->dmarx_pool->allocate();
390+
descr->dmarx_buf[ct] = descr->dmarx_pool->alloc(DMA_BUFFER_WRITE);
390391
// Currently, all multi-channel buffers are interleaved.
391392
if (descr->dmarx_buf[ct]->channels() > 1) {
392-
descr->dmarx_buf[ct]->setflags(DMA_BUFFER_INTRLVD);
393+
descr->dmarx_buf[ct]->set_flags(DMA_BUFFER_INTRLVD);
393394
}
394395
} else {
395-
descr->dmarx_buf[ct]->setflags(DMA_BUFFER_DISCONT);
396+
descr->dmarx_buf[ct]->set_flags(DMA_BUFFER_DISCONT);
396397
}
397398

398399
// Update the next DMA target pointer.

Diff for: ‎src/AdvancedI2S.h

+3-5
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,9 @@
1616
License along with this library; if not, write to the Free Software
1717
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
1818
*/
19-
#ifndef ARDUINO_ADVANCED_I2S_H
20-
#define ARDUINO_ADVANCED_I2S_H
19+
#ifndef __ADVANCED_I2S_H__
20+
#define __ADVANCED_I2S_H__
2121

22-
#include <vector>
23-
#include "DMABuffer.h"
2422
#include "AdvancedAnalog.h"
2523

2624
struct i2s_descr_t;
@@ -55,4 +53,4 @@ class AdvancedI2S {
5553
int stop();
5654
};
5755

58-
#endif // ARDUINO_ADVANCED_I2S_H
56+
#endif // __ADVANCED_I2S_H__

Diff for: ‎src/Arduino_AdvancedAnalog.h

+3-7
Original file line numberDiff line numberDiff line change
@@ -17,16 +17,12 @@
1717
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
1818
*/
1919

20-
#ifndef ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H
21-
#define ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H
22-
23-
/**************************************************************************************
24-
* INCLUDE
25-
**************************************************************************************/
20+
#ifndef __ARDUINO_ADVANCED_ANALOG_H__
21+
#define __ARDUINO_ADVANCED_ANALOG_H__
2622

2723
#include "AdvancedADC.h"
2824
#include "AdvancedDAC.h"
2925
#include "AdvancedI2S.h"
3026
#include "WavReader.h"
3127

32-
#endif /* ADVANCEDANALOGREDUX_ARDUINO_ADVANCEDANALOG_H */
28+
#endif // __ARDUINO_ADVANCED_ANALOG_H__

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