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REG_GAR = const (0x0001 ) # Gateway IP Address
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REG_SUBR = const (0x0005 ) # Subnet Mask Address
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REG_VERSIONR_W5500 = const (0x0039 ) # W5500 Silicon Version
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+ REG_VERSIONR_W5100S = const (0x0080 ) # W5100S Silicon Version
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REG_SHAR = const (0x0009 ) # Source Hardware Address
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REG_SIPR = const (0x000F ) # Source IP Address
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REG_PHYCFGR = const (0x002E ) # W5500 PHY Configuration
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+ REG_PHYCFGR_W5100S = const (0x003C ) # W5100S PHY Configuration
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# Wiznet5k Socket Registers
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REG_SNMR = const (0x0000 ) # Socket n Mode
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CH_SIZE = const (0x100 )
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SOCK_SIZE = const (0x800 ) # MAX W5k socket size
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+ SOCK_MASK = const (0x7FF )
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# Register commands
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MR_RST = const (0x80 ) # Mode Register RST
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# Socket mode register
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# Maximum number of sockets to support, differs between chip versions.
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W5200_W5500_MAX_SOCK_NUM = const (0x08 )
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+ W5100_MAX_SOCK_NUM = const (0x04 )
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SOCKET_INVALID = const (255 )
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# UDP socket struct.
@@ -179,8 +183,19 @@ def __init__(
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self .src_port = 0
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self ._dns = 0
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- # Set DHCP
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+ # First, wait link status is on
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+ # to avoid the code during DHCP, socket listen, connect ...
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+ # assert self.link_status, "Ethernet cable disconnected!"
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+ start_time = time .monotonic ()
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+ while True :
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+ if self .link_status or ((time .monotonic () - start_time ) > 5 ):
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+ break
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+ time .sleep (1 )
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+ if self ._debug :
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+ print ("My Link is:" , self .link_status )
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self ._dhcp_client = None
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+
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+ # Set DHCP
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if is_dhcp :
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ret = self .set_dhcp (hostname , dhcp_timeout )
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if ret != 0 :
@@ -198,16 +213,6 @@ def set_dhcp(self, hostname=None, response_timeout=30):
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if self ._debug :
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print ("* Initializing DHCP" )
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- # First, wait link status is on
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- # to avoid the code during DHCP - assert self.link_status, "Ethernet cable disconnected!"
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- start_time = time .monotonic ()
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- while True :
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- if self .link_status or ((time .monotonic () - start_time ) > 5 ):
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- break
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- time .sleep (1 )
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- if self ._debug :
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- print ("My Link is:" , self .link_status )
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-
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# Return IP assigned by DHCP
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self ._dhcp_client = dhcp .DHCP (
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self , self .mac_address , hostname , response_timeout , debug = self ._debug
@@ -251,6 +256,8 @@ def max_sockets(self):
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"""Returns max number of sockets supported by chip."""
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if self ._chip_type == "w5500" :
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return W5200_W5500_MAX_SOCK_NUM
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+ if self ._chip_type == "w5100s" :
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+ return W5100_MAX_SOCK_NUM
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return - 1
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@property
@@ -319,6 +326,9 @@ def link_status(self):
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if self ._chip_type == "w5500" :
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data = self .read (REG_PHYCFGR , 0x00 )
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return data [0 ] & 0x01
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+ if self ._chip_type == "w5100s" :
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+ data = self .read (REG_PHYCFGR_W5100S , 0x00 )
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+ return data [0 ] & 0x01
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return 0
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def remote_port (self , socket_num ):
@@ -367,25 +377,47 @@ def _w5100_init(self):
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self .write (0x1E , ctrl_byte , 2 )
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self .write (0x1F , ctrl_byte , 2 )
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else :
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- return 0
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+ # Detect if chip is Wiznet W5100S
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+ if self .detect_w5100s () == 1 :
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+ pass
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+ else :
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+ return 0
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return 1
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def detect_w5500 (self ):
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"""Detects W5500 chip."""
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+ self ._chip_type = "w5500"
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assert self .sw_reset () == 0 , "Chip not reset properly!"
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self ._write_mr (0x08 )
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- assert self ._read_mr ()[0 ] == 0x08 , "Expected 0x08."
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+ # assert self._read_mr()[0] == 0x08, "Expected 0x08."
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+ if self ._read_mr ()[0 ] != 0x08 :
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+ return - 1
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self ._write_mr (0x10 )
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- assert self ._read_mr ()[0 ] == 0x10 , "Expected 0x10."
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+ # assert self._read_mr()[0] == 0x10, "Expected 0x10."
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+ if self ._read_mr ()[0 ] != 0x10 :
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+ return - 1
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self ._write_mr (0x00 )
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- assert self ._read_mr ()[0 ] == 0x00 , "Expected 0x00."
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+ # assert self._read_mr()[0] == 0x00, "Expected 0x00."
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+ if self ._read_mr ()[0 ] != 0x00 :
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+ return - 1
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if self .read (REG_VERSIONR_W5500 , 0x00 )[0 ] != 0x04 :
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return - 1
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- self ._chip_type = "w5500"
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- self ._ch_base_msb = 0x10
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+ # self._chip_type = "w5500"
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+ # self._ch_base_msb = 0x10
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+ return 1
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+
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+ def detect_w5100s (self ):
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+ """Detects W5100S chip."""
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+ self ._chip_type = "w5100s"
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+ # sw reset
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+ assert self .sw_reset () == 0 , "Chip not reset properly!"
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+ if self .read (REG_VERSIONR_W5100S , 0x00 )[0 ] != 0x51 :
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+ return - 1
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+
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+ self ._ch_base_msb = 0x0400
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return 1
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def sw_reset (self ):
@@ -396,7 +428,9 @@ def sw_reset(self):
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mode_reg = self ._read_mr ()
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self ._write_mr (0x80 )
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mode_reg = self ._read_mr ()
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- if mode_reg [0 ] != 0x00 :
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+
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+ # W5100S case => 0x03
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+ if (mode_reg [0 ] != 0x00 ) and (mode_reg [0 ] != 0x03 ):
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return - 1
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return 0
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@@ -418,9 +452,16 @@ def read(self, addr, callback, length=1, buffer=None):
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"""
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with self ._device as bus_device :
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- bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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- bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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- bus_device .write (bytes ([callback ])) # pylint: disable=no-member
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+ if self ._chip_type == "w5500" :
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+ bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([callback ])) # pylint: disable=no-member
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+ else :
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+ # if self._chip_type == "w5100s":
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+ bus_device .write (bytes ([0x0F ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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+
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if buffer is None :
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self ._rxbuf = bytearray (length )
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bus_device .readinto (self ._rxbuf ) # pylint: disable=no-member
@@ -437,9 +478,15 @@ def write(self, addr, callback, data):
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"""
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with self ._device as bus_device :
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- bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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- bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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- bus_device .write (bytes ([callback ])) # pylint: disable=no-member
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+ if self ._chip_type == "w5500" :
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+ bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([callback ])) # pylint: disable=no-member
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+ else :
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+ # if self._chip_type == "w5100s":
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+ bus_device .write (bytes ([0xF0 ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr >> 8 ])) # pylint: disable=no-member
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+ bus_device .write (bytes ([addr & 0xFF ])) # pylint: disable=no-member
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if hasattr (data , "from_bytes" ):
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bus_device .write (bytes ([data ])) # pylint: disable=no-member
@@ -687,14 +734,28 @@ def socket_read(self, socket_num, length):
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# Read the starting save address of the received data
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ptr = self ._read_snrx_rd (socket_num )
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- # Read data from the starting address of snrx_rd
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- ctrl_byte = 0x18 + (socket_num << 5 )
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+ if self ._chip_type == "w5500" :
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+ # Read data from the starting address of snrx_rd
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+ ctrl_byte = 0x18 + (socket_num << 5 )
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- resp = self .read (ptr , ctrl_byte , ret )
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+ resp = self .read (ptr , ctrl_byte , ret )
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+ else :
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+ # if self._chip_type == "w5100s":
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+ offset = ptr & SOCK_MASK
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+ src_addr = offset + (socket_num * SOCK_SIZE + 0x6000 )
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+ if offset + ret > SOCK_SIZE :
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+ size = SOCK_SIZE - offset
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+ resp1 = self .read (src_addr , 0x00 , size )
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+ size = ret - size
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+ src_addr = socket_num * SOCK_SIZE + 0x6000
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+ resp2 = self .read (src_addr , 0x00 , size )
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+ resp = resp1 + resp2
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+ else :
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+ resp = self .read (src_addr , 0x00 , ret )
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# After reading the received data, update Sn_RX_RD to the increased
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# value as many as the reading size.
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- ptr += ret
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+ ptr = ( ptr + ret ) & 0xFFFF
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self ._write_snrx_rd (socket_num , ptr )
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# Notify the W5k of the updated Sn_Rx_RD
@@ -740,8 +801,29 @@ def socket_write(self, socket_num, buffer, timeout=0):
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# Read the starting address for saving the transmitting data.
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ptr = self ._read_sntx_wr (socket_num )
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- offset = ptr & 0x07FF
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- dst_addr = offset + (socket_num * 2048 + 0x8000 )
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+ offset = ptr & SOCK_MASK
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+ if self ._chip_type == "w5500" :
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+ dst_addr = offset + (socket_num * SOCK_SIZE + 0x8000 )
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+
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+ txbuf = buffer [:ret ]
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+ cntl_byte = 0x14 + (socket_num << 5 )
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+ self .write (dst_addr , cntl_byte , txbuf )
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+
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+ else :
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+ # if self._chip_type == "w5100s":
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+ dst_addr = offset + (socket_num * SOCK_SIZE + 0x4000 )
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+
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+ if offset + ret > SOCK_SIZE :
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+ size = SOCK_SIZE - offset
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+ txbuf = buffer [0 :size ]
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+ self .write (dst_addr , 0x00 , txbuf )
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+ txbuf = buffer [size :ret ]
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+ size = ret - size
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+ dst_addr = socket_num * SOCK_SIZE + 0x4000
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+ self .write (dst_addr , 0x00 , txbuf )
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+ else :
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+ txbuf = buffer [:ret ]
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+ self .write (dst_addr , 0x00 , buffer [:ret ])
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# update sn_tx_wr to the value + data size
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ptr = (ptr + ret ) & 0xFFFF
@@ -864,10 +946,22 @@ def _read_snmr(self, sock):
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def _write_socket (self , sock , address , data ):
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"""Write to a W5k socket register."""
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- cntl_byte = (sock << 5 ) + 0x0C
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- return self .write (address , cntl_byte , data )
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+ if self ._chip_type == "w5500" :
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+ cntl_byte = (sock << 5 ) + 0x0C
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+ return self .write (address , cntl_byte , data )
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+ if self ._chip_type == "w5100s" :
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+ cntl_byte = 0
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+ return self .write (
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+ self ._ch_base_msb + sock * CH_SIZE + address , cntl_byte , data
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+ )
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+ return None
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def _read_socket (self , sock , address ):
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"""Read a W5k socket register."""
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- cntl_byte = (sock << 5 ) + 0x08
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- return self .read (address , cntl_byte )
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+ if self ._chip_type == "w5500" :
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+ cntl_byte = (sock << 5 ) + 0x08
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+ return self .read (address , cntl_byte )
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+ if self ._chip_type == "w5100s" :
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+ cntl_byte = 0
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+ return self .read (self ._ch_base_msb + sock * CH_SIZE + address , cntl_byte )
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+ return None
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